Abstract: An alignment structure of an optical element includes an optical fiber having a parallel fiber segment and a plurality of bare fiber segments, a cover plate provided with a plurality of side-by-side guide grooves and a plurality of first coupling parts, the bare fiber segments of the optical fiber being arranged in the corresponding guide grooves, cross-sectional shapes of the guide grooves being at least one of U-shaped or V-shaped, and a silicon chip provided with lines and a plurality of second coupling parts. When the cover plate is matched with the silicon chip, the first coupling parts and the second coupling parts are coupled and positioned with each other respectively, and the optical fiber is fixed between the silicon chip and the cover plate.

Abstract: An adhesive and a method for removing the adhesive are provided. The adhesive includes component (A) and component (B). Component (A) is a combination of a first acrylate resin and a first compound, a second acrylate resin, a combination of the first acrylate resin and the second acrylate resin, a combination of the second acrylate resin and the first compound, or a combination of the first acrylate resin, the second acrylate resin and the first compound. The first acrylate resin has an iodine value from 0 to 3. The second acrylate resin has an acrylate group, or methacrylate group. Component (B) is a near infrared sensitizer. The first compound has at least two reactive functional groups, wherein the reactive functional groups are acrylate group, methacrylate group, or a combination thereof.

Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.

Abstract: A method, device, and medium are provided for processing an image using a machine learning model that identifies at least one candidate object from an image. The model comprises: a feature extraction model for describing an association between the image and a feature of the at least one candidate object; and a classification scoring model for describing an association between the feature and a classification score of the at least one candidate object. An update parameter associated with the classification scoring model is determined based on the classification score of the at least one candidate object and a ground truth classification score of at least one ground truth object in the image. The classification scoring model is updated based on the update parameter associated with the classification scoring model. The feature extraction model is prevented from being updated with the update parameter associated with the classification scoring model.

Abstract: An automated test mechanism includes: preparing test software capable of reading and processing a file in a general form, and making the test software support N kinds of communication interfaces, M kinds of communication protocols, and multiple commands of K kinds of instruments, wherein the general form includes an interface setting part, a communication protocol setting part, and a function list part; creating multiple general form files in the general form to support the K kinds of instruments, wherein the multiple general form files include a first file and a second file that are prepared for a first instrument and a second instrument of the multiple instruments respectively; and when performing a first test with the first instrument, choosing the first file for the first test, and when performing a second test with the second instrument, choosing the second file for the second test.

Abstract: The present disclosure provides a primer probe set for human histamine receptor HRH1 mRNA detection, a kit and a detection method, and relates to the technical field of biological detection. In the present disclosure, the primer probe set includes a HRH1-F, a HRH1-R and a probe H1-Probe; where the HRH1-F has a nucleotide sequence shown in SEQ ID NO. 1, the HRH1-R has a nucleotide sequence shown in SEQ ID NO. 2, and the probe H1-Probe has a nucleotide sequence shown in SEQ ID NO. 3. The present disclosure provides a kit including the primer probe set and a detection method. An expression level of the HRH1 mRNA can be detected using an RNA one-step method.

Abstract: Some implementations described herein include systems and techniques for fabricating a stacked die product. The systems and techniques include using a supporting fill mixture that includes a combination of types of composite particulates in a lateral gap region of a stack of semiconductor substrates and along a perimeter region of the stack of semiconductor substrates. One type of composite particulate included in the combination may be a relatively smaller size and include a smooth surface, allowing the composite particulate to ingress deep into the lateral gap region. Properties of the supporting fill mixture including the combination of types of composite particulates may control thermally induced stresses during downstream manufacturing to reduce a likelihood of defects in the supporting fill mixture and/or the stack of semiconductor substrates.

Abstract: Embodiments of 3D memory devices and methods for forming the same are disclosed. In one example, a 3D memory device includes a multi-layer stacked structure, where the multi-layer stacked structure includes a plurality of alternately stacked conductive layers and dielectric layers. The 3D memory device further includes a semiconductor layer over the multi-layer stacked structure, and a plurality of channel structures penetrating into the multi-layer stacked structure and the semiconductor layer. A first end of each channel structure is located within the semiconductor layer, and the first ends of the channel structures are aligned with one another.

Abstract: In an embodiment, a device includes: a first integrated circuit die having a first contact region and a first non-contact region; an encapsulant contacting sides of the first integrated circuit die; a dielectric layer contacting the encapsulant and the first integrated circuit die, the dielectric layer having a first portion over the first contact region, a second portion over the first non-contact region, and a third portion over a portion of the encapsulant; and a metallization pattern including: a first conductive via extending through the first portion of the dielectric layer to contact the first integrated circuit die; and a conductive line extending along the second portion and third portion of the dielectric layer, the conductive line having a straight portion along the second portion of the dielectric layer and a first meandering portion along the third portion of the dielectric layer.

Abstract: An electronic device may include first and second phased antenna arrays and a triplet of first, second, and third ultra-wideband antennas. An antenna module in the device may include a dielectric substrate. The first and second arrays and the triplet may be formed on the dielectric substrate. The third and second ultra-wideband antennas may be separated by a gap. The first array may be laterally interposed between the third and second ultra-wideband antennas within the gap. The third ultra-wideband antenna may be laterally interposed between the first phased antenna array and at least some of the second array. An integrated circuit may be mounted to the dielectric substrate using an interposer. The antenna module may occupy a minimal amount of space within the device and may be less expensive to manufacture relative to scenarios where the arrays and the ultra-wideband antennas are formed on separate substrates.

Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure is formed over a substrate. The sacrificial gate structure includes a sacrificial gate electrode. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed while a lower portion of the sacrificial gate structure is embedded in the first dielectric layer. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The sacrificial gate electrode is removed.

Abstract: A method includes placing a package component over a carrier. The package component includes a device die. A core frame is placed over the carrier. The core frame forms a ring encircling the package component. The method further includes encapsulating the core frame and the package component in an encapsulant, forming redistribution lines over the core frame and the package component, and forming electrical connectors over and electrically coupling to the package component through the redistribution lines.

Abstract: A method includes receiving from a client device a request for content, and transmitting to the client device a first content item, a second content item, and a script for displaying the first and second content items within an information resource. The script includes instructions that cause the client device to (1) display the first content item within a content slot having a first size occupying a first region of the information resource, (2) identify a user interaction associated with the first content item, (3) expand, responsive to the user interaction associated with the first content item, the content slot from a first size to a second size, and (4) display, responsive to the user interaction and in the expanded content slot, the first content item and the second content item and an actionable object configured to reduce the content slot from the second size to the first size.

Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system uses a cooling fluid supply module for the cooling of the pogo pin, and the cooling fluid may be either a coolant or a cooling gas. When an electronic device is accommodated in the chip socket, the cooling fluid supply module supplies a cooling fluid into the chip socket through the cooling fluid supply channel and the inlet, and the cooling fluid passes through the pogo pins and then flows into the cooling fluid discharge channel through the outlet. In the present invention, the cooling fluid is mainly used to cool not only the pogo pins in the chip socket but also the bottom surface of the electronic device and the solder ball contacts on the bottom surface.

Abstract: The present disclosure provides a reagent for detecting an expression level of a human histamine receptor HRH4 mRNA, a kit and a detection method. In the present disclosure, the reagent includes a specific primer and a probe for a human histamine receptor HRH4, the specific primer includes an HRH4-F and an HRH4-R, and the probe includes an H4-Probe; and the HRH4-F has a nucleotide sequence shown in SEQ ID NO. 1, the HRH4-R has a nucleotide sequence shown in SEQ ID NO. 2 and the H4-Probe has a nucleotide sequence shown in SEQ ID NO. 3. In the present disclosure, a kit for one-step detection and a detection method based on the reagent are prepared, and the expression level of the HRH4 mRNA can be one-step quantitatively detected with simple operation and short detection time.

Abstract: The present disclosure provides a viewing angle adjustment method and device, an electronic device, and a non-transitory computer-readable storage medium, and belongs to the field of computer technologies. The method includes determining an adsorption area of a first virtual object in a virtual scenario according to a distance between the first virtual object and a second virtual object, a size of the adsorption area being positively correlated with the distance between the first virtual object and a second virtual object. In response to an aiming point of the second virtual object being located in the adsorption area, the method includes obtaining a target rotation speed of a viewing angle of the virtual scenario. The method also includes adjusting the viewing angle of the virtual scenario according to the target rotation speed of the viewing angle.

Abstract: A method of backlight control for a display panel is provided. The display panel is configured to display with a variable refresh rate in a plurality of frame periods each having a fixed period and a variable period. The method includes steps of: generating a first backlight control signal in the fixed period of a frame period; determining whether a liquid crystal (LC) transition time corresponding to the frame period ends before an end time of the variable period of the frame period; generating a second backlight control signal in the variable period of the frame period when the LC transition time ends before the end time of the variable period of the frame period; and generating a compensation backlight control signal in a next frame period according to a backlight duty cycle of the frame period.

Abstract: A computer device, a setting method for a memory module, and a mainboard are provided. The computer device includes a memory module, a processor, and the mainboard. A basic input output system (BIOS) of the mainboard stores a custom extreme memory profile (XMP). When the processor executes the BIOS, so that the computer device displays a user interface (UI), the BIOS displays multiple default XMPs stored in the memory module and the custom XMP through the UI. The BIOS stores one of the default XMPs and the custom XMP to the memory module according to a selecting result of the one of the default XMPs and the custom XMP displayed on the UI.

Abstract: Disclosed are a thermoelectric device and a manufacturing mold and manufacturing method thereof. The thermoelectric device includes at least one set of thermoelectric arm unit, wherein a first thermoelectric arm is provided with a first upper surface and a first lower surface opposite to the first upper surface; a second thermoelectric arm is provided with a second upper surface and a second lower surface opposite to the second upper surface; the second thermoelectric arm is seamlessly bonded with the first thermoelectric arm via an insulating adhesive layer; the first upper surface is flush with the second upper surface, and a first spacing groove is formed between adjacent positions of the first upper surface and the second upper surface; the first lower surface is flush with the second lower surface, and a second spacing groove is formed between adjacent positions of the first lower surface and the second lower surface.