Abstract: Techniques are disclosed relating to improving memory reliability, e.g., in the context of memory circuits with limited reliability features. In some embodiments, memory controller circuitry is configured to communicate with memory circuitry via an interface that supports link error detection. The memory controller circuitry may, based on a corruption indicator, transmit a data and parity combination for the first data block that causes the memory circuitry to detect an uncorrectable write interface error. Subsequent reads of the location may therefore cause an uncorrectable error indication. This may advantageously allow the memory controller circuitry to propagate a corruption indicator as an uncorrectable error in the memory circuit, without requiring additional tracking of the indicator by the memory circuit or memory controller, in some embodiments.

Abstract: One or more computer processors identify a string within source code associated with a program integrated interface (PII). The one or more computer processors compare the identified string to a string entry comprised in a PII dictionary. The one or more computer processors, responsive to a match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable based on a classification associated with the string entry. The one or more computer processors, responsive to a non-match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable utilizing a hyperplane model trained with a margin (C) derived from unlimited search. The one or more computer processors, responsive to a classified translatable string, translate the classified translatable string.

Abstract: A method of fabricating a semiconductor device is described. A plurality of semiconductor fins is formed in a first region on a substrate. An isolation region is formed around the plurality of semiconductor fins. Dummy fins are formed extending above the isolation region and laterally adjacent the plurality of semiconductor fins. A first etch is performed to etch the plurality of semiconductor fins such that a top surface of the plurality of semiconductor fins has a same height as a top surface of the isolation region. A second etch is performed selectively etching the isolation region to form a first recess in the isolation region laterally adjacent the semiconductor fins. A third etch is performed selectively etching the plurality of semiconductor fins to remove the plurality of semiconductor fins and to etch a second recess through the isolation region into the semiconductor substrate.

Abstract: Techniques are disclosed relating to improving memory reliability. In some embodiments, memory circuitry includes memory cells configured to store data, interface circuitry, and on-die error correcting code (ECC) circuitry. The ECC circuitry may check read data from the memory cells for errors and correct detected correctable errors to generate corrected data. The memory circuitry may provide read data to a requesting circuit via the interface circuitry, including one or more sets of corrected data from the on-die ECC circuitry. The memory circuitry may provide a decoding status flag (DSF) via the interface circuitry, including to: set the DSF to a first value in response to no error being detected for a given set of provided read data, set the DSF to a second value in response to a correctable error that was detected and corrected by the on-die ECC circuitry to provide a given set of read data, and set the DSF to a third value in response to an uncorrectable error detected by the on-die ECC circuitry.

Abstract: An apparatus includes components, a distributed timebase circuit, an interface and a Time Synchronization Circuit (TSC). The timebase circuit is configured to provide local timebases in physical proximity to the components, and synchronize the local timebases to a global timebase so as to provide a consistent time measurement. The interface is configured to be coupled to one or more devices. Transmissions on the interface are logically divided into a plurality of frames. Time on the interface is defined based on a frame number identifying a particular frame. The TSC is configured to capture a first timestamp based on the frame number corresponding to a point in time on the interface, and to concurrently capture a second timestamp based on a local timebase corresponding to the point in time, wherein the first timestamp and the second timestamp correlate time on the interface to the consistent time measurement.

Abstract: One or more computer processors identify a string within source code associated with a program integrated interface (PII). The one or more computer processors compare the identified string to a string entry comprised in a PII dictionary. The one or more computer processors, responsive to a match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable based on a classification associated with the string entry. The one or more computer processors, responsive to a non-match between the identified string and the string entry in the PII dictionary, classify the identified string as translatable or non-translatable utilizing a hyperplane model trained with a margin (C) derived from unlimited search. The one or more computer processors, responsive to a classified translatable string, translate the classified translatable string.

Abstract: An anchored cut-metal gate (CMG) plug, a semiconductor device including the anchored CMG plug and methods of forming the semiconductor device are disclosed herein. The method includes performing a series of etching processes to form a trench through a metal gate electrode, through an isolation region, and into a semiconductor substrate. The trench cuts-through and separates the metal gate electrode into a first metal gate and a second metal gate and forms a recess in the semiconductor substrate. Once the trench has been formed, a dielectric plug material is deposited into the trench to form a CMG plug that is anchored within the recess of the semiconductor substrate and separates the first and second metal gates. As such, the anchored CMG plug provides high levels of resistance to reduce leakage current within the semiconductor device during operation and allowing for improved V-trigger performance of the semiconductor device.

Abstract: Techniques are disclosed relating to improving memory reliability, e.g., in the context of memory circuits with limited reliability features. In some embodiments, memory controller circuitry is configured to communicate with memory circuitry via an interface that supports link error detection. The memory controller circuitry may, based on a corruption indicator, transmit a data and parity combination for the first data block that causes the memory circuitry to detect an uncorrectable write interface error. Subsequent reads of the location may therefore cause an uncorrectable error indication. This may advantageously allow the memory controller circuitry to propagate a corruption indicator as an uncorrectable error in the memory circuit, without requiring additional tracking of the indicator by the memory circuit or memory controller, in some embodiments.

Abstract: A magnetic distribution detection method includes the steps of providing a magnetic sensor and a sample, selecting a multiple of measuring points on the sample, sensing the measuring points by the magnetic sensor, obtaining a multiple of sense data and a series of the heights of the magnetic sensor from each measuring point, using a signal decomposition algorithm to convert these sense data into data groups, and selecting one of the data groups as the magnetic distribution data of the sample.

Abstract: An apparatus includes components, a distributed timebase circuit, an interface and a Time Synchronization Circuit (TSC). The timebase circuit is configured to provide local timebases in physical proximity to the components, and synchronize the local timebases to a global timebase so as to provide a consistent time measurement. The interface is configured to be coupled to one or more devices. Transmissions on the interface are logically divided into a plurality of frames. Time on the interface is defined based on a frame number identifying a particular frame. The TSC is configured to capture a first timestamp based on the frame number corresponding to a point in time on the interface, and to concurrently capture a second timestamp based on a local timebase corresponding to the point in time, wherein the first timestamp and the second timestamp correlate time on the interface to the consistent time measurement.

Abstract: Systems, apparatuses, and methods for saving power on a bus interface are described. A system includes a host, a device, and a repeater interposed between the host and the device. While the host and device are in a low-power state, the repeater monitors a first bus to determine if the device has woken up. When the repeater detects a remote wake-up event initiated by the device, the repeater generates an interrupt which is sent to the host. The host responds to the interrupt by initiating a resume wake-up event procedure that assumes the device is still asleep. In this way, the host is able to stay in the low-power state longer while also using a wake-up procedure that does not require the host to be aware of the existence of the repeater.

Abstract: A resistor with GaN structures, including a GaN layer with a 2DEG resistor region and an undoped polysilicon resistor region, an AlGaN barrier layer on the GaN layer in the 2DEG resistor region, multiple p-type doped GaN capping layers arranged on the AlGaN barrier layer so that the GaN layer not covered by the p-type doped GaN capping layers in the 2DEG resistor region is converted into a 2DEG resistor, a passivation layer on the GaN layer, and an undoped polysilicon layer on the passivation layer in the undoped polysilicon resistor region and functions as an undoped polysilicon resistor.

Abstract: A resistor-transistor-logic circuit with GaN structures, including a 2DEG resistor having a drain connected with an operating voltage, and a logic FET having a gate connected to an input voltage, a source grounded and a drain connected with a source of the 2DEG resistor and connected collectively to an output voltage.

Abstract: A resin composition and a resin film are provided. The resin composition includes a hardener and an epoxy resin monomer. The epoxy resin monomer has a structure represented by Formula (I) wherein A is substituted or unsubstituted C6-24 arylene group, C3-16 cycloalkylene group, C3-16 heteroarylene group, C3-16 alicyclic alkylene group, or divalent C6-25 alkylaryl group; X1 and X2 are independently Y1 and Y2 are independently substituted or unsubstituted C6-24 arylene group, and Y1 is different from Y2; and R1 is hydrogen, C1-8 alkyl group, or C1-8 alkoxy group, wherein the weight ratio of the curing agent to the epoxy resin monomer having a structure represented by Formula (I) is from 1:100 to 1:1.

Abstract: A system updating method and an electronic apparatus are provided. The electronic apparatus operates a first operating system (OS). In the method, an installation program is downloaded through an updater. The installation program includes one or more installation parameter used for an installation operation of target firmware. The target firmware includes a second OS. The installation operation is performed through the updater with the installation program according to the installation parameter provided by the installation program, to replace the first OS with the second OS. The installation program calls one or more function operated in the first OS and provided by the updater according to the installation parameter. Accordingly, the device utilization, installation efficiency, and installation flexibility may be increased.

Abstract: A recording system of brewing pour over coffee which comprises a touch screen, a robotic manipulator and a storage unit. The touch screen displays information, such as coffee drippers, water amounts, etc, thereon and for a user to input a process of brewing pour over coffee thereon. The touch screen allows the user to manage the status of the pour over coffee in real-time. The robotic manipulator equipped with a water injection unit, which moves the water injection unit according to the process of brewing pour over coffee to pour water to a coffee dripper simultaneously to make coffee. The storage unit stores data, such as a position where the water to be poured, a route of the process of brewing pour over coffee, a speed of the pouring motion and the required amount of water to be poured during the process of brewing pour over coffee.

Abstract: A resin compound has a structure represented by a chemical formula (I): In the chemical formula (I), each R1 independently represents a C1-C20 alkylene group or a C7-C40 alkylarylene group, and R1 are the same or different from each other; n independently represents an integer of 1-4; each R2 independently represents a C1-C20 alkyl group or a C2-C20 terminal alkenyl group, and R2 are the same or different from each other. When at least one of R1 represents a C1-C20 alkylene group, at least one of R2 is a C2-C20 terminal alkenyl group.

Abstract: The method for detecting mechanical and magnetic features comprises the steps of: aiming a probe of the sensor at a sample; defining several detected points for detection on the sample; detecting one of points and comprising the steps of: approaching the probe to the detected point from a predetermined height; contacting the probe with the detected point and applying a predetermined force on the detected point; making the probe far away from the detected point until to the predetermined height; shifting the probe to the next point for detection and repeating the detection; collecting the data of each of the detected points while the probe rapidly approaches to the points from the predetermined height; using a signal decomposition algorithm to transform the collected data to a plurality of data groups; and choosing a part of the data groups to be as data of feature distributions of the sample.

Abstract: A process of manufacturing an aluminum alloy workpiece includes a preparation step, in which an aluminum alloy sheet, a forming die, and a handling device are prepared; an aging and forming step including a heating substep for heating the aluminum alloy sheet to a first temperature, a transferring substep for transferring the aluminum alloy sheet to the die at a second temperature, and a forming and cooling substep for forming the aluminum alloy sheet into a target shape; and an aging out of forming die step, in which the formed aluminum alloy sheet is removed from the die, is heated to a third temperature, and undergoes another aging treatment to manufacture the aluminum alloy workpiece.