Patents by Inventor Yi-Chun Chen

Yi-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230168275
    Abstract: The method for detecting mechanical and magnetic features comprises the steps of: aiming a probe of the sensor at a sample; defining several detected points for detection on the sample; detecting one of points and comprising the steps of: approaching the probe to the detected point from a predetermined height; contacting the probe with the detected point and applying a predetermined force on the detected point; making the probe far away from the detected point until to the predetermined height; shifting the probe to the next point for detection and repeating the detection; collecting the data of each of the detected points while the probe rapidly approaches to the points from the predetermined height; using a signal decomposition algorithm to transform the collected data to a plurality of data groups; and choosing a part of the data groups to be as data of feature distributions of the sample.
    Type: Application
    Filed: February 25, 2022
    Publication date: June 1, 2023
    Applicant: National Cheng Kung University
    Inventors: Yi-Chun Chen, Yi-De Liou, Yi-Hsin Weng
  • Publication number: 20230160048
    Abstract: A process of manufacturing an aluminum alloy workpiece includes a preparation step, in which an aluminum alloy sheet, a forming die, and a handling device are prepared; an aging and forming step including a heating substep for heating the aluminum alloy sheet to a first temperature, a transferring substep for transferring the aluminum alloy sheet to the die at a second temperature, and a forming and cooling substep for forming the aluminum alloy sheet into a target shape; and an aging out of forming die step, in which the formed aluminum alloy sheet is removed from the die, is heated to a third temperature, and undergoes another aging treatment to manufacture the aluminum alloy workpiece.
    Type: Application
    Filed: October 17, 2022
    Publication date: May 25, 2023
    Inventors: Wan-Ling CHEN, Yi-Chun CHEN
  • Patent number: 11652005
    Abstract: An anchored cut-metal gate (CMG) plug, a semiconductor device including the anchored CMG plug and methods of forming the semiconductor device are disclosed herein. The method includes performing a series of etching processes to form a trench through a metal gate electrode, through an isolation region, and into a semiconductor substrate. The trench cuts-through and separates the metal gate electrode into a first metal gate and a second metal gate and forms a recess in the semiconductor substrate. Once the trench has been formed, a dielectric plug material is deposited into the trench to form a CMG plug that is anchored within the recess of the semiconductor substrate and separates the first and second metal gates. As such, the anchored CMG plug provides high levels of resistance to reduce leakage current within the semiconductor device during operation and allowing for improved V-trigger performance of the semiconductor device.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: May 16, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chun Chen, Ryan Chia-Jen Chen, Shu-Yuan Ku, Ya-Yi Tsai, I-Wei Yang
  • Publication number: 20230124210
    Abstract: An encoded substrate to be filmed by a camera device for generating an image is provided. The encoded substrate includes a plurality of grids arranged in a form of two-dimensional array, wherein each grid includes a first pattern and a second pattern not overlapped with each other. The first pattern corresponds to a first-dimensional encoded value, and the second pattern corresponds to a second-dimensional encoded value. The image is processed by a processor for scanning the plurality of grids. In a first-dimensional direction, the processor outputs a first coordinate according to at least two first patterns corresponding to at least two consecutive grids among the plurality of grids. In a second- dimensional direction, the processor outputs a second coordinate according to at least two second patterns corresponding to at least two consecutive grids among the plurality of grids.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 20, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tan-Chi HO, Yi-Chun CHEN, Wen TSUI
  • Patent number: 11631664
    Abstract: A resistor-transistor-logic (RTL) circuit with GaN structure, including a GaN layer, a AlGaN barrier layer on the GaN layer, multiple p-type doped GaN capping layers on the AlGaN barrier layer, wherein parts of the p-type doped GaN capping layers in a high-voltage region and in a low-voltage region convert the underlying GaN layer into gate depletion areas, the GaN layer not covered by the p-type doped GaN capping layers in a resistor region becomes a 2DEG resistor.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: April 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Te-Wei Yeh, Yi-Chun Chen
  • Publication number: 20230102899
    Abstract: A carbonate-containing epoxy resin and a manufacturing method for a carbonate-containing epoxy resin, an epoxy curable product and a method for degrading an epoxy curable product are provided. The carbonate-containing epoxy resin includes a structure represented by formula (I) or formula (II). Formula (I) and formula (II) are defined as in the specification.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 30, 2023
    Inventors: Ching-Hsuan LIN, Ren-Yu YEH, Yi-Chun CHEN, Meng-Wei WANG, Wen-Chang CHEN
  • Patent number: 11615518
    Abstract: A method for generating reconstruction a reconstructed image is adapted to an input image having a target object. The method comprises converting the input image into a feature map with vectors by an encoder; performing a training procedure according to training images of reference objects to generate feature prototypes associated with the training images and store the feature prototypes to a memory; selecting a part of feature prototypes from the feature prototypes stored in the memory according to similarities between the feature prototypes and the feature vectors; generating a similar feature map according the part of feature prototypes and weights, wherein the weights represents similarities between the part of feature prototypes and the feature vectors; and converting the similar feature map into the reconstructed image by a decoder; wherein the encoder, the decoder and the memory form an auto-encoder.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: March 28, 2023
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Daniel Stanley Young Tan, Yi-Chun Chen, Trista Pei-Chun Chen, Wei-Chao Chen
  • Publication number: 20230082266
    Abstract: An apparatus includes components, a distributed timebase circuit, an interface and a Time Synchronization Circuit (TSC). The timebase circuit is configured to provide local timebases in physical proximity to the components, and synchronize the local timebases to a global timebase so as to provide a consistent time measurement. The interface is configured to be coupled to one or more devices. Transmissions on the interface are logically divided into a plurality of frames. Time on the interface is defined based on a frame number identifying a particular frame. The TSC is configured to capture a first timestamp based on the frame number corresponding to a point in time on the interface, and to concurrently capture a second timestamp based on a local timebase corresponding to the point in time, wherein the first timestamp and the second timestamp correlate time on the interface to the consistent time measurement.
    Type: Application
    Filed: November 25, 2021
    Publication date: March 16, 2023
    Inventors: John H Kelm, Alexei E Kosut, Yi Chun Chen
  • Publication number: 20230078584
    Abstract: A magnetic distribution detection method includes the steps of providing a magnetic sensor and a sample, selecting a multiple of measuring points on the sample, sensing the measuring points by the magnetic sensor, obtaining a multiple of sense data and a series of the heights of the magnetic sensor from each measuring point, using a signal decomposition algorithm to convert these sense data into data groups, and selecting one of the data groups as the magnetic distribution data of the sample.
    Type: Application
    Filed: January 27, 2022
    Publication date: March 16, 2023
    Applicant: National Cheng Kung University
    Inventors: Yi-Chun Chen, Yi-De Liou, Guo-Wei Huang
  • Publication number: 20230061345
    Abstract: A semiconductor device includes a substrate; a first fin structure extending along a first lateral direction; a second fin structure extending along the first lateral direction; a first gate structure extending along a second lateral direction and straddles the first fin structure; a second gate structure extending along the second lateral direction and straddles the second fin structure. The semiconductor device further includes a dielectric cut structure that separates the first and second gate structures from each other. The dielectric cut structure extends into the substrate and comprises a first portion and a second portion. A width of the first portion along the second lateral direction increases with increasing depth into the substrate and a width of the second portion along the second lateral direction decreases with increasing depth into the substrate. The second portion is located below the first portion.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chun Chen, Jih-Jse Lin, Ryan Chia-Jen Chen
  • Publication number: 20230067752
    Abstract: A method of fabricating a semiconductor device is described. A plurality of semiconductor fins is formed in a first region on a substrate. An isolation region is formed around the plurality of semiconductor fins. Dummy fins are formed extending above the isolation region and laterally adjacent the plurality of semiconductor fins. A first etch is performed to etch the plurality of semiconductor fins such that a top surface of the plurality of semiconductor fins has a same height as a top surface of the isolation region. A second etch is performed selectively etching the isolation region to form a first recess in the isolation region laterally adjacent the semiconductor fins. A third etch is performed selectively etching the plurality of semiconductor fins to remove the plurality of semiconductor fins and to etch a second recess through the isolation region into the semiconductor substrate.
    Type: Application
    Filed: August 28, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Yi Tsai, Yi-Chun Chen, Wei-Han Chen, Wei-Ting Guo, Shu-Yuan Ku
  • Patent number: 11549286
    Abstract: A lock bar-on-slide rail style drawer antitipping safety device includes a cabinet body, a top drawer, at least one middle drawer, and at least one bottom drawer. The drawers are each provided with a sliding portion projecting from one side thereof. The cabinet body includes a vertical slide rail slidably mounted at one side that corresponds to the sliding portions. The vertical slide rail includes, in sequence from top to bottom, a first lock bar, a second lock bar, and a third lock bar slidably mounted thereto. Each of the first lock bar and the second lock bar is provided with a stop portion projecting from each of a top end and a bottom end thereof toward the corresponding sliding portion. The stop portions are provided to selectively block the sliding portions so as to prevent the drawers from accidentally sliding out or being opened simultaneously.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: January 10, 2023
    Inventor: Yi-Chun Chen
  • Publication number: 20220408881
    Abstract: A shoe accessory of a shoe adaptive for activating a bottom of a foot wearing the shoe is provided. The bottom of the foot has a forefoot, a heel, and an arch between the forefoot and the heel. The shoe accessory includes a main body and a plurality of stimulating elements mounted to the main body. Each of the stimulating elements is movable universally on the main body and is adapted to exert a pressing force on a non-fixed point of the bottom of the foot to stimulate the arch.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: Yi-Chun CHEN, Po-Hsiang HSIEH, Chin-Yuan TSAI
  • Patent number: 11517246
    Abstract: Disclosed herein is a method for diagnosing a neurological disorder based on at least one magnetic resonance imaging (MRI) image. The method includes identifying brain image regions that contain a respective portion of diffusion index values of at least one diffusion index. For each of the brain image regions, a characteristic parameter based on the respective portion of the diffusion index values is calculated. a diagnoses is then made for the brain using one of predetermined categories of the neurological disorder by performing classification on a combination of the characteristic parameters via a classifier.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: December 6, 2022
    Assignees: Chang Gung Memorial Hospital, Linkou, Chang GungUniversitv, Change Gung Medical Foundation Chang Gung Memorial Hospital at Keelung
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20220384269
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Publication number: 20220367664
    Abstract: A method of forming a gate structure includes forming an opening through an insulating layer and forming a first work function metal layer in the opening. The method also includes recessing the first work function metal layer into the opening to form a recessed first work function metal layer, and forming a second work function metal layer in the opening and over the first work function metal layer. The second work function metal layer lines and overhangs the recessed first work function metal layer.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Inventors: Yi-Chun Chen, Tsung Fan Yin, Li-Te Hsu, Ying Ting Hsia, Yi-Wei Chiu
  • Patent number: 11502076
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Patent number: 11437484
    Abstract: A method of forming a gate structure includes forming an opening through an insulating layer and forming a first work function metal layer in the opening. The method also includes recessing the first work function metal layer into the opening to form a recessed first work function metal layer, and forming a second work function metal layer in the opening and over the first work function metal layer. The second work function metal layer lines and overhangs the recessed first work function metal layer.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Chun Chen, Tsung Fan Yin, Li-Te Hsu, Ying Ting Hsia, Yi-Wei Chiu
  • Patent number: D975027
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 10, 2023
    Assignee: TIMOTION TECHNOLOGY CO., LTD.
    Inventor: Yi-Chun Chen
  • Patent number: D983839
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: April 18, 2023
    Assignee: TIMOTION TECHNOLOGY CO., LTD.
    Inventor: Yi-Chun Chen