Patents by Inventor Yi-Fan Chen

Yi-Fan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230377914
    Abstract: An annealing apparatus includes: a first chamber including a first gas having a first gas pressure; a second chamber configured to receive a second gas having a second gas pressure; gas inlets; gas vents; heating elements laterally surrounding the first chamber; and a controller configured to perform the steps of: heating the first chamber while keeping a gas pressure difference between the first gas pressure and the second gas pressure is within a tolerance limit; and cooling the first chamber by exchanging the second gas in the second chamber while keeping the gas pressure difference within the tolerance limit, wherein the exchanging of the second gas includes introducing the second gas to the second chamber through the plurality of gas inlets and exhausting a the second gas out of the second chamber through the plurality of gas vents while keeping the second gas pressure unchanged.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 23, 2023
    Inventors: YI-FAN CHEN, SEN-HONG SYUE, HUICHENG CHANG, YEE-CHIA YEO
  • Publication number: 20230367631
    Abstract: The present disclosure relates to computer-implemented systems and methods for sharing, managing, and executing computer simulations via a simulation service. In one particular embodiment, the simulation service is stored and executed on a remote computing device wherein the simulation service and remote computing device are configured to interface with client devices or programs. In some instances, input data and configuration parameters may be sent from the client devices or programs to the remote computing device to execute a given computer simulation, and the results may be returned to the client devices or programs as they become available.
    Type: Application
    Filed: May 13, 2022
    Publication date: November 16, 2023
    Inventors: Aradhya Biswas, Yi-Fan Chen
  • Publication number: 20230369442
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Wen-Yen Huang, Shih-Min Chou, Zhen Wu, Nien-Ting Ho, Chih- Chiang Wu, Ti-Bin Chen
  • Publication number: 20230369441
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Wen-Yen Huang, Shih-Min Chou, Zhen Wu, Nien-Ting Ho, Chih-Chiang Wu, Ti-Bin Chen
  • Patent number: 11817782
    Abstract: An inverter device includes a converter circuit and a filter. The converter circuit converts a DC input voltage into an AC intermediate voltage based on six control signals, and includes first and second converters. Each of the first and second converters includes three switches, two diodes and a coupled inductor circuit. The switches of the first converter operate respectively based on three of the control signals. The switches of the second converter operate respectively based on the other three of the control signals. The filter filters the AC intermediate voltage to generate an AC output voltage.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: November 14, 2023
    Assignee: I SHOU UNIVERSITY
    Inventors: Chien-Hsuan Chang, Yi-Fan Chen
  • Patent number: 11801834
    Abstract: A vehicle positioning method via data fusion and a system using the same are disclosed. The method is performed in a processor electrically connected to a self-driving-vehicle controller and multiple electronic systems. The method is to perform a delay correction according to a first real-time coordinate, a second real-time coordinate, real-time lane recognition data, multiple vehicle dynamic parameters, and multiple vehicle information received from the multiple electronic systems with their weigh values, to generate a fusion positioning coordinate, and to determine confidence indexes. Then, the method is to output the first real-time coordinate, the second real-time coordinate, and the real-time lane recognition data that are processed by the delay correction, the fusion positioning coordinate, and the confidence indexes to the self-driving-vehicle controller for a self-driving operation.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: October 31, 2023
    Assignee: Automotive Research & Testing Center
    Inventors: Tong-Kai Jhang, Jin-Yan Hsu, You-Sian Lin, Ji-Fan Yang, Chien-Hung Yu, Yi-Zhao Chen
  • Publication number: 20230326518
    Abstract: A memory device and an operation method thereof are provided. The memory device includes memory cells, each having a static random access memory (SRAM) cell and a non-volatile memory cell. The SRAM cell is configured to store complementary data at first and second storage nodes. The non-volatile memory cell is configured to replicate and retain the complementary data before the SRAM cell loses power supply, and to rewrite the replicated data to the first and second storage nodes of the SRAM cell after the power supply of the SRAM cell is restored.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jer-Fu Wang, Hung-Li Chiang, Yi-Tse Hung, Tzu-Chiang Chen, Meng-Fan Chang
  • Patent number: 11782256
    Abstract: An endoscope imager includes a system-in-package and a specularly reflective surface. The system-in-package includes (a) a camera module having an imaging lens with an optical axis and (b) an illumination unit. The system-in-package includes (a) a camera module having an imaging lens with an optical axis and (b) an illumination unit configured to emit illumination propagating in a direction away from the imaging lens, the direction having a component parallel to the optical axis. The specularly reflective surface faces the imaging lens and forming an oblique angle with the optical axis, to deflect the illumination toward a scene and deflect light from the scene toward the camera module.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: October 10, 2023
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yi-Fan Lin, Wei-Ping Chen, Jau-Jan Deng, Suganda Jutamulia
  • Publication number: 20230315177
    Abstract: Example implementations relate to power supplied to ports based on charge amounts. In some examples, a computing device can include a charge storage device, an I/O port, and a processor, where the processor is to determine a charge amount of the charge storage device and an operating mode of the computing device, and determine an amount of power to be supplied to the I/O port based on the charge amount and the operating mode.
    Type: Application
    Filed: September 1, 2020
    Publication date: October 5, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: YI-FAN HSIA, SHAO-YU CHIANG, HUNG LUNG CHEN
  • Patent number: 11776814
    Abstract: Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: October 3, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hongfa Luan, Yi-Fan Chen, Chun-Yen Peng, Cheng-Po Chau, Wen-Yu Ku, Huicheng Chang
  • Publication number: 20230299175
    Abstract: A method of forming a semiconductor device includes forming a sacrificial gate structure over a substrate, depositing a spacer layer on the sacrificial gate structure in a conformal manner, performing a multi-step oxidation process to the spacer layer, etching the spacer layer to form gate sidewall spacers on opposite sidewalls of the sacrificial gate structure, removing the sacrificial gate structure to form a trench between the gate sidewalls spacers, and forming a metal gate structure in the trench.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 21, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Rui CHEN, Yi-Fan CHEN, Szu-Ying CHEN, Sen-Hong SYUE, Huicheng CHANG, Yee-Chia YEO
  • Patent number: 11764277
    Abstract: A method for manufacturing a semiconductor structure includes forming a fin over a substrate, wherein the fin includes first semiconductor layers and second semiconductor layers alternating stacked. The method also includes forming an isolation feature around the fin, forming a dielectric feature over the isolation feature, forming a cap layer over the fin and the dielectric feature, oxidizing the cap layer to form an oxidized cap layer, forming source/drain features passing through the cap layer and in the fin, removing the second semiconductor layers in the fin to form nanostructures, and forming a gate structure wrapping around the nanostructures.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Fan Peng, Yuan-Ching Peng, Yu-Bey Wu, Yu-Shan Lu, Ying-Yan Chen, Yi-Cheng Li, Szu-Ping Lee
  • Patent number: 11757016
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a first region and a second region, forming a first bottom barrier metal (BBM) layer on the first region and the second region, forming a first work function metal (WFM) layer on the first BBM layer on the first region and the second region, and then forming a diffusion barrier layer on the first WFM layer.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: September 12, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Wen-Yen Huang, Shih-Min Chou, Zhen Wu, Nien-Ting Ho, Chih-Chiang Wu, Ti-Bin Chen
  • Patent number: 11715497
    Abstract: A video editing method, apparatus and storage medium are provided. The method includes obtaining an object, the object including one or more images; determining a content element of the object for video editing, the content element having a content type identifier; determining a material set identifier corresponding to the content type identifier according to a first behavior tree logic; determining a video editing material set corresponding to the material set identifier; and obtaining an edited video according to the content element and the video editing material set.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: August 1, 2023
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Xiao Long Zhu, Shenghui Huang, Lijian Mei, Wei Dong Chen, Shao Bin Lin, Yi Tong Wang, Xing Ji, Jie Fan, Min Luo, Wanyu Huang, Yuan Fang, Ren Jian Chen
  • Publication number: 20230237153
    Abstract: An example computing device comprises: a media capture device to capture media; a pin coupled to the media capture device to communicate an unlock signal to the media capture device; and a basic input/output system interconnected with the pin, wherein, to control activation of the media capture device, the basic input/output system is to: store an authentication parameter, receive, from the media capture device, an unlock request; in response to the unlock request, verify an authentication input against the authentication parameter, and in response to a successful verification, send the unlock signal to unlock the media capture device via the pin.
    Type: Application
    Filed: July 22, 2020
    Publication date: July 27, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: YI-FAN HSIA, CHIH-KAI CHANG, HUNG-LUNG CHEN, CHIA-CHENG LIN, HSIN-JEN LIN, HENG-FU CHANG
  • Patent number: 11705492
    Abstract: A first gate and a second gate are formed on a substrate with a gap between the first and second gates. The first gate has a first sidewall. The second gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: July 18, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Kuo-Chin Hung, Wen-Yi Teng, Ti-Bin Chen
  • Publication number: 20230225132
    Abstract: A memory structure includes a substrate. The memory structure further includes a first transistor, wherein the first transistor is a first distance from the substrate. The memory structure further includes a second transistor, wherein the second transistor is a second distance from the substrate, and the first distance is different from the second distance, and a first source/drain (S/D) region of the first transistor is connected to a second S/D region of the second transistor. The memory structure further includes a plurality of storage elements electrically connected to both the first transistor and the second transistor, wherein each of the plurality of storage elements is a third distance from the substrate, and the third distance is different from both the first distance and the second distance.
    Type: Application
    Filed: April 22, 2022
    Publication date: July 13, 2023
    Inventors: Hung-Li CHIANG, Jer-Fu WANG, Yi-Tse HUNG, Tzu-Chiang CHEN, Meng-Fan CHANG, Hon-Sum Philip WONG
  • Patent number: 11693492
    Abstract: A mouse is provided. The mouse includes a casing, a circuit board, a micro switch base, and a micro switch. The casing includes a button. The circuit board is disposed in the casing. The micro switch base is disposed on the circuit board, and includes a plurality of first openings and a plurality of second openings. The micro switch is fixed on the micro switch base through at least one of the first openings, and electrically connected to the circuit board through the first openings or the second openings.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: July 4, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chi-Fan Chen, Yi-Chung Chiu, Chen-Hou Lo
  • Publication number: 20230192080
    Abstract: A vehicle positioning method via data fusion and a system using the same are disclosed. The method is performed in a processor electrically connected to a self-driving-vehicle controller and multiple electronic systems. The method is to perform a delay correction according to a first real-time coordinate, a second real-time coordinate, real-time lane recognition data, multiple vehicle dynamic parameters, and multiple vehicle information received from the multiple electronic systems with their weigh values, to generate a fusion positioning coordinate, and to determine confidence indexes. Then, the method is to output the first real-time coordinate, the second real-time coordinate, and the real-time lane recognition data that are processed by the delay correction, the fusion positioning coordinate, and the confidence indexes to the self-driving-vehicle controller for a self-driving operation.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: TONG-KAI JHANG, JIN-YAN HSU, YOU-SIAN LIN, JI-FAN YANG, CHIEN-HUNG YU, YI-ZHAO CHEN
  • Patent number: D1001807
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: October 17, 2023
    Assignee: PEGATRON CORPORATION
    Inventors: Hsiao-Fan Chen, Hui-Chen Wang, Yi-Chun Tang, Hung-Yun Wu, Ching-Yen Huang