Patents by Inventor Yi-Hsien Chang

Yi-Hsien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10273140
    Abstract: A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsien Chang, Tzu-Heng Wu, Chun-Ren Cheng, Shih-Wei Lin, Jung-Kuo Tu
  • Publication number: 20190101531
    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 4, 2019
    Inventors: Chia-Hua Chu, Allen Timothy Chang, Ching-Ray Chen, Yi-Hsien Chang, Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20190033252
    Abstract: A bioFET device includes a semiconductor substrate having a first surface and an opposite, parallel second surface and a plurality of bioFET sensors on the semiconductor substrate. Each of the bioFET sensors includes a gate formed on the first surface of the semiconductor substrate and a channel region formed within the semiconductor substrate beneath the gate and between source/drain (S/D) regions in the semiconductor substrate. The channel region includes a portion of the second surface of the semiconductor substrate. An isolation layer is disposed on the second surface of the semiconductor substrate. The isolation layer has an opening positioned over the channel region of more than one bioFET sensor of the plurality of bioFET sensors. An interface layer is disposed on the channel region of the more than one bioFET sensor in the opening.
    Type: Application
    Filed: July 27, 2017
    Publication date: January 31, 2019
    Inventors: Jui-Cheng HUANG, Yi-Hsien CHANG, Chin-Hua WEN, Chun-Ren CHENG, Shih-Fen HUANG, Tung-Tsun CHEN, Yu-Jie HUANG, Ching-Hui LIN, Sean CHENG, Hector CHANG
  • Patent number: 10145847
    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: December 4, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Allen Timothy Chang, Ching-Ray Chen, Yi-Hsien Chang, Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 10101295
    Abstract: A semiconductor device including a biosensor with an on-chip reference electrode embedded within the semiconductor device, and associated manufacturing methods are provided. In some embodiments, a pair of source/drain regions is disposed within a device substrate and separated by a channel region. An isolation layer is disposed over the device substrate. A sensing well is disposed from an upper surface of the isolation layer overlying the channel region. A bio-sensing film is disposed along the upper surface of the isolation layer and extended along sidewall and lower surfaces of the sensing well. A reference electrode is disposed vertically between the bio-sensing film and the isolation layer.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: October 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Shih-Fen Huang, Ching-Hui Lin
  • Patent number: 10077187
    Abstract: A semiconductor manufacturing method includes providing a wafer. A layer is formed over a surface of the wafer where the layer is able to form a eutectic layer with a conductive element. The layer is partially removed so as to form a plurality of mesas. The wafer is bonded to a substrate through the plurality of mesas. The substrate is thinned down to a thickness so as to be less than a predetermined value.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: September 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Li-Chen Yen, Yi-Hsien Chang, Chun-Ren Cheng
  • Publication number: 20180172627
    Abstract: A semiconductor device including a biosensor with an on-chip reference electrode embedded within the semiconductor device, and associated manufacturing methods are provided. In some embodiments, a pair of source/drain regions is disposed within a device substrate and separated by a channel region. An isolation layer is disposed over the device substrate. A sensing well is disposed from an upper surface of the isolation layer overlying the channel region. A bio-sensing film is disposed along the upper surface of the isolation layer and extended along sidewall and lower surfaces of the sensing well. A reference electrode is disposed vertically between the bio-sensing film and the isolation layer.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Shih-Fen Huang, Ching-Hui Lin
  • Publication number: 20180141800
    Abstract: A method includes the following operations: forming a piezoelectric substrate including a piezoelectric structure and a conductive contact structure, in which the piezoelectric structure has a conductive layer and a piezoelectric layer in contact with the conductive layer, and the conductive contact structure is electrically connected to the piezoelectric structure and protrudes beyond a principal surface of the piezoelectric substrate; forming a semiconductor substrate having a conductive receiving feature and a semiconductor device electrically connected thereto; aligning the conductive contact structure of the piezoelectric substrate with the conductive receiving feature of the semiconductor substrate; and bonding the piezoelectric substrate with the semiconductor substrate such that the conductive contact structure is in contact with the conductive receiving feature.
    Type: Application
    Filed: January 3, 2018
    Publication date: May 24, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Ren CHENG, Richard YEN, Yi-Hsien CHANG, Wei-Cheng SHEN
  • Patent number: 9976983
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes an electro-wetting-on-dielectric (EWOD) device. The EWOD device includes a top portion over a bottom portion and a channel gap between the top portion and the bottom portion. The bottom portion includes a driving dielectric layer over a first electrode, a second electrode and a first separating portion of an ILD layer between the first electrode and a second electrode. The driving dielectric layer has a first thickness less than about 1,000 ?. An EWOD device with a driving dielectric layer having a first thickness less 1000 ? requires a lower applied voltage to alter a shape of a droplet within the device and has a longer operating life than an EWOD device that requires a higher applied voltage to alter the shape of the droplet.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yi-Hsien Chang, Chun-Ren Cheng
  • Patent number: 9968927
    Abstract: The present disclosure relates to an integrated chip having an integrated optical bio-sensor, and an associated method of fabrication. In some embodiments, the integrated optical bio-sensor has a sensing device arranged within a semiconductor substrate. An optical waveguide structure is located over a first side of the semiconductor substrate at a position over the sensing device. A dielectric structure is disposed onto the optical waveguide structure at a position that separates the optical waveguide structure from a sample retention area configured to receive a sample solution.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 15, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shao Liu, Emerson Cheng, Yi-Hsien Chang, Chun-Ren Cheng, Ching-Ray Chen, Alex Kalnitsky, Allen Timothy Chang
  • Patent number: 9958443
    Abstract: Dual-gate ion-sensitive field effect transistors (ISFETs) for disease diagnostics are disclosed herein. An exemplary dual-gate ISFET includes a gate structure and a fluidic gate structure disposed over opposite surfaces of a device substrate. The gate structure is disposed over a channel region defined between a source region and a drain region in the device substrate. The fluidic gate structure includes a sensing well that is disposed over the channel region. The sensing well includes a sensing layer and an electrolyte solution. The electrolyte solution includes a constituent that can react with a product of an enzymatic reaction that occurs when an enzyme-modified detection mechanism detects an analyte. The sensing layer can react with a first ion generated from the enzymatic reaction and a second ion generated from a reaction between the product of the enzymatic reaction and the constituent, such that the dual-gate ISFET generates an enhanced electrical signal.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: May 1, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Yi-Hsien Chang
  • Patent number: 9933388
    Abstract: The present disclosure relates to an integrated chip having an integrated bio-sensor with horizontal and vertical sensing surfaces. In some embodiments, the integrated chip has a sensing device disposed within a substrate, and a lower metal wire over the substrate and electrically coupled to the sensing device. First and second metal vias are arranged on the lower metal wire at locations set back from sidewalls of the lower metal wire, and first and second upper metal wires respectively cover top surfaces of the first and second metal vias. A dielectric structure surrounds the lower metal wire, the first and second metal vias, and the first and second upper metal wires. A sensing well has sensing surfaces that extend along an upper surface of the lower metal wire and along sidewalls of the first and second metal vias and the first and second upper metal wires.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: April 3, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Fei-Lung Lai, Chia-Hua Chu, Yi-Hsien Chang, Hsin-Chieh Huang
  • Patent number: 9862592
    Abstract: A MEMS transducer includes a first substrate and a second substrate facing the first substrate. The first substrate includes a piezoelectric diaphragm and a conductive contact structure. The conductive contact structure is electrically connected to the piezoelectric diaphragm, and protrudes beyond a principal surface of the first substrate. The second substrate includes a conductive receiving feature and an active device. The conductive receiving feature is aligned with and further bonded to the conductive contact structure. The active device is electrically connected to the piezoelectric diaphragm through the conductive receiving feature and the conductive contact structure.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: January 9, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Ren Cheng, Richard Yen, Yi-Hsien Chang, Wei-Cheng Shen
  • Publication number: 20170343498
    Abstract: A biosensor with a heater embedded therein is provided. A semiconductor substrate comprises a source region and a drain region. The heater is under the semiconductor substrate. A sensing well is over the semiconductor substrate, laterally between the source region and the drain region. A sensing layer lines the sensing well. A method for manufacturing the biosensor is also provided.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 30, 2017
    Inventors: Alexander Kalnitsky, Yi-Hsien Chang, Chun-Ren Cheng, Jui-Cheng Huang, Shih-Fen Huang, Tung-Tsun Chen, Ching-Hui Lin
  • Publication number: 20170341933
    Abstract: A method of fabricating a semiconductor structure includes: providing a first wafer, providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: WEI-CHENG SHEN, YI-HSIEN CHANG, YI-HENG TSAI, CHUN-REN CHENG
  • Patent number: 9815685
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures, a membrane disposed opposite to the plate and including a plurality of corrugations facing the plurality of apertures, and a conductive plug extending from the plate through the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate is an epitaxial (EPI) silicon layer or a silicon-on-insulator (SOI) substrate.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: November 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi-Hsien Chang, Chun-Wen Cheng, Chun-Ren Cheng, Shih-Wei Lin, Wei-Cheng Shen
  • Patent number: 9810689
    Abstract: Dual-gate ion-sensitive field effect transistors (ISFETs) for disease diagnostics are disclosed herein. An exemplary dual-gate ISFET includes a gate structure and a fluidic gate structure disposed over opposite surfaces of a device substrate. The gate structure is disposed over a channel region defined between a source region and a drain region in the device substrate. The fluidic gate structure includes a sensing well that is disposed over the channel region. The sensing well includes a sensing layer and an electrolyte solution. The electrolyte solution includes a constituent that can react with a product of an enzymatic reaction that occurs when an enzyme-modified detection mechanism detects an analyte. The sensing layer can react with a first ion generated from the enzymatic reaction and a second ion generated from a reaction between the product of the enzymatic reaction and the constituent, such that the dual-gate ISFET generates an enhanced electrical signal.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: November 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Yi-Hsien Chang
  • Publication number: 20170315085
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.
    Type: Application
    Filed: July 14, 2017
    Publication date: November 2, 2017
    Inventors: Yi-Shao LIU, Chun-Ren CHENG, Ching-Ray CHEN, Yi-Hsien CHANG, Fei-Lung LAI, Chun-Wen CHENG
  • Publication number: 20170227533
    Abstract: Dual-gate ion-sensitive field effect transistors (ISFETs) for disease diagnostics are disclosed herein. An exemplary dual-gate ISFET includes a gate structure and a fluidic gate structure disposed over opposite surfaces of a device substrate. The gate structure is disposed over a channel region defined between a source region and a drain region in the device substrate. The fluidic gate structure includes a sensing well that is disposed over the channel region. The sensing well includes a sensing layer and an electrolyte solution. The electrolyte solution includes a constituent that can react with a product of an enzymatic reaction that occurs when an enzyme-modified detection mechanism detects an analyte. The sensing layer can react with a first ion generated from the enzymatic reaction and a second ion generated from a reaction between the product of the enzymatic reaction and the constituent, such that the dual-gate ISFET generates an enhanced electrical signal.
    Type: Application
    Filed: April 28, 2017
    Publication date: August 10, 2017
    Inventors: Ching-Hui Lin, Chun-Ren Cheng, Shih-Fen Huang, Yi-Hsien Chang
  • Publication number: 20170217769
    Abstract: A semiconductor manufacturing method includes providing a wafer. A layer is formed over a surface of the wafer where the layer is able to form a eutectic layer with a conductive element. The layer is partially removed so as to form a plurality of mesas. The wafer is bonded to a substrate through the plurality of mesas. The substrate is thinned down to a thickness so as to be less than a predetermined value.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 3, 2017
    Inventors: LI-CHEN YEN, YI-HSIEN CHANG, CHUN-REN CHENG