Patents by Inventor Yi-Hung Lin
Yi-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8828850Abstract: A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio.Type: GrantFiled: February 18, 2011Date of Patent: September 9, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Hung Cheng, Chii-Horng Li, Tze-Liang Lee, Yi-Hung Lin
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Publication number: 20140220085Abstract: In an embodiment of the disclosure, a biomedical material is provided. The biomedical material includes a biocompatible material having a surface and a carrier distributed over the surface of the biocompatible material, wherein both of the biocompatible material and the carrier have no charges, one of them has charges or both of them have charges with different electricity. The biomedical material is utilized for dentistry, orthopedics, wound healing or medical beauty and applied in the repair and regeneration of various soft and hard tissues.Type: ApplicationFiled: April 11, 2014Publication date: August 7, 2014Applicant: Industrial Technology Research InstituteInventors: Pei-Yi TSAI, Yi-Hung WEN, Zhi-Jie HUANG, Pei-Shan LI, Hsin-Hsin SHEN, Yi-Hung LIN, Chih-Hung CHEN
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Publication number: 20140196782Abstract: Disclosed is a method for yield enhancement of making a semiconductor device. The method for yield enhancement of making a semiconductor device comprises the steps of: providing the semiconductor device comprising an epitaxial layer including a defect; forming a dielectric layer on the epitaxial layer; detecting and identifying a location of the defect; and etching the dielectric layer and leaving a part of the dielectric layer to cover an area substantially corresponding to the detected defect. The semiconductor device made by the method is also disclosed.Type: ApplicationFiled: January 10, 2014Publication date: July 17, 2014Applicant: EPISTAR CORPORATIONInventors: Yi Hung LIN, Yu Chih YANG, Wu Tsung LO
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Publication number: 20140150858Abstract: An optoelectronic device comprises an optoelectronic semiconductor stack layer; a conductive layer on the optoelectronic semiconductor stack layer, the conductive layer comprising a top surface, a bottom surface opposite to the top surface, and a side surface; a first barrier layer covering the top surface; a second barrier layer covering the bottom surface; and a first metal oxide layer, wherein the first metal oxide layer covers the side surface, the first barrier layer, and the second barrier layer.Type: ApplicationFiled: December 4, 2012Publication date: June 5, 2014Applicant: Epistar CorporationInventors: Yi-Hung Lin, Cheng-Hong Chen
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Patent number: 8678185Abstract: A tool box contains a body including a receiving area formed therein and a stop area, the body also including two slots defined on two opposite sides thereof, and each slot having a cutout defined on a top end thereof and communicating therewith; a cover including two retaining portions arranged on one end thereof and sliding in the two slots, and each retaining portion having a locking recess defined on a bottom end thereof, the cover also including two projections mounted on two inner surfaces thereof; a stopping unit secured in the stop area of the body and moving between an engaging position and a releasing position of the body.Type: GrantFiled: December 6, 2012Date of Patent: March 25, 2014Inventor: Yi-Hung Lin
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Patent number: 8650991Abstract: A ratchet wrench includes a handle; a wrench head comprising a first cavity and a second cavity communicating therewith; a drive gear and socket combination rotatably disposed in the first cavity and comprising surface teeth; a reversing pawl comprising pawl teeth on one surface, the pawl teeth meshed with the teeth of the drive gear and socket; a pivotal unit pivotably disposed in the second cavity, the pivotal unit urging against the other surface of the reversing pawl and being adapted to reciprocally pivot about the reversing pawl; and a reversing button assembly moveably disposed on the wrench hand and aligned with an axial direction of the handle. The reversing button assembly is adapted to manually move along a straight line to activate the pivotal unit which pivots the reversing pawl so as to permit the drive gear and socket combination to rotate clockwise or counterclockwise.Type: GrantFiled: April 29, 2011Date of Patent: February 18, 2014Inventor: Yi-Hung Lin
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Patent number: 8648810Abstract: An integrated input apparatus includes a panel, a sensing layer, a backlight layer, and a bottom layer. The panel includes a plurality of hot key patterns, a typing key group pattern, a cursor control pattern, and a response key pattern (a left key and a right key). When anyone of the hot key patterns, the typing key group pattern, the cursor control pattern, or the response key pattern is touched, a sensing control signal is sensed by the sensing layer and sent to a computer host for further processing.Type: GrantFiled: February 14, 2011Date of Patent: February 11, 2014Assignee: Ko Ja (Cayman) Co., Ltd.Inventors: Yi-Hung Lin, Chih-Yung Chen, Yu-Kai Lin
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Publication number: 20140001509Abstract: An optoelectronic semiconductor device includes: an optoelectronic semiconductor stack including an upper surface; and a metal electrode structure formed on the optoelectronic semiconductor stack, wherein the metal electrode structure comprises a side surface including oxidized metal formed by oxidizing the metal electrode structure.Type: ApplicationFiled: June 27, 2012Publication date: January 2, 2014Applicant: EPISTAR CORPORATIONInventors: Yi-Hung Lin, Cheng-Hong Chen, Shih-Chang Lee
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Patent number: 8614190Abstract: Thermal responsive compositions for treating bone diseases are provided. The thermal responsive composition for treating bone diseases includes a bone growth factor and a biodegradable copolymer. The biodegradable copolymer has a structure of Formula (I) or Formula (II): A-B-BOX-B-A??Formula (I) B-A-B-(BOX-B-A-B)n-BOX-B-A-B??Formula (II) wherein, A includes a hydrophilic polyethylene glycol polymer, B includes a hydrophobic polyester polymer, BOX is a bifunctional group monomer of 2, 2?-Bis(2-oxazoline) and used for coupling the blocks A-B or B-A-B, and n is an integer and the same or more than 0.Type: GrantFiled: June 29, 2011Date of Patent: December 24, 2013Assignee: Industrial Technology Research InstituteInventors: Shen-Hua Peng, Hsin-Hsin Shen, Liang-Yo Yang, Meng-Yow Hsieh, Pei-Shan Li, Wei-Lin Yu, Tsai-Yu Lin, Po-Liang Lai, Jui-Sheng Sun, Chih-Hung Chang, Yi-Hung Lin
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Publication number: 20130298972Abstract: A method for manufacturing an optoelectronic device includes steps of: providing an optoelectronic structure; forming a first contact layer having a pattern on the upper surface of the optoelectronic structure; forming a dielectric layer on the first contact layer and the optoelectronic structure; removing the dielectric layer on the first contact layer; and forming an electrode structure on the first contact layer.Type: ApplicationFiled: May 11, 2012Publication date: November 14, 2013Applicant: EPISTAR CORPORATIONInventors: Yi-Hung Lin, Yu-Chih Yang, Wu-Tsung Lo
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Patent number: 8569162Abstract: A conductive bump structure is formed on a substrate having a plurality of bonding pads and a first insulating layer thereon. The first insulating layer has a plurality of openings formed therein for exposing the bonding pads and a conductive post is formed on the bonding pads exposed through the openings. Therein, a gap is formed between the conductive post and the wall of the opening such that no contact occurs between the conductive post and the first insulating layer, thereby preventing delamination of the conductive bump structure caused by stresses concentrating on an interface of different materials as in the prior art.Type: GrantFiled: October 3, 2012Date of Patent: October 29, 2013Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Feng-Lung Chien, Yi-Hung Lin, Yi-Hsin Chen
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Publication number: 20130277760Abstract: A FinFET device may include a dummy FinFET structure laterally adjacent an active FinFET structure to reduce stress imbalance and the effects of stress imbalance on the active FinFET structure. The FinFET device comprises an active FinFET comprising a plurality of semiconductor fins, and a dummy FinFET comprising a plurality of semiconductor fins. The active FinFET and the dummy FinFET are laterally spaced from each other by a spacing that is related to the fin pitch of the active FinFET.Type: ApplicationFiled: April 24, 2012Publication date: October 24, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Shen Lu, Chih-Tang Peng, Tai-Chun Huang, Pei-Ren Jeng, Hao-Ming Lien, Yi-Hung Lin, Tze-Liang Lee, Syun-Ming Jang
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Publication number: 20130256292Abstract: A honey cone heater includes a lamp housing having an outer edge that forms a partial circle. The lamp housing has an opening extending from a top surface to a bottom surface of the lamp housing. The opening further extends from the outer edge into a center region of the lamp housing. A plurality of lamps is distributed throughout the lamp housing, and is configured to emit light out of the top surface of the lamp housing.Type: ApplicationFiled: March 30, 2012Publication date: October 3, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Hung Lin, Jr-Hung Li, Chii-Horng Li, Tze-Liang Lee
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Publication number: 20130249082Abstract: A conductive bump structure is formed on a substrate having a plurality of bonding pads and a first insulating layer thereon. The first insulating layer has a plurality of openings formed therein for exposing the bonding pads and a conductive post is formed on the bonding pads exposed through the openings. Therein, a gap is formed between the conductive post and the wall of the opening such that no contact occurs between the conductive post and the first insulating layer, thereby preventing delamination of the conductive bump structure caused by stresses concentrating on an interface of different materials as in the prior art.Type: ApplicationFiled: October 3, 2012Publication date: September 26, 2013Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Feng-Lung Chien, Yi-Hung Lin, Yi-Hsin Chen
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Publication number: 20130252189Abstract: An apparatus, a system and a method are disclosed. An exemplary apparatus includes a first portion configured to hold an overlying wafer. The first portion includes a central region and an edge region circumscribing the central region. The first portion further including an upper surface and a lower surface. The apparatus further includes a second portion extending beyond an outer radius of the wafer. The second portion including an upper surface and a lower surface. The lower surface of the first portion in the central region has a first reflective characteristic. The lower surface of the first portion in the edge region and the second portion have a second reflective characteristic.Type: ApplicationFiled: March 23, 2012Publication date: September 26, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Hung Lin, Li-Ting Wang, Tze-Liang Lee
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Publication number: 20130252424Abstract: An apparatus, a system and a method are disclosed. An exemplary apparatus includes a wafer holder including a first portion and a second portion. The first and second portions are formed of the same continuous material. The first portion includes a first upper surface and a first lower surface, and the second portion including a second upper surface and a second lower surface. The apparatus further includes an interface between the first and second portions. The interface provides for a transition such that the first upper surface of the first portion tends toward the second upper surface of the second portion. The apparatus further includes a tapered region formed in the first portion. The tapered region starts at a radial distance from a center line of the wafer holder and terminates at the interface. The tapered region has an initial thickness that gradually decreases to a final thickness.Type: ApplicationFiled: March 21, 2012Publication date: September 26, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Hung Lin, Li-Ting Wang, Tze-Liang Lee
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Publication number: 20130240391Abstract: A tool box of the present invention comprises a tool handle, a case, and cap. The tool handle comprises a housing, a battery assembly, a luminous source, and a conductive element. The luminous source comprises a first leg and a second leg. One of the anode and the cathode electrically connects to the first leg. A top surface of the cap is formed with an engaging groove. The housing of the tool handle engages in the engaging groove. Wherein either the other one of the anode and the cathode or the second leg electrically connects to the conductive element when a tool inserts to the housing and pushes the conductive element to move to the second position. As such, the tool handle can turn on and off the luminous without disposing any switch. An interior of the case has enough space for receiving tools.Type: ApplicationFiled: March 19, 2012Publication date: September 19, 2013Inventor: Yi-Hung LIN
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Publication number: 20130130184Abstract: A wafer temperature control apparatus comprises a first temperature sensor and a second temperature sensor. The first temperature sensor is configured to receive a first temperature signal from a center portion of a backside of a susceptor. The second temperature sensor is configured to receive a second temperature signal from an edge portion of the susceptor. A plurality of controllers are configured to adjust each heating source's output based upon the first temperature signal and the second temperature signal.Type: ApplicationFiled: November 21, 2011Publication date: May 23, 2013Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Shen Lu, Tze-Liang Lee, Yi-Hung Lin, Tai-Chun Huang, Pang-Yen Tsai, Jr-Hung Li
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Patent number: 8435271Abstract: A device for fixing soft tissue. A sleeve is detachably connected to a self-drilling tapping screw, moving and rotating the self-drilling tapping screw. A guide bar is detachably connected to the self-drilling tapping screw and fit in the sleeve. A fixing pin is fit in a washer and connected to the self-drilling tapping screw. The guide bar is detachably fit in the fixing pin. The fixing pin abuts the washer and the self-drilling tapping screw.Type: GrantFiled: September 13, 2011Date of Patent: May 7, 2013Assignee: Industrial Technology Research InstituteInventors: Ching-Chuan Jiang, Shan-Chang Chueh, Ting-Hui Chiu, Chun-Jen Liao, Yi-Hung Lin, Ya-Jen Yu, I-Fan Chiu
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Publication number: 20130084682Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.Type: ApplicationFiled: September 29, 2011Publication date: April 4, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Ru LEE, Ming-Hua YU, Tze-Liang LEE, Chii-Horng LI, Pang-Yen TSAI, Lilly SU, Yi-Hung LIN, Yu-Hung CHENG