Patents by Inventor Yi Jiang

Yi Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240392200
    Abstract: A grading system and an application of a hydrogenation catalyst and a grading method of the hydrogenation catalyst are provided. The system contains M hydrogenation catalysts sequentially filled in a material flow direction. An R value of an Nth hydrogenation catalyst is not less than an R value of an (N?1)th hydrogenation catalyst, and the R value of at least one Nth hydrogenation catalyst is greater than the R value of the (N?1)th hydrogenation catalyst. N is an integer greater than 2 and not greater than M; the R value is a ratio of molar content of the VIII group metal element in the hydrogenation catalyst characterized by an X-ray photoelectron spectrum to weight content of the VIII group metal element in terms of oxides in the hydrogenation catalyst characterized by an X-ray fluorescence spectrum. The hydrogenation catalysts having different surface nickel atom concentrations are used for grading, thereby improving denitrification and the hydrogenation saturation performance of a catalyst system.
    Type: Application
    Filed: October 24, 2022
    Publication date: November 28, 2024
    Inventors: Zhanlin YANG, Sijia DING, Yi LIU, Shaozhong PENG, Huigang WANG, Hong JIANG, Jifeng WANG, Fangzhao WANG, Ping WANG
  • Patent number: 12155718
    Abstract: An example method of distributed load balancing in a virtualized computing system includes: configuring, at a logical load balancer, a traffic detector to detect traffic to a virtual internet protocol address (VIP) of an application having a plurality of instances; detecting, at the traffic detector, a first request to the VIP from a client executing in a virtual machine (VM) supported by a hypervisor executing on a first host; sending, by a configuration distributor of the logical load balancer in response to the detecting, a load balancer configuration to a configuration receiver of a local load balancer executing in the hypervisor for configuring the local load balancer to perform load balancing for the VIP at the hypervisor using the load balancer configuration.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: November 26, 2024
    Assignee: VMware LLC
    Inventors: DongPing Chen, Jingchun Jiang, Bo Lin, Xinyang Liu, Donghai Han, Xiao Liang, Yi Zeng
  • Patent number: 12152150
    Abstract: The disclosure discloses a high-viscosity, high-elasticity, and anti-aging composite modified asphalt and a preparation method thereof, belongs to the technical field of road engineering materials, and solves the technical problem that the comprehensive performance of an existing asphalt ultrathin wearing layer needs to be further improved so as to prolong the service life of a pavement surface layer and reduce the pavement maintenance costs. The composite modified asphalt is prepared from the following components in parts by mass: 100 parts of a matrix asphalt, 10 to 15 parts of a thermoplastic styrene-butadiene rubber, 5 to 8 parts of a tackifier, 0.5 to 1.5 parts of a plasticizer, 2 to 5 parts of a compatibilizer, 0.1 to 0.4 parts of a stabilizer, and 0.01 to 0.05 parts of an anti-aging agent. The composite modified asphalt prepared by the disclosure has the advantages of high elasticity, high viscosity, excellent aging resistance, etc.
    Type: Grant
    Filed: February 2, 2024
    Date of Patent: November 26, 2024
    Assignee: Sichuan Road and Bridge Construction Group Co., Ltd.
    Inventors: Shuangquan Jiang, Jian Yang, Peilong Li, Wei Lu, Liuda Cheng, Yi Pei, Zhan Ding, Jianglin Du, Haiqing Li, Jixiang Pu, Qingyun Li, Maoqin Niu, Jianming Zhang, Wanchun Liu
  • Patent number: 12156442
    Abstract: A display area of the array substrate only includes first sub-pixels capable of emitting light. In each two adjacent rows of first sub-pixels, a gate line electrically connected to one row of the plurality of rows of first sub-pixels and a reset signal line electrically connected to another row of the plurality of rows of first sub-pixels are electrically connected to the same first gate drive circuit. A target line electrically connected to a first row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a second gate drive circuit. A target line electrically connected to a last row of the plurality of rows of first sub-pixels (i.e., another line other than the line electrically connected to the first gate drive circuit) is electrically connected to a third gate drive circuit.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 26, 2024
    Assignees: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lulu Yang, Tinghua Shang, Yi Qu, Xiaofeng Jiang, Huijun Li, Mengqi Wang, Xin Zhang, Meng Zhang
  • Publication number: 20240387766
    Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Jhy-Jyi Sze, Sin-Yi Jiang, Yi-Shin Chu, Yin-Kai Liao, Hsiang-Lin Chen, Kuan-Chieh Huang
  • Patent number: 12148853
    Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed on and/or in a silicon substrate. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.
    Type: Grant
    Filed: November 29, 2023
    Date of Patent: November 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jhy-Jyi Sze, Sin-Yi Jiang, Yi-Shin Chu, Yin-Kai Liao, Hsiang-Lin Chen, Kuan-Chieh Huang
  • Publication number: 20240381793
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a bottom electrode over a substrate. A top electrode overlies the bottom electrode. A capping structure is disposed between the top electrode and the bottom electrode. The capping structure comprises a diffusion barrier layer vertically stacked with a metal layer. A switching structure is disposed between the bottom electrode and the capping structure. The switching structure comprises a dielectric layer on the bottom electrode and a first oxygen affinity layer on the dielectric layer. A first Gibbs free energy of the first oxygen affinity layer is less than a second Gibbs free energy of the dielectric layer. A first difference between the first Gibbs free energy and the second Gibbs free energy is less than ?100 kJ/mol.
    Type: Application
    Filed: January 29, 2024
    Publication date: November 14, 2024
    Inventors: Fa-Shen Jiang, Hai-Dang Trinh, Cheng-Yuan Tsai, Chung-Yi Yu
  • Publication number: 20240376099
    Abstract: The invention disclosed herein relates to 4,5,6,7-tetrahydro-1H-pyrazolo[4,3-c]pyridinyl compounds and 4,5,6,7-tetrahydro-2H-pyrazolo[4,3-c]pyridinyl compounds of Formula (A), pharmaceutical compositions comprising such compounds and the use of such compounds in the treatment of autoimmune diseases.
    Type: Application
    Filed: May 30, 2024
    Publication date: November 14, 2024
    Inventors: Phillip ALPER, Jonathan DEANE, Songchun JIANG, Tao JIANG, Thomas KNOEPFEL, Pierre-Yves MICHELLYS, Daniel MUTNICK, Wei PEI, Peter SYKA, Guobao ZHANG, Yi ZHANG
  • Publication number: 20240369257
    Abstract: A housing assembly includes a top panel provided with connection side members at opposite ends of the top panel, respectively, and extending downward, and a middle frame including two opposite side panels. An upper end of each of the side panels is connected to a corresponding one of the connection side members. A buckle structure and a screw lock structure are provided between the upper end of each of the side panels and the corresponding one of the connection side members.
    Type: Application
    Filed: October 28, 2021
    Publication date: November 7, 2024
    Inventors: Jingqiang JIANG, Shaozhang LU, Yi ZOU
  • Patent number: 12131973
    Abstract: A semiconductor device includes: a substrate; a seed layer disposed on the substrate; a compound semiconductor stack layer disposed on the seed layer; and a source metal layer and a drain metal layer disposed on the compound semiconductor stack layer. The semiconductor device further includes a conductive layer at least partially covering the source metal layer and the drain metal layer, and covering opposing side surfaces of the seed layer and opposing side surfaces of the compound semiconductor stack layer. The conductive layer electrically connects the seed layer and the source metal layer.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: October 29, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsiu-Mei Yu, Guang-Yuan Jiang, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin
  • Patent number: 12129169
    Abstract: Provided is a semi-finished product of an electronic device, including a substrate, a sensing module, and a lid. The substrate has a first surface and a second surface opposite to each other. The sensing module is disposed on the first surface. The lid is disposed on the first surface and forms a first cavity together with the substrate. An electronic device is also provided.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: October 29, 2024
    Assignee: Merry Electronics Co., Ltd.
    Inventors: Jen-Yi Chen, Yueh-Kang Lee, Kai-Yu Jiang
  • Patent number: 12126593
    Abstract: Example methods and systems for validation-based service request handling are described. In one example, a computer system may obtain, from a management entity, configuration information specifying a unicast service address associated with a service node capable of providing a network service. In response to detecting a service request from the virtualized computing instance, the computer system may generate a modified service request that (a) is destined for the unicast service address and (b) includes a validation identifier (ID) associated with the virtualized computing instance. The modified service request may be forwarded towards the service node to cause the service node to perform validation based on the validation ID to determine whether to provide the network service. In response to detecting a service response from the service node, the service response, or a modified service response, may be forwarded towards the virtualized computing instance.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: October 22, 2024
    Assignee: VMware LLC
    Inventors: Jingchun Jiang, Bo Lin, Dongping Chen, Qi Wu, Yi Zeng
  • Publication number: 20240342836
    Abstract: A gear box having a carburized shaft and steel bearing assembly. The bearing includes an inner-race and an outer-race. The shaft includes a distal end surface extending perpendicularly from a shaft faying surface and a shaft annular beveled edge. The shaft faying surface is in intimate contact with the inner-race. The inner-race second annular face is coplanar with the distal end surface. The shaft annular beveled edge cooperates with the inner-race faying surface to define a half-V shaped groove. An annular weld joint is formed in the half-V shaped groove thereby joining the shaft to the inner-race. The outer-race includes a first width (W1) and the inner-race includes a second width (W2). W2 is wider than W1 by greater than 0 millimeters (mm) to about 10 mm.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 17, 2024
    Inventors: Huaxin Li, Yi Liu, Sen Jiang Zhou, Jack M. Gayney
  • Publication number: 20240346394
    Abstract: The present invention provides a method and a system for predicting carbon emission from agricultural land, relates to the technical field of carbon emission prediction, comprising: Using the CLUMondo model to predict the agricultural land area of the target area at a future time; Determining methane emissions from paddy fields at a future time based on the area of rice planted in the agricultural land area; Determining the direct and indirect nitrous oxide emissions at a future time based on the nitrogen input to the agricultural land area; Determining methane emissions from animal enteric fermentation, methane emissions from animal manure management, and nitrous oxide emissions from animal manure management based on the number of animals in the agricultural land area.
    Type: Application
    Filed: October 23, 2023
    Publication date: October 17, 2024
    Inventors: Penghui JIANG, Yi HU, Manchun LI, Haiyue FU
  • Publication number: 20240335558
    Abstract: An isolated polypeptide, including a catalytically active domain and a heptapeptide repeat fragment. The catalytically active domain contains an amino acid sequence as set forth in SEQ ID NO: 1, the heptapeptide repeat fragment contains an amino acid sequence as set forth in SEQ ID NO: 2, and in the isolated polypeptide a number of the heptapeptide repeat fragments is not more than 3.
    Type: Application
    Filed: December 2, 2021
    Publication date: October 10, 2024
    Applicant: GLYCO-THERAPY BIOTECHNOLOGY CO., LTD.
    Inventors: Yi YANG, Ji CHEN, Xin JIANG
  • Patent number: 12114531
    Abstract: A display substrate and a display device are disclosed. The display substrate includes a base substrate, a pixel circuit layer, and an anode layer; the pixel circuit layer includes a plurality of pixel driving circuits; and the anode layer includes a plurality of anode; each pixel driving circuit includes a functional thin film transistor; the plurality of pixel driving circuits include a first pixel driving circuit and a second pixel driving circuit which are adjacently arranged, and an orthographic projection of a channel region of the functional thin film transistor in the first pixel driving circuit on the base substrate and an orthographic projection of a channel region of the functional thin film transistor in the second pixel driving circuit on the base substrate both overlap with an orthographic projection of the anode corresponding to the first pixel driving circuit on the base substrate.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: October 8, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yi Qu, Tinghua Shang, Lulu Yang, Huijun Li, Meng Zhang, Xin Zhang, Xiaofeng Jiang, Jie Dai, Lu Bai, Yupeng He, Hao Zhang
  • Patent number: 12112465
    Abstract: A measurement and reconstruction method for a turbine blade strain field of with integrates an imaging technology and an infrared photoelectric measurement technology. The imaging technology is mainly responsible for the measurement of the strain field on a target blade surface, so as to use a digital image processing technology to obtain blade strain field data. The infrared photoelectric measurement technology is mainly aimed at the strain at blade edges, which uses temperature difference between the blade edges and blade gaps to perform strain measurement. Measurement results of the two modes are finally converted into blade strain parameters, thereby reconstructing the target blade strain field based on host computer software.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: October 8, 2024
    Assignee: University of Electronic Science and Technology of China
    Inventors: Jing Jiang, Yi Niu, Chao Wang, Peifeng Yu, Zezhan Zhang, Shan Gao
  • Publication number: 20240331351
    Abstract: A face image clustering method and system based on a localized simple multiple kernel k-means is provided. The face image clustering method based on localized simple multiple kernel k-means includes the following steps: S1, acquiring face images, and preprocessing the acquired face images to obtain an average kernel matrix for each view; S2, calculating n (?×n)-nearest neighbor matrices according to the obtained average kernel matrices; S3, calculating a localized kernel matrix for each view according to the nearest neighbor matrices; S4, constructing a localized simple multiple kernel k-means clustering objective function according to the calculated localized kernel matrix for each view; S5, solving a minimum of the constructed objective function by adopting a reduced gradient descent method to obtain an optimal clustering partition matrix; and S6, performing k-means clustering on the obtained clustering partition matrix to achieve clustering.
    Type: Application
    Filed: August 12, 2022
    Publication date: October 3, 2024
    Applicant: ZHEJIANG NORMAL UNIVERSITY
    Inventors: Xinzhong ZHU, Huiying XU, Miaomiao LI, Yi ZHANG, Jianping YIN, Xiao HUANG, Yunliang JIANG
  • Publication number: 20240320976
    Abstract: According to embodiments of the disclosure, a method, system, device, medium and product for video processing are provided. The method includes extracting a plurality of feature maps from a plurality of frames of a video respectively; determining a plurality of frame-level features of a video instance in the plurality of frames based on the plurality of feature maps respectively, a frame-level feature in each of the frames representing feature information of the video instance in the frame; determining a video-level feature of the video instance by aggregating the plurality of frame-level features, the video-level feature representing feature information of the video instance across the plurality of frames; and determining an analysis result for the video instance in the plurality of frames based at least on the video-level feature.
    Type: Application
    Filed: June 3, 2024
    Publication date: September 26, 2024
    Inventors: Junfeng Wu, Song Bai, Yi Jiang, Wenqing Zhang, Bin Lu
  • Publication number: 20240313636
    Abstract: The present invention provides a built-in ripple injection circuit and a control chip, in which a divided feedback voltage is obtained by division of an output voltage by a feedback circuit, and high-frequency ripple in the output voltage is obtained by an operational amplifier and a first capacitor. Moreover, the high-frequency ripple is injected at a third terminal of a source follower. As a result, the feedback voltage is a superimposition of the divided feedback voltage with the high-frequency ripple. This can enhance stability and interference resilience of a power supply system operating in a ripple-based COT control mode. Further, the built-in ripple circuit can be integrated in the control chip. This dispenses with the use of a large capacitor and satisfactorily addresses applications requiring on-chip integration of the feedback circuit, reducing the cost of the power supply system.
    Type: Application
    Filed: March 12, 2024
    Publication date: September 19, 2024
    Inventors: Rulong JIANG, Zhen ZHU, Xiaoru GAO, Yi ZHANG, Ge YANG