Patents by Inventor Yi Lin

Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069450
    Abstract: A method and apparatus for training a defect location prediction model to predict a defect for a substrate location is disclosed. A number of datasets having data regarding process-related parameters for each location on a set of substrates is received. Some of the locations have partial datasets in which data regarding one or more process-related parameters is absent. The datasets are processed to generate multiple parameter groups having data for different sets of process-related parameters. For each parameter group, a sub-model of the defect location prediction model is created based on the corresponding set of process-related parameters and trained using data from the parameter group. A trained sub-model(s) may be selected based on process-related parameters available in a candidate dataset and a defect prediction may be generated for a location associated with the candidate dataset using the selected sub-model.
    Type: Application
    Filed: December 8, 2021
    Publication date: February 29, 2024
    Applicant: ASML Netherlands B.V.
    Inventors: Nabeel Noor MOIN, Chenxi LIN, Yi ZOU
  • Publication number: 20240066319
    Abstract: A dose control system, including a processing device configured to obtain the real drug concentration in plasma of a patient. The processing device is further configured to calculate the corrected dose rate distribution datum based on the real drug concentration in plasma and a set of correction coefficients. The processing device is further configured to calculate the irradiation time based on the corrected dose rate distribution datum and the prescribed dose distribution datum. The processing device is further configured to control the irradiation device to irradiate the patient for the irradiation time.
    Type: Application
    Filed: February 3, 2023
    Publication date: February 29, 2024
    Applicant: Heron Neutron Medical Corp.
    Inventor: Tzung-Yi LIN
  • Publication number: 20240071981
    Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Chih-Wei Lin, Hao-Yi Tsai, Kuo-Lung Pan, Chun-Cheng Lin, Tin-Hao Kuo, Yu-Chia Lai, Chih-Hsuan Tai
  • Publication number: 20240069878
    Abstract: Aspects of the present disclosure provide a method for training a predictor that predicts performance of a plurality of machine learning (ML) models on platforms. For example, the method can include converting each of the ML models into a plurality of instructions or the instructions and a plurality of intermediate representations (IRs). The method can also include simulating execution of the instructions corresponding to each of the ML models on a platform and generating instruction performance reports. Each of the instruction performance reports can be associated with performance of the instructions corresponding to one of the ML models that are executed on the platform. The method can also include training the predictor with the instructions or the IRs as learning features and the instruction performance reports as learning labels, compiling the predictor into a library file, and storing the library file in a storage device.
    Type: Application
    Filed: July 3, 2023
    Publication date: February 29, 2024
    Applicant: MEDIATEK INC.
    Inventors: Huai-Ting LI, I-Lin CHEN, Tsai JEN CHIEH, Cheng-Sheng CHAN, ShengJe HUNG, Yi-Min TSAI, Huang YA-LIN
  • Publication number: 20240071950
    Abstract: Integrated circuit packages and methods of forming the same are discussed. In an embodiment, a device includes: a package substrate; a semiconductor device attached to the package substrate; an underfill between the semiconductor device and the package substrate; and a package stiffener attached to the package substrate, the package stiffener includes: a main body extending around the semiconductor device and the underfill in a top-down view, the main body having a first coefficient of thermal expansion; and pillars in the main body, each of the pillars extending from a top surface of the main body to a bottom surface of the main body, each of the pillars physically contacting the main body, the pillars having a second coefficient of thermal expansion, the second coefficient of thermal expansion being less than the first coefficient of thermal expansion.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Yi Lin, Kuang-Chun Lee, Chien-Chen Li, Chien-Li Kuo, Kuo-Chio Liu
  • Publication number: 20240065386
    Abstract: A method for locating critical control points on a part or combination of parts during a manufacturing process involves mating, directly or indirectly, a jig extension to the part or parts. A pattern on the jig extension defines an origin point that is used to track the position of the part or parts during manufacturing, such as during location-sensitive operations. The jig extension may be a shoe last extension which connects to a shoe or shoe component via a shoe last.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Dragan Jurkovic, Ming-Feng Jean, Chin-Yi Lin, Chun-Chi Lin
  • Publication number: 20240069295
    Abstract: An optical transceiver includes housing, connector coupler and internal optical connector. Opening of housing is located on a side of housing and connected to accommodation space of housing. Connector coupler includes positioning frame and at least one elastic holding arm. Elastic holding arm protrudes from positioning frame and forms holding space. Positioning frame is located between at least a part of elastic holding arm and opening. Positioning frame is disposed in accommodation space. Positioning recess is located on a side of positioning frame close to opening and connected to holding space. At least a part of internal optical connector is located in holding space to be held in position by elastic holding arm. Positioning recess is configured to position external optical connector so as to allow internal optical connector to be plugged with and optically coupled to external optical connector.
    Type: Application
    Filed: December 6, 2022
    Publication date: February 29, 2024
    Inventors: Gaofei YAO, Qilin HONG, Yi LIN, PengBin LIN
  • Publication number: 20240070416
    Abstract: A reading method and a reading device for a two-dimensional code. The method includes: capturing a two-dimensional code image through an image capturing device; detecting an outer frame and a position mark of a two-dimensional code in a skewed state in the two-dimensional code image; restoring the two-dimensional code in the skewed state to a default state; and performing a default operation according to the two-dimensional code in the default state.
    Type: Application
    Filed: November 15, 2022
    Publication date: February 29, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chin-Hao Yeh, Chin-Wen Lin, Hung-Yi Lin
  • Publication number: 20240071854
    Abstract: Some implementations described herein a provide a multi-die package and methods of formation. The multi-die package includes a dynamic random access memory integrated circuit die over a system-on-chip integrated circuit die, and a heat transfer component between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, which may correspond to a dome-shaped structure, may be on a surface of the system-on-chip integrated circuit die and enveloped by an underfill material between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, in combination with the underfill material, may be a portion of a thermal circuit having one or more thermal conductivity properties to quickly spread and transfer heat within the multi-die package so that a temperature of the system-on-chip integrated circuit die satisfies a threshold.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Yi LIN, Kuang-Chun LEE, Chien-Chen LI, Chien-Li KUO, Kuo-Chio LIU
  • Publication number: 20240074145
    Abstract: A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, a bonding structure, a bit line, and a word line. The bonding structure is disposed on the substrate. The bit line is disposed on the bonding structure. The channel layer is disposed on the bit line. The word line surrounds the channel layer. The bonding structure includes a dielectric material.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: YI-JEN LO, CHIANG-LIN SHIH, HSIH-YANG CHIU
  • Publication number: 20240070451
    Abstract: A computer-program product storing instructions which, when executed by a computer, cause the computer to receive an input data from a sensor, generate a training data set utilizing the input data, wherein the training data set is created by creating one or more copies of the input data and adding noise to the one or more copies, send the training data set to a diffusion model, wherein the diffusion model is configured to reconstruct and purify the training data set by removing noise associated with the input data and reconstructing the one or more copies of the training data set to create a modified input data set, send the modified input data set to a fixed classifier, and output a classification associated with the input data in response to a majority vote of the classification obtained by the fixed classifier of the modified input data set.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Jingyang ZHANG, Chaithanya Kumar MUMMADI, Wan-Yi LIN, Ivan BATALOV, Jeremy KOLTER
  • Publication number: 20240069912
    Abstract: A method for identifying hard-coded strings in source code is disclosed. In one embodiment, such a method parses source code and associated localization resource files to identify hard-coded strings and their associated context. The method provides a confidence score for each hard-coded string that indicates whether the hard-coded string is translatable or non-translatable. Based on the confidence score for each hard-coded string, the method transforms each hard-coded string into a single equivalence word. The method then prepares training data by tagging the hard-coded strings in the source code and associated localization resource files as one of translatable and non-translatable. The method then trains a parts-of-speech (POS) tagging model using the training data. At runtime, the method fetches potential hard-coded strings and tags each hard-coded string as one of translatable and non-translatable using the POS tagging model. A corresponding system and computer program product are also disclosed.
    Type: Application
    Filed: August 27, 2022
    Publication date: February 29, 2024
    Applicant: International Business Machines Corporation
    Inventors: Jin Shi, Chih-Yuan Lin, Shu-Chih Chen, Pei-Yi Lin, Chao Yuan Huang
  • Publication number: 20240070582
    Abstract: An apparatus for estimating a fair value of a SPP includes a sunshine simulation system for generating a peak sun hour; a photovoltaic (PV) yield system for measuring a total power loss rate and generating an estimated energy-production-hours database; and a financial pricing system for generating a series of cash flows and discount factors. The financial pricing system computes a series of present values which are the product of the cash flows and the discount factors, and sums up all the present values to obtain an estimated value of the SPP. Since the apparatus for estimating SPP value takes the real power generation condition of the SPP and the real market economic condition into consideration, so that the apparatus can generate a pricing result even closer to the real market.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Applicant: Guang Teng Renewable Energy Co., Ltd.
    Inventors: An-Hsing CHANG, Ming-Che CHUANG, Shih-Kuei LIN, Che-Yi YIN
  • Patent number: 11914429
    Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Yen-Chieh Chiu, Yu-Wen Lin, Yen-Chou Chueh, Po-Yi Lee
  • Patent number: 11916132
    Abstract: Semiconductor devices and methods of manufacturing are presented in which inner spacers for nanostructures are manufactured. In embodiments a dielectric material is deposited for the inner spacer and then treated. The treatment may add material and cause an expansion in volume in order to close any seams that can interfere with subsequent processes.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wan-Yi Kao, Hung Cheng Lin, Che-Hao Chang, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11914541
    Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a first device, a second device, and a processor communicatively coupled to the expansion interface. The expansion interface includes a plurality of slots. Two slots of the plurality of slots are controlled by a single reset signal. The first device is connected to a first slot of the two slots and has a feature that is compatible with the single reset signal. The second device is connected to a second slot of the two slots and does not have the feature compatible with the single reset signal. The process is to detect the first device connected to the first slot and the second device connected to the second slot and disable the feature by preventing the first slot and the second slot from receiving the single reset signal.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 27, 2024
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Wen Bin Lin, ChiWei Ding, Chun Yi Liu, Shuo-Cheng Cheng, Chao-Wen Cheng
  • Patent number: 11917795
    Abstract: A heat sink structure includes a base seat and at least one heat dissipation unit. The base seat has a first face and a second face. At least one extension column extends from the second face of the base seat. The heat dissipation unit is disposed above the base seat and spaced from the base seat by a gap. The extension column serves to restrict or secure the heat dissipation unit in horizontal and vertical directions. The heat dissipation unit with different structures provides multiple heat dissipation features to enhance the entire heat dissipation performance.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: February 27, 2024
    Assignee: Asia Vital Components Co., Ltd.
    Inventors: Yuan-Yi Lin, Fu-Kuei Chang
  • Patent number: 11914269
    Abstract: A laser processing system includes a laser source, an optical splitting unit, a frequency conversion unit and at least one optical mixer. The optical splitting unit is provided to divide light emitted by the laser source into a first light and a second light, and the first light and the second light have the same wavelength range. The frequency conversion unit is provided to convert the second light into a working light. The working light includes a frequency converted light, and the frequency converted light and the second light have different wavelength ranges. The optical mixer is provided to mix the first light with the frequency converted light.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: February 27, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Zih-Yi Li, Ying-Tso Lin, Shang-Yu Hsu, Ying-Hui Yang
  • Patent number: 11916022
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang