Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.

Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.

Abstract: Provided are a probe joint including a micro-electromechanical probe head and a conductive member, and a spring probe including the same. The probe head includes a docking portion extending in a radial direction to form a deformable portion; and a contact portion for contacting an object to be tested, which is located at one end of the docking portion and has a size decreasing as away from the docking portion. The conductive member has a connecting section having an extended portion surrounding to define a carrier space; and a notch which communicates with the carrier space. When assembling, the docking portion can be disposed in the carrier space, the deformable portion extends out of the connecting section through the notch. The deformable portion can be deformed and forms a deformed portion, which partially wraps the extended portion, thereby preventing the probe head from being separated from the conductive member.

Abstract: A method for generating and outputting a message is implemented using an electronic device the stores a computer program product and a text database. The text database includes a main message template, a template text that includes a placeholder, and a word group that includes a plurality of preset words for replacing the placeholder. The method includes: in response to receipt of a command for execution of the computer program product, displaying an editing interface including the main message template; in response to receipt of user operation of a selection of the main message template, displaying the template text; in response to receipt of user operation of a selection of one of the preset words via the user interface, generating an edited text by replacing the placeholder with the one of the preset words in the template text; and outputting the edited text as a message.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: System and method to use position information about a power supply unit (PSU) within a system for status reporting or control. The system may have multiple slots into which the PSU may be installed, and each of multiple PSUs installed may sense position information, such as an indication of the slot into which it is installed. A controller may receive the position information in connection with status information such that faults or other events associated with a PSU may be reported to a system operator in connection with a position of the affected PSU. The controller may determine adjustments to operating parameters of the PSUs that are impacted by position and may direct commends to the appropriate PSU based on the position information.

Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.

Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.

Abstract: Various embodiments of the present disclosure are directed towards a three-dimensional (3D) trench capacitor, as well as methods for forming the same. In some embodiments, a first substrate overlies a second substrate so a front side of the first substrate faces a front side of the second substrate. A first trench capacitor and a second trench capacitor extend respectively into the front sides of the first and second substrates. A plurality of wires and a plurality of vias are stacked between and electrically coupled to the first and second trench capacitors. A first through substrate via (TSV) extends through the first substrate from a back side of the first substrate, and the wires and the vias electrically couple the first TSV to the first and second trench capacitors. The first and second trench capacitors and the electrical coupling therebetween collectively define the 3D trench capacitor.

Abstract: A multifunction connector is provided. A housing of the connector has a base portion, a pair of walls extending from the base portion in a longitudinal direction and separated by a gap, and a pair of wings extending from the base portion on opposite sides of the pair of walls and in a transverse direction. A pair of power conductors each is held by one of the walls and has contact portions curving into the gap. A pair of sense conductors each is held by one of the walls and has a contact portion curving into the gap and being offset from the contact portions of a respective power conductor along the longitudinal direction. A position identification subassembly is held by a first wall of the pair and separate from the gap by the first wall. A ground conductor is held by a second wall of the pair and separate from the gap by the second wall. Such a configuration enables the connector to carry high current, identify insertion position on a busbar, sense the degree of insertion, and/or provide grounding.

Abstract: A photomask structure having a first region and a second region is provided. The layout pattern density of the first region is smaller than the layout pattern density of the second region. The photomask structure includes a first layout pattern, a second layout pattern, and first assist patterns. The first layout pattern is located in the first region and the second region. The second layout pattern is located in the second region. The second layout pattern is located on one side of the first layout pattern. The first assist patterns are located on the first sidewall of the first layout pattern and separated from each other. The first sidewall is adjacent to the second layout pattern. The first assist patterns are adjacent to a boundary between the first region and the second region. The lengths of two adjacent first assist patterns decrease in the direction away from the boundary.

Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus, comprises: an internal circuit patterned in a device wafer and electrically coupled between a first node and a second node, an array of electrostatic discharge (ESD) circuits patterned in a carrier wafer, where the ESD circuits are electrically coupled between a first node and a second node and configured to protect the internal circuit from transient ESD events, and where the device wafer is bonded to the carrier wafer.

Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.

Abstract: The present application discloses an information processing method and apparatus, a terminal device, and a storage medium. The method includes: based on a first bit length and/or a second bit length, determining a first rate matching output sequence length corresponding to first information.

Abstract: The present invention provide novel immunofiber compositions for protein or peptide purification and simple and cost-efficient methods and systems using these compositions. In some embodiments, the immunofibers comprise a customized Z-33 peptide derived from Staphylococcus aureus Protein A which is used to construct immuno-amphiphile molecules that assemble into immunofibers in aqueous solution with bioactive epitopes on the surface and have peptide or protein binding ability.

Abstract: Provided are a probe head, a probe assembly and a spring probe including the same. The probe head comprises a contact portion and first, second and third body portions stacked in sequence; the contact portion has a size decreasing as away from the first body portion, the contact portion is for contacting an object to be tested; the first body portion has a radial size greater than the second and third body portions; the second body portion is surround by a second concave wall and a second boundary wall; the third body portion has a radial size not greater than the second boundary wall and larger than a smallest radial size of the second concave wall; the probe assembly includes the probe head and a pipe having a portion protruding into the second concave wall, thereby achieving easy assembly and good firmness of the pipe and the probe head.

Abstract: Provided are methods for data-driven suggested remote vehicle assistance actions, which can include in response to receiving a request from a vehicle requesting assistance to address a scenario involving the vehicle, determining, using data stored in at least one data structure regarding a plurality of previously resolved scenarios involving a plurality of vehicles, a plurality of actions to address the scenario, causing an indication of the plurality of actions to be provided on at least one display remotely located from the vehicle, receiving a user selection of one of the plurality of actions; and causing an instruction to be transmitted to the vehicle based on the selected one of the plurality of actions. Systems and computer program products are also provided.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.