Abstract: The invention discloses an astaxanthin (AST) nanoemulsion and its manufacturing method. The manufacturing method comprising steps of: adding an AST material into a peanut oil and mixing them uniformly to obtain an AST oil; adding 0.25-1.5 (w/w) % of a surfactant into the AST oil and mixing them uniformly to obtain a mixed solution; and adding water into the mixed solution to obtain an AST emulsion precursor; and shaking the AST emulsion precursor to obtain the AST nanoemulsion.

Abstract: The present disclosure provides a system for signal optimization adjustment based on different heat source information. The system includes a plurality of heat source measurers, a first system chip, a second system chip, an electrical interconnection, and a bit error risk evaluator. The first system chip includes a signal transmitter, and the second system chip includes a signal receiver. The second system chip provides an electrical characteristic state of the signal receiver, and a signal adjustment information of the signal transmitter and/or the signal receiver. The bit error risk evaluator performs a signal optimization adjustment for an electrical characteristic of the signal receiver according to the electrical characteristic state. The present disclosure further provides a method for signal optimization adjustment.

Abstract: An example operation may include one or more of generating, by a blockchain node, an asset containment world-state by execution of a linear-time ingestion algorithm, detecting, by the blockchain node, an asset aggregation or disaggregation event, updating, by the blockchain node, the world-state based on the asset aggregation or disaggregation event, and computing supply-chain metrics based on the updated world-state.

Abstract: An image capturing method has: providing an image capturing area on a display screen of a user device; providing an indication area in the image capturing area; marking a license plate after identifying the license plate based on at least one license plate feature in the image capturing area; determining whether the marked license plate is located in the indication area and presented in a predetermined ratio; and capturing an image including the license plate in the image capturing area after the marked license plate is located in the indication area and presented in a predetermined ratio.

Abstract: The present invention provides a gas processing module, a gas processing method and a gas-phase organic compound processing method. A gas processing module comprises a cavity, a gas input unit, a light source, a photocatalyst, a liquid input unit, a gas discharge unit and a liquid discharge unit. The gas input unit is communicated with the inside of the cavity and used for supplying a to-be-processed gas comprising a gas-phase organic compound into the cavity. The light source is arranged in the cavity and used for providing a first light. The photocatalyst is arranged in the cavity, and at least a portion of the gas-phase organic compound of the to-be-processed gas which comes into contact with the photocatalyst generates an organic compound product under the action of the photocatalyst when irradiated by the first light.

Abstract: A semiconductor structure includes a substrate, an isolation structure disposed in the substrate, and a hybrid structure disposed over the isolation structure. The hybrid structure is substantially conformal with respect to a profile of the isolation structure. The hybrid structure includes an oxide component, a nitride component surrounding the oxide component, and a first polysilicon component alongside the nitride component. The nitride component includes a first upper surface closed to the first polysilicon component, and a second upper surface distal to the first polysilicon component. The second upper surface is lower than the first upper surface.

Abstract: A heating device includes a resonant circuit, a detection unit and a control unit. The resonant circuit includes an inverter circuit and a resonant tank. The inverter circuit provides a resonant tank current and a resonant tank voltage. The resonant tank includes a heating coil, a resonant tank capacitor, a resonant tank equivalent inductor and a resonant tank equivalent resistor. The detection unit calculates an inductance of the resonant tank equivalent inductor according to a capacitance of the resonant tank capacitor, a resonant period and a first expression. The detection unit calculates a resistance of the resonant tank equivalent resistor according to the inductance of the resonant tank equivalent inductor, a time change value, a reference voltage value, a negative peak voltage value and a second expression.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.

Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.

Abstract: A ratchet wrench includes a head, a toothed wheel, a pawl and a switch. The head includes two bores in communication with a pothole in communication with a chamber via a channel. The channel includes a broad section between two tapered sections. The toothed wheel is rotatable in the chamber. The switch is pivotable in the pothole and includes a tunnel with a first end in communication with the broad section of the channel and a second end in communication with the pothole. A spring is compressed between a detent and a ball. The detent includes an end connected to the pawl and another end movable in the tunnel. The ball includes a portion in the tunnel and another portion insertable in a selected one of the bores when the detent moves the pawl into a corresponding one of the tapered sections of the channel.

Abstract: An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is disposed on a carrier structure, a heat conduction layer is formed on the electronic element, and a heat dissipation member having a recess portion is disposed on the heat conduction layer to cover the electronic element. Therefore, the arrangement of the recess portion can buffer the flow of the heat conduction layer to facilitate the formation of an intermetallic structure with sufficient thickness between the heat dissipation member and the electronic element, and the heat dissipation effect of the electronic element can meet expectations.

Abstract: A multilevel buck converter includes a plurality of switches, an inductor, a flying capacitor, and a control circuit. The plurality of switches are coupled between an input terminal and a ground. The input terminal has an input voltage. The inductor is coupled between the plurality of switches and an output terminal for generating an inductor-current signal. The flying capacitor is coupled to the plurality of switches for generating a flying capacitor voltage. The control circuit is coupled to the output terminal and the plurality of switches for generating a plurality of switching signals according a feedback voltage and the inductor-current signal. The control circuit operates in a valley current mode with dual slope compensation.

Abstract: Buffing of a footwear component allows for an alteration of the component surface to achieve an intended surface for aesthetics and/or manufacturing purposes. The buffing is performed in a system having a vision module, a sidewall buffing module, an up surface buffing module, and a down surface buffing module. Each of the buffing modules are adapted for the unique shape and sizes of a footwear component to effectively and automatically buff the footwear component.

Abstract: A source/drain region of a semiconductor device is formed using an epitaxial growth process. In an embodiment a first step comprises forming a bulk region of the source/drain region using a first precursor, a second precursor, and an etching precursor. A second step comprises cleaning the bulk region with the etchant along with introducing a shaping dopant to the bulk region in order to modify the crystalline structure of the exposed surfaces. A third step comprises forming a finishing region of the source/drain region using the first precursor, the second precursor, and the etching precursor.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element is disposed on a carrier structure with a circuit layer, a first encapsulating layer and a second encapsulating layer are formed on the carrier structure to cover the electronic element, a first antenna layer is formed on the first encapsulating layer, and a second antenna layer communicatively connected to the first antenna layer is formed on the second encapsulating layer. Therefore, the thickness of the first encapsulating layer is used to control the resonance distance of the antenna frequency so as to generate better resonance effect, and the distance between the first antenna layer and the second antenna layer is controlled by the thickness of the second encapsulating layer to increase the bandwidth of the antenna.

Abstract: A source/drain region of a semiconductor device is formed using an epitaxial growth process. In an embodiment a first step comprises forming a bulk region of the source/drain region using a first precursor, a second precursor, and an etching precursor. A second step comprises cleaning the bulk region with the etchant along with introducing a shaping dopant to the bulk region in order to modify the crystalline structure of the exposed surfaces. A third step comprises forming a finishing region of the source/drain region using the first precursor, the second precursor, and the etching precursor.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a heat sink with an opening is disposed on an electronic component of a carrier structure, a heat dissipation material is formed in the opening, and a heat dissipation lid is disposed on the opening to cover the heat dissipation material, such that the problem of insufficient heat dissipation due to the loss of the heat dissipation material can be prevented from occurring to the electronic component.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a full-panel wafer is provided and includes a plurality of electronic bodies arranged in an array at intervals, a plurality of trenches are formed across the electronic bodies along a first direction on the full-panel wafer, so that the trenches on a single electronic body are arranged parallel to each other at interval and along a second direction perpendicular to the first direction. Then, in a singulation process, any trench can be selected for cutting to obtain a plurality of electronic elements of a required size. Finally, each of the electronic elements is disposed on a packaging region of a carrier structure, so that each of the electronic elements is electrically connected to at least a portion of electrical contact pads in the packaging region.