Patents by Inventor Yi-Ming Chang

Yi-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250110590
    Abstract: A circuit, for a touch panel, comprising N touch signal processing circuits; a backup processing circuit; and a controller, coupled to the N touch signal processing circuits and the backup processing circuit, configured to determine whether one of the N touch signal processing circuits is failed and generate a determining result, and control the N touch signal processing circuits and the backup processing circuit to process N touch signals received from the touch panel to obtain N digital signals according to the determining result.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 3, 2025
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Yaw-Guang Chang, Jia-Ming He, Yi-Yang Tsai
  • Patent number: 12265678
    Abstract: A touch event processing circuit includes receiving circuits and an average circuit. Each of the receiving circuits includes an operation amplifier, a current processing circuit, and a touch event detection circuit. The operation amplifier receives an input signal from a touch panel, and outputs a first current signal and a second current signal. The current processing circuit processes the first current signal and the second current signal according to a first current average signal and a second current average signal, to generate a processed current signal. The touch event detection circuit detects a touch event according to the processed current signal. The average circuit receives first current signals and second current signals from the receiving circuits; performs an average operation upon the first current signals, to generate the first current average signal; and performs an average operation upon the second current signals, to generate the second current average signal.
    Type: Grant
    Filed: April 11, 2024
    Date of Patent: April 1, 2025
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Jia-Ming He, Yaw-Guang Chang, Yi-Yang Tsai
  • Patent number: 12266701
    Abstract: A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.
    Type: Grant
    Filed: May 18, 2023
    Date of Patent: April 1, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee
  • Publication number: 20250092511
    Abstract: A vapor deposition system is described. The vapor deposition system includes a reaction chamber and a reactant delivery subsystem coupled with the reaction chamber. The reaction chamber is configured to retain a substrate therein. The reactant delivery subsystem includes inlets, a pre-reaction region, and outlets. The inlets receive precursors and chalcogen precursor(s). The pre-reaction region is configured to receive the precursors from a portion of the inlets and to react at least a portion of the precursors to form modified precursor(s). The modified precursor(s) are more thermally stable than metal-containing precursor(s) of the precursors used to form the modified precursor(s). The outlets are coupled with the reaction chamber and the pre-reaction region. The outlets separately provide the modified precursor(s) and the chalcogen precursor(s) to the reaction chamber. The modified precursor(s) and the chalcogen precursor(s) react and form a chalcogen film on the substrate in the reaction chamber.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 20, 2025
    Inventors: Lain-Jong Li, Yi Wan, Yu-Ming Chang
  • Patent number: 12243589
    Abstract: A memory device is provided, including a memory array, a driver circuit, and recover circuit. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Chun Liao, Yu-Kai Chang, Yi-Ching Liu, Yu-Ming Lin, Yih Wang, Chieh Lee
  • Patent number: 12237437
    Abstract: A light-emitting package, includes: a housing including an opening; a lead frame covered by the housing; a light-emitting device, mounted in the opening and electrically connected to the lead frame, the light-emitting device including: a substrate including: a base with a main surface; and a plurality of protrusions on the main surface, wherein the protrusion and the base include different materials; a semiconductor stack on the main surface, the semiconductor stack including a side wall, and wherein an included angle between the side wall and the main surface is an obtuse angle; wherein the main surface includes a peripheral area not covered by the semiconductor stack, and the peripheral area is devoid of the protrusion formed thereon; and a filling material filling in the opening and covering the light-emitting device.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: February 25, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Li-Ming Chang, Tzung-Shiun Yeh, Chien-Fu Shen, Wen-Hsiang Lin, Pei-Chi Chiang, Yi-Wen Ku
  • Publication number: 20250056851
    Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
  • Patent number: 12218239
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: February 4, 2025
    Assignee: Mosaid Technologies Incorporated
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Publication number: 20250040334
    Abstract: The present disclosure provides a photoelectric device module and a manufacturing method thereof. The photoelectric device module includes a circuit module and a photoelectric conversion module. The circuit module includes a first electrode. The photoelectric conversion module is disposed on the circuit module, in which the photoelectric conversion module includes a second electrode, a photoactive layer, a light-transmitting electrode, and a light-transmitting substrate. The second electrode is electrically connected to the first electrode. The photoactive layer is disposed on the second electrode. The light-transmitting electrode is disposed on the photoactive layer. The light-transmitting substrate is disposed on the light-transmitting electrode.
    Type: Application
    Filed: July 25, 2024
    Publication date: January 30, 2025
    Inventors: Yi-Ming CHANG, Cheng-En TSAI, Chung-Wei HSU
  • Patent number: 12206000
    Abstract: A method for forming a high electron mobility transistor is disclosed. A mesa structure having a channel layer and a barrier layer is formed on a substrate. The mesa structure has two first edges extending along a first direction and two second edges extending along a second direction. A passivation layer is formed on the substrate and the mesa structure. A first opening and a plurality of second openings connected to a bottom surface of the first opening are formed and through the passivation layer, the barrier layer and a portion of the channel layer. In a top view, the first opening exposes the two first edges of the mesa structure without exposing the two second edges of the mesa structure. A metal layer is formed in the first opening and the second openings thereby forming a contact structure.
    Type: Grant
    Filed: January 18, 2024
    Date of Patent: January 21, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee
  • Patent number: 12139465
    Abstract: The present invention relates to a non-fullerene acceptor compound containing benzoselenadiazole, and organic optoelectronic devices comprising the same.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: November 12, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yu-Tang Hsiao, Chia-Hao Lee, Chuang-Yi Liao, Chun-Chieh Lee, Chia-Hua Li, Hsiuan-Ling Ho, Yi-Ming Chang
  • Patent number: 12094996
    Abstract: An electronic device includes a substrate, a plurality of electronic components and a conductive material. The electronic components are arranged on the substrate, and the electronic components respectively include a lower electrode, a semiconductor layer and an upper electrode, and they are sequentially stacked on the substrate. The electronic components share the semiconductor layer, and the semiconductor layer forms a plurality of connecting channels through the semiconductor layer. The connecting channels are located between the upper electrode of the first electronic component in the electronic components and the lower electrode of the second electronic component in the electronic components. These connecting channels are processed by lasers of different powers. The conductive material is arranged in the connecting channel so that the upper electrode of the first electronic component is electrically connected to the lower electrode of the second electronic component.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: September 17, 2024
    Assignees: RAYNERGY TEK INCORPORATION, SHINERA CO., LTD.
    Inventors: Yi-Ming Chang, Chun-Chieh Lee, Jui-Chih Kao, Nai-Wei Teng
  • Patent number: 11950491
    Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 2, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao, Chun-Chieh Lee, Chia-Hua Li, Huei-Shuan Tan
  • Publication number: 20240099121
    Abstract: An organic optoelectronic device comprises a first electrode, an active layer and a second electrode. Active layer materials of the active layer comprise a block conjugated polymer materials which includes a structure of formula I: The polymer 1 is a p-type polymer with high energy gap, and the polymer 1 comprises a first electron donor and a first electron acceptor arranged alternately. The polymer 2 is a p-type polymer with low energy gap, and the polymer 2 comprises a second electron donor and a second electron acceptor arranged alternately. Wherein, o and p>0. The organic optoelectronic device of the present invention transfers carriers through the polymer 2 with low energy gap, and suppresses the recombination probability of carriers through the polymer 1 with high energy gap, thereby reducing the leakage current of the organic optoelectronic device.
    Type: Application
    Filed: August 18, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Yu-Tang Hsiao, CHENG-CHANG LAI
  • Publication number: 20240061332
    Abstract: A method of patterning a semiconductor layer includes the following steps. The semiconductor layer is formed on a substrate. A photoresist layer is formed on the semiconductor layer. The photoresist layer is patterned to form an opening exposing an exposed region of the semiconductor layer. The exposed region of the semiconductor layer is dissolved with a solution to pattern the semiconductor layer, in which the solution includes a first organic solvent and a second organic solvent. The solubility of the semiconductor layer in the first organic solvent is greater than 1 mg/mL, and the solubility of the semiconductor layer in the second organic solvent is less than or equal to 1 mg/mL.
    Type: Application
    Filed: November 15, 2022
    Publication date: February 22, 2024
    Inventors: Yi-Ming CHANG, Chia-Hua TSAI, Hsin-Yuan SU
  • Patent number: 11903304
    Abstract: The invention relates to a photodiode, like an photovoltaic (OPV) cell or photodetector (OPD), comprising, between the photoactive layer and an electrode, a hole selective layer (HSL) for modifying the work function of the electrode and/or the photoactive layer, wherein the HSL comprises a fluoropolymer and optionally a conductive polymer, and to a composition comprising such a fluoropolymer and a conductive polymer.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: February 13, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Kuen-Wei Tsai, Huei Shuan Tan, Nicolas Blouin, Luca Lucera, Tim Poertner, Graham Morse, Priti Tiwana
  • Patent number: 11895918
    Abstract: Organic photovoltaic device comprises a first electrode, a first carrier transfer later, an active layer, a second carrier transfer layer and a second electrode. The first electrode is a transparent electrode. The active layer includes at least one electron donor, a first electron acceptor, and a second electron acceptor. Wherein, the electron donor is an organic polymer. The first electron acceptor is a crystalline material, and the self-molecule stacking distance of the first electron acceptor is less than 4 ?. The second electron acceptor is a crystal destruction material, and the second electron acceptor includes a fullerene derivative. The organic photovoltaic device of the present invention not only has a controllable morphology formation but also can enhance fill factor and improve power conversion efficiency.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: February 6, 2024
    Assignee: RAYNERGY TEK INC.
    Inventors: Yi-Ming Chang, Chia-Hua Li, Huei-Shuan Tan
  • Publication number: 20230371352
    Abstract: An electrode connection structure is provided and includes a substrate, a first electrode, a second electrode, a semiconductor layer, a third electrode, and a conductive block. The first electrode and the second electrode are located on the substrate. The semiconductor layer is located on the first electrode and the second electrode. The third electrode is on the semiconductor layer. The conductive block penetrates through the semiconductor layer and the third electrode and directly contacts the second electrode and the third electrode. A first upper surface of the conductive block and a second upper surface of the third electrode are in different planes.
    Type: Application
    Filed: August 3, 2022
    Publication date: November 16, 2023
    Inventor: Yi-Ming CHANG
  • Publication number: 20230371293
    Abstract: A method of patterning semiconductor layer includes the following operations. A first electrode and a second electrode are formed on a substrate. A patterned polymer layer with a first portion on a portion of the second electrode and a second portion on an edge portion of the substrate is formed on the substrate. A semiconductor layer is deposited on the patterned polymer layer, the substrate, and the first electrode. The first portion of the patterned polymer layer and the semiconductor layer on the first portion are removed to form a through-hole in the semiconductor layer that exposes the portion of the second electrode. A conductive block is deposited on the semiconductor layer and in the through-hole.
    Type: Application
    Filed: August 15, 2022
    Publication date: November 16, 2023
    Inventor: Yi-Ming CHANG
  • Patent number: 11737351
    Abstract: Organic photoelectric device comprises a first electrode, a first carrier transfer layer, an active layer, a second carrier transfer layer and a second electrode. The first electrode is a transparent electrode. The active layer includes at least one organic semiconductor material including a structure such as Formula I: The second carrier transfer layer is composed between the active layer and the second electrode. When X1 and X2 are selected from one of Si, Ge and derivatives thereof, the active layer further includes an organic solvent, and the solubility of the organic solvent to the active layer is not less than 5 mg/mL. When X1 and X2 are selected from one of C and its derivatives, the active layer further includes an additive. The power conversion efficiency of the organic photoelectric device of the present invention can be up to more than 14%.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: August 22, 2023
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Chain-Shu Hsu, Jun-Yan Yu, You-Wei Lin, Kuan-Lin Peng, Yi-Ming Chang, Chuang-Yi Liao, Huei Shuan Tan