Patents by Inventor Yi Shao
Yi Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966822Abstract: Disclosed are a computer-implemented method, a system and a computer program product for feature processing. In the computer-implemented method for feature processing, two input features selected from multiple features of each sample in a sample set are projected to one resulting feature by one or more processing units based on a specified curve. The sample set is updated by replacing the two input features with the one resulting feature for each sample in the sample set by one or more processing units. The projecting and the updating for the sample set are repeated by one or more processing units until the number of features of each sample in the sample set reaches a predetermined criterion.Type: GrantFiled: September 29, 2020Date of Patent: April 23, 2024Assignee: International Business Machines CorporationInventors: Chun Lei Xu, Si Er Han, Shi Bin Liu, Yi Shao, Lei Tian, Hao Zheng, Jia Rui Wang
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Patent number: 11961567Abstract: A key storage device comprising a first key unit and a second key unit is disclosed. The first key unit is configured to output a first logic value through, comprising: a first setting circuit configured to output a first setting voltage; and a first inverter comprising a first output transistor having a first threshold voltage, configured to receive the first setting voltage and generate the first logic value. The second key unit is configured to output a second logic value through a second node, comprising: a second setting circuit configured to output a second setting voltage; and a second inverter comprising a second output transistor having a second threshold voltage, configured to receive the second setting voltage and generate the second logic value. The absolute value of first threshold voltage is lower than which of the second threshold voltage. The first setting voltage is higher than the second setting voltage.Type: GrantFiled: June 24, 2022Date of Patent: April 16, 2024Assignee: PUFsecurity CorporationInventors: Kai-Hsin Chuang, Chi-Yi Shao, Chun-Heng You
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Publication number: 20240105550Abstract: A device includes an integrated circuit die attached to a substrate; a lid attached to the integrated circuit die; a sealant on the lid; a spacer structure attached to the substrate adjacent the integrated circuit die; and a cooling cover attached to the spacer structure, wherein the cooling cover extends over the lid, wherein the cooling cover attached to the lid by the sealant. In an embodiment, the device includes a ring structure on the substrate, wherein the ring structure is between the spacer structure and the integrated circuit die.Type: ApplicationFiled: January 10, 2023Publication date: March 28, 2024Inventors: Tung-Liang Shao, Yu-Sheng Huang, Hung-Yi Kuo, Chen-Hua Yu
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Patent number: 11942556Abstract: A device includes a first channel layer, a second channel layer, a gate structure, a source/drain epitaxial structure, and a source/drain contact. The first channel layer and the second channel layer are arranged above the first channel layer in a spaced apart manner over a substrate. The gate structure surrounds the first and second channel layers. The source/drain epitaxial structure is connected to the first and second channel layers. The source/drain contact is connected to the source/drain epitaxial structure. The second channel layer is closer to the source/drain contact than the first channel layer is to the source/drain contact, and the first channel layer is thicker than the second channel layer.Type: GrantFiled: April 8, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Ru Lin, Shu-Han Chen, Yi-Shao Li, Chun-Heng Chen, Chi On Chui
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Publication number: 20240099111Abstract: There is provided a display substrate, including: a base; light-emitting units on a side of the base; a flat light-shielding functional layer, including a black matrix and a first planarization layer, on a side of the light-emitting units away from the base, light outgoing openings being provided in the black matrix and being in one-to-one correspondence with the light-emitting units, and the first planarization layer at least filling the light outgoing openings; and a color filter layer, including color filter patterns in one-to-one correspondence with the light outgoing openings, on a side of the flat light-shielding functional layer away from the base, an orthographic projection of each color filter pattern on the base covering an orthographic projection of the light outgoing opening corresponding to the color filter pattern on the base. A method for manufacturing a display substrate, a display panel and a display apparatus are further provided.Type: ApplicationFiled: July 1, 2022Publication date: March 21, 2024Inventors: Peng HOU, Yuan HE, Huaisen REN, Zhiliang SHAO, Pei LIU, Xiaoyi WANG, Chao YE, Yi PENG
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Publication number: 20240086464Abstract: A computer-implemented technique for decomposing semi-structured data is provided. In this technique, metadata for a predetermined number of records can be collected from semi-structured data that includes several records. A structured format is generated based on the metadata and the plurality of records is decomposed with the structured format.Type: ApplicationFiled: September 8, 2022Publication date: March 14, 2024Inventors: Lei Tian, Han Zhang, Yi Shao, Ying Xu, Fu Ju An, Yi Li
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Publication number: 20240083981Abstract: The present invention relates to the treatment of herpes simplex virus (HSV) infection using an anti-HSV antibody. In particular, the anti-HSV antibody specifically binds to the glycoprotein D (gD) of herpes simplex virus-1 (HSV-1) and herpes simplex virus-2 (HSV-2). The treatment of the present invention is effective against drug-resistant and/or recurrent HSV infection.Type: ApplicationFiled: September 1, 2023Publication date: March 14, 2024Applicant: United BioPharma, Inc.Inventors: Be-Sheng KUO, Chao-Hung LI, Hsiao-Yun SHAO, Yaw-Jen LIU, Shugene LYNN, Chang Yi WANG
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Publication number: 20240072776Abstract: An entropy source circuit, comprising: a first adjustable ring oscillator for operating under a first setting or a second setting according to a first control signal, for respectively generating a first oscillation clock signal and a second oscillation clock signal which have different frequencies under the first setting and the second setting; a first sampling circuit, for sampling the first oscillating clock signal according to the sampling frequency to generate first sampling values, or sampling the second oscillating clock signal according to the sampling frequency to generate second sampling values; a first detection circuit detecting a first distribution of the first sampling values; and a control circuit generating the first control signal to switch the first setting to the second setting when the first distribution does not meet a predetermined distribution. The entropy source circuit outputs entropy values according to the first sample value or the second sample value.Type: ApplicationFiled: July 6, 2023Publication date: February 29, 2024Applicant: PUFsecurity CorporationInventors: Chi-Yi Shao, Kai-Hsin Chuang, Meng-Yi Wu
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Publication number: 20240073622Abstract: A sound generator provided in the present disclosure includes a frame, a magnetic circuit unit, and a first vibration unit and a second vibration unit arranged on two sides of the magnetic circuit unit. The magnetic circuit unit includes a first central magnetic yoke in the middle, a central magnet fixed to the first central magnetic yoke, a magnetic component arranged around the central magnet and fixed to the frame, and a connecting portion connecting the first central magnetic yoke to the magnetic component. The central magnet includes a first magnet portion fixed to the first central magnetic yoke and a second magnet portion fixed to the side of the first magnet portion away from the first central magnetic yoke, a projection area of the first magnet portion along a vibrating direction is greater than a projection area of the second magnet portion along the vibrating direction.Type: ApplicationFiled: January 16, 2023Publication date: February 29, 2024Inventors: Xuedong Lv, Xiaoqiong Feng, Kun Yang, Zhen Huang, Yi Shao
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Publication number: 20240073615Abstract: The present disclosure discloses a sound device includes a frame, a magnet system, and a first vibration system and a second vibration system arranged on two sides of a magnet system. The magnet system includes a first central yoke, a central magnet mounted on the first central yoke, a side yoke surrounding the central magnet and fixed to the frame, and a connection portion connecting the first central yoke and the side yoke. The side yoke includes a first side yoke fixed to the frame and a second side yoke bending and extending from an edge of the first side yoke towards the central magnet; the connection portion connects the first central yoke and the second side yoke. The sound device in the present disclosure has higher magnetic ability and miniaturization ability.Type: ApplicationFiled: December 2, 2022Publication date: February 29, 2024Inventors: Xuedong Lv, Xiaoqiong Feng, Kun Yang, Zhen Huang, Yi Shao
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Publication number: 20240046185Abstract: Embodiments of the present invention provide computer-implemented methods, computer program products and computer systems. For example, embodiments of the present invention can, in response to receiving information, predict availability of respective services deployed in a cloud environment. Embodiments of the present invention can then calculate an elastic index based on the predicted availability of the respective services.Type: ApplicationFiled: August 3, 2022Publication date: February 8, 2024Inventors: Yi Shao, Ning Zhang, Lei Tian, Na Zhao, Rong Hong Wan
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Publication number: 20240030354Abstract: A device includes a first channel layer, a second channel layer, a gate structure, a source/drain epitaxial structure, and a source/drain contact. The first channel layer and the second channel layer are arranged above the first channel layer in a spaced apart manner over a substrate. The gate structure surrounds the first and second channel layers. The source/drain epitaxial structure is connected to the first and second channel layers. The source/drain contact is connected to the source/drain epitaxial structure. The second channel layer is closer to the source/drain contact than the first channel layer is to the source/drain contact, and the first channel layer is thicker than the second channel layer.Type: ApplicationFiled: September 26, 2023Publication date: January 25, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Ru LIN, Shu-Han CHEN, Yi-Shao LI, Chun-Heng CHEN, Chi On CHUI
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Patent number: 11876899Abstract: A random number generator includes a static random number generator, a dynamic entropy source, a counter and a combining circuit. The static random number generator includes an initial random number pool and a static random number pool to output a static random number sequence from one thereof the initial random number pool and the static random number pool. The dynamic entropy source is used to generate a dynamic entropy bit. The counter is used to generate a dynamic random number sequence according to the dynamic entropy bit. The combining circuit is used to output a true random number sequence to a lively random number pool according to the static random number sequence and the dynamic random number sequence. The static random number pool is updated when the lively random number pool is fully updated.Type: GrantFiled: July 22, 2020Date of Patent: January 16, 2024Assignee: PUFsecurity CorporationInventors: Meng-Yi Wu, Chi-Yi Shao, Ching-Sung Yang
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Patent number: 11870444Abstract: An entropy source circuit is provided. The entropy source circuit includes a digital circuit, a determination circuit and a time-to-digital converter (TDC), wherein the determination circuit is coupled to the digital circuit, and the TDC is coupled to the determination circuit. The digital circuit is configured to generate result data at a second time point according to input data received at a first time point, and the determination circuit is configured to perform determination on reference data with dynamic output generated by the digital circuit, to generate a determination result, wherein the reference data is equal to the result data. In addition, the TDC is configured to perform a time-to-digital conversion on a delay of the digital circuit for generating the result data according to the input data with aid of the determination signal, in order to generate entropy data corresponding to the delay.Type: GrantFiled: January 17, 2023Date of Patent: January 9, 2024Assignee: PUFsecurity CorporationInventors: Chun-Heng You, Kai-Hsin Chuang, Chi-Yi Shao
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Patent number: 11855140Abstract: A device includes a semiconductor nanostructure, and an oxide layer, which includes horizontal portions on a top surface and a bottom surface of the semiconductor nanostructure, vertical portions on sidewalls of the semiconductor nanostructure, and corner portions on corners of the semiconductor nanostructure. The horizontal portions have a first thickness. The vertical portions have a second thickness. The corner portions have a third thickness. Both of the second thickness and the third thickness are greater than the first thickness. A high-k dielectric layer surrounds the oxide layer. A gate electrode surrounds the high-k dielectric layer.Type: GrantFiled: July 7, 2021Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shu-Han Chen, Yi-Shao Li, Chun-Heng Chen, Chi On Chui
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Patent number: 11847539Abstract: An approach is provided in which the approach trains a first machine learning model using a set of features corresponding to a set of build blocks. The set of build blocks include at least one dependency build block and at least one artifact package build block. The approach predicts a set of risk values of the set of build blocks using the trained first machine learning model, and marks at least one of the build blocks as a bottleneck in response to comparing the set of risk values against a risk threshold.Type: GrantFiled: July 8, 2021Date of Patent: December 19, 2023Assignee: International Business Machines CorporationInventors: Ning Zhang, Yi Shao, Jing Xu, Xue Ying Zhang, Na Zhao
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Patent number: 11828722Abstract: A biological device includes a substrate, a gate electrode, and a sensing well. The substrate includes a source region, a drain region, a channel region, a body region, and a sensing region. The channel region is disposed between the source region and the drain region. The sensing region is at least disposed between the channel region and the body region. The gate electrode is at least disposed on or above the channel region of the substrate. The sensing well is at least disposed adjacent to the sensing region.Type: GrantFiled: December 16, 2019Date of Patent: November 28, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ta-Chuan Liao, Chien-Kuo Yang, Yi-Shao Liu, Tung-Tsun Chen, Chan-Ching Lin, Jui-Cheng Huang, Felix Ying-Kit Tsui, Jing-Hwang Yang
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Publication number: 20230378262Abstract: A device includes a semiconductor nanostructure, and an oxide layer, which includes horizontal portions on a top surface and a bottom surface of the semiconductor nanostructure, vertical portions on sidewalls of the semiconductor nanostructure, and corner portions on corners of the semiconductor nanostructure. The horizontal portions have a first thickness. The vertical portions have a second thickness. The corner portions have a third thickness. Both of the second thickness and the third thickness are greater than the first thickness. A high-k dielectric layer surrounds the oxide layer. A gate electrode surrounds the high-k dielectric layer.Type: ApplicationFiled: August 3, 2023Publication date: November 23, 2023Inventors: Shu-Han Chen, Yi-Shao Li, Chun-Heng Chen, Chi On Chui
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Publication number: 20230375499Abstract: A biological device includes a substrate, a gate electrode, and a sensing well. The substrate includes a source region, a drain region, a channel region, a body region, and a sensing region. The channel region is disposed between the source region and the drain region. The sensing region is at least disposed between the channel region and the body region. The gate electrode is at least disposed on or above the channel region of the substrate. The sensing well is at least disposed adjacent to the sensing region.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ta-Chuan LIAO, Chien-Kuo YANG, Yi-Shao LIU, Tung-Tsun CHEN, Chan-Ching LIN, Jui-Cheng HUANG, Felix Ying-Kit TSUI, Jing-Hwang YANG
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Patent number: D1014488Type: GrantFiled: November 4, 2022Date of Patent: February 13, 2024Inventor: Yi Shao