Abstract: A battery positive electrode material including lithium ferromanganese phosphate particles and active particles dispersed in voids between the lithium ferromanganese phosphate particles. The active particles include one or more of lithium nickel cobalt manganate particles, lithium nickel cobalt aluminate particles, lithium-rich manganese-based material particles, lithium cobaltate particles, spinel lithium manganate LiMn2O4 particles and layered lithium manganate LiMnO2 particles. The ratio of the median particle diameter of lithium ferromanganese phosphate to that of the active particles is between 3 and 8. In the battery positive electrode material, the content of percentage by weight of the lithium ferromanganese phosphate is between 70% and 90%, and the content of percentage by weight of the active particles is between 10% and 30%.

Abstract: An adaptive controller used in a photoplethysmography sensing system, comprises a plurality of hardware circuits which are configured to: receive a photoplethysmography signal (hereinafter, “PPG signal”) processed; determine whether the PPG signal processed satisfies with a requirement; output the PPG signal processed if the PPG signal processed satisfies with a requirement; and adjust a gain of an amplifier for amplifying the PPG signal and/or a driving signal of a light source if the PPG signal processed does not satisfy with a requirement.

Abstract: The present disclosure provides a memory structure, including a first interlayer dielectric layer (ILD), a second ILD over the first ILD, wherein at least a portion of an interconnect structure is in the second ILD, a first switch between the first ILD and the second ILD, a second switch over the first switch, and a first phase change material stacking with the first switch and the second switch.

Abstract: A light emitting device includes an epitaxial structure and first and second electrodes on a side of the epitaxial structure. The epitaxial structure includes a first-type semiconductor layer, an active layer, and a second-type semiconductor layer. The active layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The first electrode is disposed on the epitaxial structure to be electrically connected with the first-type semiconductor layer. The second electrode is disposed on the epitaxial structure to be electrically connected with the second-type semiconductor layer. The second electrode is in ohmic contact with a second-type window sublayer of the second-type semiconductor layer.

Abstract: A display substrate and related devices are provided. The display substrate includes a plurality of first sub-pixels, second sub-pixels and third sub-pixels. In a first direction, the first sub-pixels and the third sub-pixels are arranged alternately to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, the first sub-pixel rows and the second sub-pixel rows are arranged alternately in a second direction, connection lines of center points of two first sub-pixels and two third sub-pixels form a first virtual quadrilateral, the two first sub-pixels are located at two vertex angles of the first virtual quadrilateral which are opposite to each other, one second sub-pixel is located within the first virtual quadrilateral, and the first virtual quadrilateral includes two interior angles each being equal to 90° and two interior angles each being not equal to 90°.

Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.

Abstract: A semiconductor device includes a substrate, and a first transistor disposed on the substrate. The first transistor includes a first channel layer, a magnesium oxide layer, a first gate electrode, a first gate dielectric and first source/drain electrodes. A crystal orientation of the first channel layer is <100> or <110>. The magnesium oxide layer is located below the first channel layer and in contact with the first channel layer. The first gate electrode is located over the first channel layer. The first gate dielectric is located in between the first channel layer and the first gate electrode. The first source/drain electrodes are disposed on the first channel layer.

Abstract: A pixel driving circuit, a display panel and a driving method of the pixel driving circuit are provided by the present disclosure. The pixel driving circuit includes a driving transistor, a reset module, a writing module, a first control module, and a light emitting device. The pixel driving circuit with the 5T2C structure can compensate the threshold voltage drift of the driving transistor, improve the luminous uniformity of the light emitting device, and further improve the image quality.

Abstract: A method and system for real-time calculating a microseismic focal mechanism based on deep learning is provided, which belongs to the technical field of microseismic monitoring. The method includes: creating a training dataset, the training data including simulated DAS microseismic strain data and a focal mechanism corresponding to the simulated DAS microseismic strain data; training a focal mechanism calculation model by using the training dataset, with the simulated DAS microseismic strain data as an input and the focal mechanism corresponding to the simulated DAS microseismic strain data as a target output, so as to obtain a trained focal mechanism calculation model; collecting DAS microseismic strain data by a surface and downhole DAS acquisition system; performing preprocess operations such as removing abnormally large values on the DAS microseismic strain data; inputting the preprocessed DAS microseismic strain data into a trained focal mechanism calculation model to obtain a focal mechanism.

Abstract: A method of this disclosure may include performing a named entity recognition on text information related to requirements for a wireframe by a first artificial intelligence (AI) model, so as to extract entities and relations of the entities from the text information. The method may further comprise inputting the extracted entities and relations to a second AI model to generate the wireframe, wherein the second AI model is trained so that a difference between resultant relations of the entities of the generated wireframe and the extracted relations of the entities from the first AI model is decreased.

Abstract: Devices and methods for purifying lithium from lithium salts, including those with low concentration of lithium salts, are provided. A molten composition comprising a lithium salt is electrolyzed with an anode in contact with the molten composition and a cathode separated from the molten composition by a solid electrolyte capable of conducting lithium ions.

Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.

Abstract: Microelectromechanical devices and methods of manufacture are presented. Embodiments include bonding a mask substrate to a first microelectromechanical system (MEMS) device. After the bonding has been performed, the mask substrate is patterned. A first conductive pillar is formed within the mask substrate, and a second conductive pillar is formed within the mask substrate, the second conductive pillar having a different height from the first conductive pillar. The mask substrate is then removed.

Abstract: The invention provides a light-emitting image sensing module and a method for fabricating the same. The light-emitting image sensing module includes a circuit board, an image sensor, conductive carriers, light sources, an opaque lens barrel, and a lens module. The image sensor and the conductive carriers are arranged on the circuit board. The light sources are arranged on the conductive carrier. The opaque lens barrel is penetrated by a first hole and a second hole and arranged on the circuit board. The first hole sleeves the image sensor, and the second hole sleeves the conductive carriers and the light sources. The lens module is fixed in the first hole and arranged above the image sensor. The invention uses the circuit board to carry out the packaging process of the image sensor and the light source, so as to achieve the economic benefit.

Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.

Abstract: An optical film, an optical film set, a backlight module and a display device are provided. The optical film includes a main body, plural first prism structures and plural second prism structures. The main body has a first optical surface and a second optical surface. The first prism structures are disposed on the first optical surface. Each of the first prism structures extends along a first direction. The second prism structures are disposed on the second optical surface. Each of the second prism structures extends along a second direction. The first direction is different from the second direction.

Abstract: In an embodiment, a device includes: a semiconductor device; and a redistribution structure including: a first dielectric layer; a first grounding feature on the first dielectric layer; a second grounding feature on the first dielectric layer; a first pair of transmission lines on the first dielectric layer, the first pair of transmission lines being laterally disposed between the first grounding feature and the second grounding feature, the first pair of transmission lines being electrically coupled to the semiconductor device; a second dielectric layer on the first grounding feature, the second grounding feature, and the first pair of transmission lines; and a third grounding feature extending laterally along and through the second dielectric layer, the third grounding feature being physically and electrically coupled to the first grounding feature and the second grounding feature, where the first pair of transmission lines extend continuously along a length of the third grounding feature.

Abstract: The present application relates to the field of semiconductor manufacturing technologies, and in particular to a method and an apparatus for automatically processing wafers. The method for automatically processing the wafers includes the following steps: providing several wafers, wherein the wafers operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers; determining whether there is a need for detecting defects of the wafers, and if yes, automatically switching an operating path of the wafers to a secondary path; detecting the defects of the wafers in the secondary path; and determining whether the defect detection on the wafers is finished, and if yes, automatically switching the operating path of the wafers to the primary path. The application makes it possible to automatically detect the defects of the wafers with different SWR conditions, thereby improving the automation degree of machines.

Abstract: In various example embodiments, techniques are provided for efficient and reliable anomaly detection and evaluation in a water distribution system (e.g., a smart water distribution system) using both flow and pressure time series data from sensors of the system. The techniques may implement a multi-step workflow that involves decomposing the time series data to remove seasonality and rendering the time series data stationary, detecting outliers of the stationary time series data, classifying sensor events in response to flow or pressure of detected outliers exceeding high or low thresholds for at least a given number of time steps, classifying anomaly events by correlating one or more sensor events related to flow with one or more sensor events related to pressure or by clustering a plurality of sensor events in temporal proximity, and determining a quantitative score for each of the detected anomaly events that indicates a level of significance or importance.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.