Patents by Inventor Yi Yu
Yi Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12232425Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.Type: GrantFiled: November 21, 2023Date of Patent: February 18, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
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Publication number: 20250053210Abstract: A laptop computer including a host, a movable door, a display, an input module, and a fan is provided. The host has a first surface and a second surface opposite to each other. The movable door is disposed on the second surface. The display is pivoted to the host to be folding on the first surface or unfolding from the first surface. The input module is disposed on the first surface. The fan is disposed in the host, and the movable door covers the fan. When the movable door is removed from the fan, an impeller of the fan is exposed from the host via the second surface.Type: ApplicationFiled: January 19, 2024Publication date: February 13, 2025Applicant: Acer IncorporatedInventors: Chun-Hung Wen, Hui-Ping Sun, Chun-Hsien Chen, Jui-Yi Yu, Yen-Chou Chueh
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Publication number: 20250053667Abstract: In an embodiment, a system is provided in which the private key is managed in hardware and is not visible to software. The system may provide hardware support for public key generation, digital signature generation, encryption/decryption, and large random prime number generation without revealing the private key to software. The private key may thus be more secure than software-based versions. In an embodiment, the private key and the hardware that has access to the private key may be integrated onto the same semiconductor substrate as an integrated circuit (e.g. a system on a chip (SOC)). The private key may not be available outside of the integrated circuit, and thus a nefarious third party faces high hurdles in attempting to obtain the private key.Type: ApplicationFiled: July 16, 2024Publication date: February 13, 2025Inventors: Timothy R. Paaske, Mitchell D. Adler, Conrad Sauerwald, Fabrice L. Gautier, Shu-Yi Yu
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Publication number: 20250045941Abstract: A depth camera capable of measuring the oblique velocity of an object is provided, wherein a depth camera capable of measuring the lateral velocity of an object includes a depth camera body, a first configuration file, and a lateral velocity calculation system. The lateral velocity calculation system includes: first image-processing software for recording a first depth distance at which images are taken of an object and for calculating the number of pixels corresponding to a lateral movement of the object and the duration of the lateral movement; and lateral velocity calculation software for calculating the lateral velocity of the object. The depth camera capable of measuring the oblique velocity of an object allows the lateral/longitudinal/oblique velocity of an object to be measured in real time using image-related techniques.Type: ApplicationFiled: October 11, 2023Publication date: February 6, 2025Inventors: Wen-Hsin SUN, Jun-Yi YU, Siang-Siuan TSAI, Guan-Wei HUANG, Ching-Cherng SUN
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Patent number: 12213328Abstract: The present disclosure relates to a silicon/perovskite tandem solar cell and a preparation method thereof and belongs to the technical field of perovskite tandem cells. The silicon/perovskite tandem solar cell includes a silicon bottom cell and a perovskite top cell, in which a seed crystal silicon layer and a tunneling layer are sequentially arranged between a surface of the silicon bottom cell and a bottom surface of the perovskite top cell, the seed crystal silicon layer being adjacent to the silicon bottom cell, and the tunneling layer being adjacent to the perovskite top cell. Here, the seed crystal silicon layer is an amorphous silicon layer, and the tunneling layer is a doped microcrystalline silicon oxide layer. The cell facilitates the tunneling between the silicon bottom cell and the perovskite top cell, thereby improving the open circuit voltage and the conversion efficiency of the cell.Type: GrantFiled: April 27, 2022Date of Patent: January 28, 2025Assignee: Tongwei Solar (Chengdu) Co., Ltd.Inventors: Jianfeng Xue, Maoli Zhu, Yongjie Wang, Yi Yu, Shijie Su
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Patent number: 12196282Abstract: A method and a system for monitoring wear of a braking frictional pad of a motor vehicle, includes stopping the motor vehicle stably on a horizontal or substantially horizontal plane; determining a current fluid level in a brake fluid reservoir; determining a volume difference (?VL) of the brake fluid in the brake fluid reservoir by comparing the determined current fluid level with a predetermined reference fluid level; when a thickness loss of a braking frictional pad equipped for a front vehicle wheel or a rear vehicle wheel is known, determining a thickness loss of a braking frictional pad assigned for the other front vehicle wheel or the other rear vehicle wheel based on the volume difference of the brake fluid in the brake fluid reservoir and a diameter of a brake piston of the respective brake device.Type: GrantFiled: May 17, 2022Date of Patent: January 14, 2025Assignee: Volvo Car CorporationInventors: Yongxing Jin, Ming Yuan, Yi Yu
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Patent number: 12199029Abstract: Various embodiments of the present application are directed towards a metal-insulator-metal (MIM) capacitor. The MIM capacitor comprises a bottom electrode disposed over a semiconductor substrate. A top electrode is disposed over and overlies the bottom electrode. A capacitor insulator structure is disposed between the bottom electrode and the top electrode. The capacitor insulator structure comprises at least three dielectric structures vertically stacked upon each other. A bottom half of the capacitor insulator structure is a mirror image of a top half of the capacitor insulator structure in terms of dielectric materials of the dielectric structures.Type: GrantFiled: July 18, 2022Date of Patent: January 14, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsing-Lien Lin, Cheng-Te Lee, Rei-Lin Chu, Chii-Ming Wu, Yeur-Luen Tu, Chung-Yi Yu
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Publication number: 20250014984Abstract: In some implementations described herein, a capacitor structure may include a metal-insulator-metal structure in which work function metal layers are included between the insulator layer of the capacitor structure and the conductive electrode layers of the capacitor structure. The work function metal layers may enable high-k dielectric materials to be used for the insulator layer in that the work function metal layers may provide an increased electron barrier height between the insulator layer and the conductive electrode layers, which may increase the breakdown voltage and may reduce the current leakage for the capacitor structure.Type: ApplicationFiled: July 3, 2023Publication date: January 9, 2025Inventors: Bi-Shen LEE, Chia-Hua LIN, Hai-Dang TRINH, Chung-Yi YU, Cheng-Yuan TSAI
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Publication number: 20250008779Abstract: A display panel, a display apparatus, and a method for manufacturing a display panel. The display panel includes a base plate, an isolation structure, a light-emitting functional layer, and a plurality of first electrodes, the isolation structure includes a first portion and a second portion; the light-emitting functional layer includes first light-emitting portions and second light-emitting portions; an edge of the first electrode overlaps the first portion, a shortest connecting line between an edge of the first electrode portion and the first edge is a first connecting line, a shortest connecting line between an edge of the second electrode portion and the second edge is a second connecting line, and an angle between the second connecting line and a plane in which the base plate is located is less than an angle between the first connecting line and the plane.Type: ApplicationFiled: May 24, 2024Publication date: January 2, 2025Applicant: Hefei Visionox Technology Co., Ltd.Inventors: Liusong NI, Yiming XIAO, Yuan YAO, Yi-Yu LAI, Xuejing ZHU, Yuting FU
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Publication number: 20240431150Abstract: The present application relates to a display panel, a display apparatus, and a method for manufacturing a display panel. The display panel includes: a base plate including a pixel definition layer, the pixel definition layer including a plurality of pixel openings, an isolation structure being arranged at a side of the base plate close to the pixel definition layer, and an orthographic projection of the isolation structure on the pixel definition layer being spaced apart from the pixel opening and arranged around the pixel opening; a plurality of sub-pixels; and an encapsulation structure including a plurality of sub-encapsulation portions, the sub-encapsulation portion including a first encapsulation sub-layer and a second encapsulation sub-layer and in a thickness direction of the display panel, an area of an orthographic projection of the second encapsulation sub-layer being less than an area of an orthographic projection of the first encapsulation sub-layer.Type: ApplicationFiled: August 13, 2024Publication date: December 26, 2024Applicants: Hefei Visionox Technology Co., Ltd., Visionox Technology Inc.Inventors: Liusong NI, Yiming XIAO, Yi-Yu LAI, Lipeng GAO, Yuan YAO, Zhengkui DONG, Xuejing ZHU, Murong XUE, Haohan ZHANG, Zihan WANG, Zhenhai YUE, Bowen YANG
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Publication number: 20240428745Abstract: A processing system for simultaneously presenting brightness performance of different areas on a single display screen includes: a detection processor and a control processor. The detection processor performs a multi-point photometry of a pre-imaging area to find out the difference in ambient light intensity distribution among the points on the display screen after a display device is installed, where the pre-imaging area refers to an area of a display device set up or projected for viewing. The control processor connected to the detection processor for correspondingly cutting a screen range of the display device into multiple modulation areas based on the ambient light intensity difference of the pre-imaging area. In this way, the display screen can be adjusted to adapt to various environments with differences in brightness or position.Type: ApplicationFiled: June 12, 2024Publication date: December 26, 2024Inventors: YI-YU TSAI, SHAO-WEI CHIU, YIN-CHENG HUANG
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Publication number: 20240427815Abstract: Provided are a method for multimedia recommendation and an apparatus thereof. The method for multimedia recommendation includes: obtaining first user data of a user wearing a wearable device that is collected by the wearable device; obtaining second user data of the user, where the second user data includes at least one of attribute data of the user or multimedia preference data of the user; obtaining scenario data corresponding to a current multimedia usage scenario; determining a target multimedia item from a plurality of candidate multimedia items based on the first user data, the second user data and the scenario data; and recommending the target multimedia item to the user.Type: ApplicationFiled: September 10, 2024Publication date: December 26, 2024Inventors: Cong Zhang, Yi Yu, Zi Meng, Guokang Zhu
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Publication number: 20240423023Abstract: A display panel in the present application includes: a base plate; a plurality of first electrodes disposed on a side of the base plate, first openings are formed between adjacent ones of the first electrodes; an insulation layer disposed on a side of the first electrodes away from the base plate, at least a part of the insulation layer is located within the first openings, the insulation layer includes second openings that run through the insulation layer, and an orthographic projection of the second opening on the base plate overlaps at least partially with an orthographic projection of the first electrode on the base plate; and at least one isolation structure disposed on a side of the insulation layer away from the base plate, an orthographic projection of the first opening on the base plate is located within an orthographic projection of the isolation structure on the base plate.Type: ApplicationFiled: May 3, 2024Publication date: December 19, 2024Applicant: Hefei Visionox Technology Co., Ltd.Inventors: Liusong NI, Yiming XIAO, Yuan YAO, Yi-Yu LAI, Xuejing ZHU
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Publication number: 20240421235Abstract: A semiconductor device and a semiconductor device manufacturing method. The semiconductor device includes: a substrate; an epitaxial layer, located on one side of the substrate, where a doped region is formed on a surface that is of the epitaxial layer and that is away from the substrate, and the epitaxial layer includes an active region and a termination region that surrounds the active region; a passivation layer, covering the termination region and on which a window corresponding to the active region is formed; and a metal layer, covering the window and an inner edge that is of the passivation layer and that forms the window, and forming a schottky contact with the active region in the window.Type: ApplicationFiled: August 23, 2024Publication date: December 19, 2024Applicant: Huawei Digital Power Technologies Co., Ltd.Inventors: Yi YU, Chia Fu LIU, Yuru WANG, Bo GAO, Longgu TANG, Xin WANG, Dongguang ZHAO, Shijin LUO
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Publication number: 20240421187Abstract: A semiconductor device (having a VFET architecture) includes: first and second active regions (ARs); first and second metal-to-gate (MG) contacts proximal to channel regions of the first and second ARs; metal-to-source/drain (MD) contacts and buried MD (BMD) contacts correspondingly coupled to first and second S/D regions correspondingly of the first and second ARs; and a metal-to-gate (MP) contact at a same level as the MG contacts, and extending between and coupling together the first and second MG contacts; and relative to a first direction, the first and second ARs being substantially aligned; and at least a portion of the MP contact extending substantially beyond each of the first and second ARs relative to a perpendicular second direction.Type: ApplicationFiled: June 16, 2023Publication date: December 19, 2024Inventors: Yi Yu CHEN, Chi-Yu LU, Chih-Liang CHEN
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Publication number: 20240398901Abstract: The present application provides a process for manufacturing an orally disintegrating tablet (ODT) comprising a cytokine as an active pharmaceutical ingredient comprising: acidifying an excipient, conducting a first granulation step of the acidified excipient to obtain acidic powders, and conducting a second granulation step by mixing the acidic powders and the cytokine to obtain granules containing the cytokine. The present application also provides an ODT manufactured by the process.Type: ApplicationFiled: June 4, 2024Publication date: December 5, 2024Applicant: AINOS INC. TAIWAN BRANCH (USA)Inventors: Tsung-Fu YU, Yi-Yu TIEN, Chun-Hsien TSAI, Ting-Chuan LEE, Chun-Jung TSAI
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Publication number: 20240384089Abstract: A contact lens including at least one silicone monomer is provided, wherein the surface of the contact lens includes polyacrylic acid and/or sodium polyacrylate, and the molecular weight of the polyacrylic acid and/or the sodium polyacrylate is greater than 100 kDa. The present invention further provides a silicone hydrogel contact lens. The contact lens and the silicone hydrogel contact lens provided by the present invention have the advantages of good hydrophilicity and being suitable for consumers' long-time wearing.Type: ApplicationFiled: May 13, 2024Publication date: November 21, 2024Inventors: WEI-HANG HSU, CHU-YI YU, YAO-TSUNG CHENG
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Patent number: 12148706Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip comprising a semiconductor device that is inverted and that overlies a dielectric region inset into a top of a semiconductor substrate. An interconnect structure overlies the semiconductor substrate and the dielectric region and further comprises an intermetal dielectric (IMD) layer. The IMD layer is bonded to the top of the semiconductor substrate and accommodates a pad. A semiconductor layer overlies the interconnect structure, and the semiconductor device is in the semiconductor layer, between the semiconductor layer and the interconnect structure. The semiconductor device comprises a first source/drain electrode overlying the dielectric region and further overlying and electrically coupled to the pad. The dielectric region reduces substrate capacitance to decrease substrate power loss and may, for example, be a cavity or a dielectric layer. A contact extends through the semiconductor layer to the pad.Type: GrantFiled: April 18, 2023Date of Patent: November 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Xin-Hua Huang, Chung-Yi Yu, Kuei-Ming Chen
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Publication number: 20240381793Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a bottom electrode over a substrate. A top electrode overlies the bottom electrode. A capping structure is disposed between the top electrode and the bottom electrode. The capping structure comprises a diffusion barrier layer vertically stacked with a metal layer. A switching structure is disposed between the bottom electrode and the capping structure. The switching structure comprises a dielectric layer on the bottom electrode and a first oxygen affinity layer on the dielectric layer. A first Gibbs free energy of the first oxygen affinity layer is less than a second Gibbs free energy of the dielectric layer. A first difference between the first Gibbs free energy and the second Gibbs free energy is less than ?100 kJ/mol.Type: ApplicationFiled: January 29, 2024Publication date: November 14, 2024Inventors: Fa-Shen Jiang, Hai-Dang Trinh, Cheng-Yuan Tsai, Chung-Yi Yu
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Publication number: 20240379724Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes an epitaxial structure disposed on a semiconductor substrate. A photodetector is disposed at least partially in the epitaxial structure. A first capping layer is disposed on the semiconductor substrate and covers the epitaxial structure. A second capping layer is disposed vertically between the first capping layer and the epitaxial structure. The first capping layer extends laterally past outermost sidewalls of the epitaxial structure and the second capping layer.Type: ApplicationFiled: July 25, 2024Publication date: November 14, 2024Inventors: Po-Chun Liu, Chung-Yi Yu, Eugene Chen