Patents by Inventor Yimin Huang

Yimin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11189650
    Abstract: An image sensor structure and manufacturing method thereof are provided. The image sensor structure includes a substrate with a first surface. A first doped region of a first conductivity type is in the substrate and under the first surface. A second doped region of a second conductivity type is in the substrate and under the first surface. A gate structure is on the first surface of the substrate and overlapping a boundary of the first doped region and the second doped region. The epitaxial structure is on the first surface of the substrate. A method for manufacturing an image sensor structure is also provided.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: November 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Yimin Huang
  • Publication number: 20210351218
    Abstract: The present disclosure relates to a semiconductor device including a semiconductor substrate. A grid structure extends from a first side of the semiconductor substrate to within the semiconductor substrate. An image sensing element is disposed within the semiconductor substrate and is laterally surrounded by the grid structure. A plurality of protrusions are arranged along the first side of the semiconductor substrate. The plurality of protrusions are disposed over the image sensing element and are laterally surrounded by the grid structure. The plurality of protrusions are substantially identical to one another and have a characteristic dimension. An inner surface of the grid structure facing the image sensing element is spaced apart from a point of one of the plurality of protrusions by a predetermined reflective length that is based on the characteristic dimension of the plurality of protrusions.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Inventors: Chin-Chia Kuo, Jhy-Jyi Sze, Tung-Ting Wu, Yimin Huang
  • Publication number: 20210313383
    Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Yen-Ting Chiang, Ching-Chun Wang, Dun-Nian Yaung, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Yimin Huang
  • Patent number: 11139367
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: October 5, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jung-I Lin, Jhy-Jyi Sze, Alexander Kalnitsky, Yimin Huang, King Liao, Shen-Hui Hong
  • Publication number: 20210280620
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Application
    Filed: May 5, 2021
    Publication date: September 9, 2021
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Publication number: 20210272991
    Abstract: Various embodiments of the present disclosure are directed towards a capacitor structure comprising a plurality of first conductive layers that are vertically stacked over one another and overlie a substrate. The plurality of first conductive layers respectively contact an adjacent first conductive layer in a first connection region. A plurality of second conductive layers are respectively stacked between adjacent ones of the plurality of first conductive layers. The plurality of second conductive layers respectively contact an adjacent second conductive layer in a second connection region. A dielectric structure separates the plurality of first conductive layers and the plurality of second conductive layers. At least a portion of a lower first conductive layer in the plurality of first conductive layers directly underlies the second connection region.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventor: Yimin Huang
  • Publication number: 20210265412
    Abstract: The present disclosure, in some embodiments, relates to an image sensing integrated chip. The image sensing integrated chip includes a semiconductor substrate having sidewalls defining one or more trenches on opposing sides of a region of the semiconductor substrate. One or more dielectrics are disposed within the one or more trenches. The semiconductor substrate has a plurality of flat surfaces arranged between the one or more trenches. Adjacent ones of the plurality of flat surfaces define a plurality of triangular shaped protrusions and alternative ones of the plurality of flat surfaces are substantially parallel to one another, as viewed along a cross-sectional view.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 26, 2021
    Inventors: Tung-Ting Wu, Jhy-Jyi Sze, Yimin Huang
  • Patent number: 11088196
    Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ting Chiang, Ching-Chun Wang, Dun-Nian Yaung, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Yimin Huang
  • Patent number: 11075242
    Abstract: The present disclosure relates to a semiconductor device having a lateral resonance structure to coherently reflect light toward the image sensor. The semiconductor device includes an image sensing element arranged within a substrate. A radiation absorption region is arranged within the substrate and above the image sensor, and contains an array of protrusions having a characteristic dimension and an outer border. A resonant structure containing a plurality of deep trench isolation (DTI) structures is disposed on opposing sides of the image sensing element. The (DTI) structures surround the outer border of the array of protrusions. An inner surface of the DTI structure is laterally spaced apart from the outer border of the array of protrusions by a reflective length based on the characteristic dimension of the array of protrusions, thus affecting coherent reflection of light back toward the image sensor.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Chia Kuo, Jhy-Jyi Sze, Tung-Ting Wu, Yimin Huang
  • Patent number: 11063080
    Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalk form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalk and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: July 13, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Alexander Kalnitsky, Jhy-Jyi Sze, Dun-Nian Yaung, Chen-Jong Wang, Yimin Huang, Yuichiro Yamashita
  • Patent number: 11018169
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a capacitor. The capacitor is over a substrate and includes a first electrode having a plurality of first electrode layers that are vertically stacked over one another. The plurality of first electrode layers respectively contact an adjacent first electrode layer in a plurality of first connection regions. A second electrode including a plurality of second electrode layers that are vertically stacked over one another. The plurality of second electrode layers respectively contact an adjacent second electrode layer in a plurality of second connection regions. The plurality of second electrode layers are respectively stacked between adjacent ones of the plurality of first electrode layers. A capacitor dielectric structure separates the plurality of first electrode layers and the plurality of second electrode layers.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 25, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Yimin Huang
  • Publication number: 20210151495
    Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 20, 2021
    Inventors: Yen-Ting Chiang, Ching-Chun Wang, Dun-Nian Yaung, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Yimin Huang
  • Patent number: 11004880
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Patent number: 10991746
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensing element disposed within a pixel region of a substrate. A plurality of conductive interconnect layers are disposed within a dielectric structure arranged along a first side of the substrate. A second side of the substrate includes a plurality of interior surfaces arranged directly over the image sensing element. The plurality of interior surfaces respectively include a substantially flat surface that extends along a plane.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: April 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tung-Ting Wu, Jhy-Jyi Sze, Yimin Huang
  • Publication number: 20210118933
    Abstract: A method for forming a semiconductor image sensor includes following operation. A first substrate including a first front side and a first back side is provided. The first substrate includes a first interconnect structure disposed over the first front side. An insulating structure is formed over the first back side of the first substrate. A conductor penetrating the insulating structure and the first substrate is formed and a first bonding pad is formed in the insulating structure. A second substrate including a second front side and a second back side is provided with the second front side facing the first back side of the first substrate. The second substrate includes a second interconnect structure over the second front side and a second bonding pad coupled to the second interconnect structure. The first bonding pad is bonded to the second bonding pad to form a first bonded structure.
    Type: Application
    Filed: December 3, 2020
    Publication date: April 22, 2021
    Inventors: JHY-JYI SZE, YIMIN HUANG, DUN-NIAN YAUNG
  • Publication number: 20210098392
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a crack-stop structure disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. Photodetectors are disposed within the semiconductor substrate and are laterally spaced within a device region. An interconnect structure is disposed along the front-side surface. The interconnect structure includes a seal ring structure. A crack-stop structure is disposed within the semiconductor substrate and overlies the seal ring structure. The crack-stop structure continuously extends around the device region.
    Type: Application
    Filed: October 1, 2019
    Publication date: April 1, 2021
    Inventors: Tung-Ting Wu, Chen-Jong Wang, Jen-Cheng Liu, Yimin Huang, Chin-Chia Kuo
  • Publication number: 20210074758
    Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a doped isolation structure separating a photodiode and a pixel device. The photodiode is arranged within the substrate away from a front-side of the substrate. A pixel device is disposed at the front-side of the substrate overlying the photodiode and is separated from the photodiode by the doped isolation structure. Comparing to previous image sensor designs, where an upper portion of the photodiode is commonly arranged at a top surface of a front-side of the substrate, now the photodiode is arranged away from the top surface and leaves more room for pixel devices. Thus, a larger pixel device can be arranged in the sensing pixel, and short channel effect and noise level can be improved.
    Type: Application
    Filed: September 11, 2019
    Publication date: March 11, 2021
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jhy-Jyi Sze, Yimin Huang
  • Publication number: 20210057469
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a capacitor. The capacitor is over a substrate and includes a first electrode having a plurality of first electrode layers that are vertically stacked over one another. The plurality of first electrode layers respectively contact an adjacent first electrode layer in a plurality of first connection regions. A second electrode including a plurality of second electrode layers that are vertically stacked over one another. The plurality of second electrode layers respectively contact an adjacent second electrode layer in a plurality of second connection regions. The plurality of second electrode layers are respectively stacked between adjacent ones of the plurality of first electrode layers. A capacitor dielectric structure separates the plurality of first electrode layers and the plurality of second electrode layers.
    Type: Application
    Filed: August 19, 2019
    Publication date: February 25, 2021
    Inventor: Yimin Huang
  • Publication number: 20210028208
    Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.
    Type: Application
    Filed: October 14, 2020
    Publication date: January 28, 2021
    Inventor: Yimin Huang
  • Publication number: 20210005649
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Application
    Filed: September 16, 2020
    Publication date: January 7, 2021
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang