Patents by Inventor Yimin Huang
Yimin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11600644Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.Type: GrantFiled: October 14, 2020Date of Patent: March 7, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Yimin Huang
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Publication number: 20230048405Abstract: The present disclosure relates to neural network optimization methods and apparatuses in the field of artificial intelligence. One example method includes sampling preset hyperparameter search space to obtain multiple hyperparameter combinations. Multiple iterative evaluations are performed on the multiple hyperparameter combinations to obtain multiple performance results of each hyperparameter combination. Any iterative evaluation comprises obtaining at least one performance result of each hyperparameter combination, and if a hyperparameter combination meets a first preset condition, re-evaluating the hyperparameter combination to obtain a re-evaluated performance result of the hyperparameter combination. An optimal hyperparameter combination is determined. If the optimal hyperparameter combination does not meet a second preset condition, a preset model is updated, based on the multiple performance results of each hyperparameter combination, for next sampling.Type: ApplicationFiled: October 27, 2022Publication date: February 16, 2023Inventors: Yimin HUANG, Yujun LI, Zhenguo LI
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Publication number: 20230045965Abstract: An igniter for a combustor of a turbomachine includes a fuel inlet in fluid communication with a mixing plenum. The mixing plenum is positioned upstream of a mixing channel. An air inlet is in fluid communication with the mixing plenum and an ignition source is in operative communication with the mixing channel. The igniter may include a mounting flange configured for coupling the igniter to the combustor. The ignition source may be positioned proximate to a downstream end of the mixing channel and upstream of the mounting flange. The mixing channel may define a venturi shape. The venturi shape includes a converging section between an upstream end of the mixing channel and a venturi throat.Type: ApplicationFiled: October 27, 2022Publication date: February 16, 2023Inventors: Lucas John Stoia, Yimin Huang, Abdul Khan, Thomas Edward Johnson, Heath M. Ostebee, Jayaprakash Natarajan
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Patent number: 11574940Abstract: Various embodiments of the present disclosure are directed towards a capacitor structure comprising a plurality of first conductive layers that are vertically stacked over one another and overlie a substrate. The plurality of first conductive layers respectively contact an adjacent first conductive layer in a first connection region. A plurality of second conductive layers are respectively stacked between adjacent ones of the plurality of first conductive layers. The plurality of second conductive layers respectively contact an adjacent second conductive layer in a second connection region. A dielectric structure separates the plurality of first conductive layers and the plurality of second conductive layers. At least a portion of a lower first conductive layer in the plurality of first conductive layers directly underlies the second connection region.Type: GrantFiled: May 19, 2021Date of Patent: February 7, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Yimin Huang
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Patent number: 11538837Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.Type: GrantFiled: May 5, 2021Date of Patent: December 27, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
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Patent number: 11522002Abstract: A method for forming a semiconductor image sensor includes following operation. A first substrate including a first bottom side and a first top side is provided. A first interconnect structure is disposed under the first bottom side of the first substrate. An insulating structure is formed over the first top side of the first substrate. A conductor penetrating the insulating structure and the first substrate is formed and a first bonding pad is formed in the insulating structure. A second substrate including a second bottom side and a second top side is provided with the second bottom side facing the first top side of the first substrate. A second interconnect structure is disposed under the second bottom side of the second substrate, and a second bonding pad is coupled to the second interconnect structure. The first bonding pad is bonded to the second bonding pad to form a first bonded structure.Type: GrantFiled: December 3, 2020Date of Patent: December 6, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jhy-Jyi Sze, Yimin Huang, Dun-Nian Yaung
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Patent number: 11519334Abstract: An igniter for a combustor of a turbomachine includes a fuel inlet in fluid communication with a mixing plenum. The mixing plenum is positioned upstream of a mixing channel. An air inlet is in fluid communication with the mixing plenum and an ignition source is in operative communication with the mixing channel. The igniter may include a mounting flange configured for coupling the igniter to the combustor. The ignition source may be positioned proximate to a downstream end of the mixing channel and upstream of the mounting flange. The mixing channel may define a venturi shape. The venturi shape includes a converging section between an upstream end of the mixing channel and a venturi throat.Type: GrantFiled: July 31, 2017Date of Patent: December 6, 2022Assignee: General Electric CompanyInventors: Lucas John Stoia, Yimin Huang, Abdul Khan, Thomas Edward Johnson, Heath M. Ostebee, Jayaprakash Natarajan
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Publication number: 20220246549Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor device, the method including forming a plurality of photodetectors in a substrate. A device isolation structure is formed within the substrate. The device isolation structure laterally wraps around the plurality of photodetectors. An outer isolation structure is formed within the substrate. The device isolation structure is spaced between sidewalls of the outer isolation structure. The device isolation structure and the outer isolation structure comprise a dielectric material.Type: ApplicationFiled: April 21, 2022Publication date: August 4, 2022Inventors: Tung-Ting Wu, Chen-Jong Wang, Jen-Cheng Liu, Yimin Huang, Chin-Chia Kuo
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Publication number: 20220216262Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a vertical transfer gate extending vertically from a front-side of a substrate to a first position within the substrate and a photodiode doped region disposed under and extending laterally toward one side of the vertical transfer gate. A doped lateral isolation region disposed along a top surface of the photodiode doped region, and a doped vertical isolation region disposed along a sidewall of the vertical transfer gate. A doped pixel device well is vertically above the doped lateral isolation region and separated from the vertical transfer gate by the doped vertical isolation region. A pixel device is disposed within the doped pixel device well at the front-side of the substrate.Type: ApplicationFiled: March 24, 2022Publication date: July 7, 2022Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jhy-Jyi Sze, Yimin Huang
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Patent number: 11348881Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a crack-stop structure disposed within a semiconductor substrate. The semiconductor substrate has a back-side surface and a front-side surface opposite the back-side surface. Photodetectors are disposed within the semiconductor substrate and are laterally spaced within a device region. An interconnect structure is disposed along the front-side surface. The interconnect structure includes a seal ring structure. A crack-stop structure is disposed within the semiconductor substrate and overlies the seal ring structure. The crack-stop structure continuously extends around the device region.Type: GrantFiled: October 1, 2019Date of Patent: May 31, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Ting Wu, Chen-Jong Wang, Jen-Cheng Liu, Yimin Huang, Chin-Chia Kuo
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Patent number: 11309348Abstract: The present disclosure relates to a CMOS image sensor having a doped isolation structure separating a photodiode and a pixel device, and an associated method of formation. In some embodiments, the CMOS image sensor has a doped isolation structure separating a photodiode and a pixel device. The photodiode is arranged within the substrate away from a front-side of the substrate. A pixel device is disposed at the front-side of the substrate overlying the photodiode and is separated from the photodiode by the doped isolation structure. Comparing to previous image sensor designs, where an upper portion of the photodiode is commonly arranged at a top surface of a front-side of the substrate, now the photodiode is arranged away from the top surface and leaves more room for pixel devices. Thus, a larger pixel device can be arranged in the sensing pixel, and short channel effect and noise level can be improved.Type: GrantFiled: September 11, 2019Date of Patent: April 19, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jhy-Jyi Sze, Yimin Huang
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Patent number: 11243176Abstract: The present disclosure provides an automatic exposure control method, including: providing an object to be tested; providing an image sensor, including a photosensitive element array composed of a plurality of photosensitive elements arranged in an array, and the photosensitive element array includes at least a plurality of first photosensitive elements and a plurality of second photosensitive elements; turning on the radiation source, and the first readout signals on the first photosensitive elements are read after exposing the area to be tested for the first preset time; continuing the exposure for the second preset time, turning off the photosensitive elements and reading the second readout signals on the second photosensitive elements; acquiring the preset dose threshold of the area to be tested based on the second and first readout signals, and obtaining the remaining time to reach the preset radiation dose to control the exposure of the radiation source.Type: GrantFiled: February 21, 2020Date of Patent: February 8, 2022Assignee: IRAY TECHNOLOGY COMPANY LIMITEDInventor: Yimin Huang
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Patent number: 11208959Abstract: A system includes a gas turbine system having a first compressor, a combustor, and a turbine, where the first compressor provides a first portion of a discharge air directly to the combustor. The system includes a fluid circuit which receives a fluid comprising a second portion of the discharge air from the first compressor or a combustible fluid and provides the second portion of the discharge air to fuel at a location upstream of the combustor to alter a chemical and physical characteristic of the fuel in an air-fuel mixture that is provided to the combustor.Type: GrantFiled: November 9, 2016Date of Patent: December 28, 2021Assignee: General Electric CompanyInventors: Yimin Huang, Manuel Cardenas, Hua Zhang
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Patent number: 11189650Abstract: An image sensor structure and manufacturing method thereof are provided. The image sensor structure includes a substrate with a first surface. A first doped region of a first conductivity type is in the substrate and under the first surface. A second doped region of a second conductivity type is in the substrate and under the first surface. A gate structure is on the first surface of the substrate and overlapping a boundary of the first doped region and the second doped region. The epitaxial structure is on the first surface of the substrate. A method for manufacturing an image sensor structure is also provided.Type: GrantFiled: April 29, 2019Date of Patent: November 30, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventor: Yimin Huang
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Publication number: 20210351218Abstract: The present disclosure relates to a semiconductor device including a semiconductor substrate. A grid structure extends from a first side of the semiconductor substrate to within the semiconductor substrate. An image sensing element is disposed within the semiconductor substrate and is laterally surrounded by the grid structure. A plurality of protrusions are arranged along the first side of the semiconductor substrate. The plurality of protrusions are disposed over the image sensing element and are laterally surrounded by the grid structure. The plurality of protrusions are substantially identical to one another and have a characteristic dimension. An inner surface of the grid structure facing the image sensing element is spaced apart from a point of one of the plurality of protrusions by a predetermined reflective length that is based on the characteristic dimension of the plurality of protrusions.Type: ApplicationFiled: July 20, 2021Publication date: November 11, 2021Inventors: Chin-Chia Kuo, Jhy-Jyi Sze, Tung-Ting Wu, Yimin Huang
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Publication number: 20210313383Abstract: The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.Type: ApplicationFiled: June 17, 2021Publication date: October 7, 2021Inventors: Yen-Ting Chiang, Ching-Chun Wang, Dun-Nian Yaung, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Yimin Huang
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Patent number: 11139367Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.Type: GrantFiled: March 27, 2019Date of Patent: October 5, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Jung-I Lin, Jhy-Jyi Sze, Alexander Kalnitsky, Yimin Huang, King Liao, Shen-Hui Hong
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Publication number: 20210280620Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.Type: ApplicationFiled: May 5, 2021Publication date: September 9, 2021Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
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Publication number: 20210272991Abstract: Various embodiments of the present disclosure are directed towards a capacitor structure comprising a plurality of first conductive layers that are vertically stacked over one another and overlie a substrate. The plurality of first conductive layers respectively contact an adjacent first conductive layer in a first connection region. A plurality of second conductive layers are respectively stacked between adjacent ones of the plurality of first conductive layers. The plurality of second conductive layers respectively contact an adjacent second conductive layer in a second connection region. A dielectric structure separates the plurality of first conductive layers and the plurality of second conductive layers. At least a portion of a lower first conductive layer in the plurality of first conductive layers directly underlies the second connection region.Type: ApplicationFiled: May 19, 2021Publication date: September 2, 2021Inventor: Yimin Huang
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Publication number: 20210265412Abstract: The present disclosure, in some embodiments, relates to an image sensing integrated chip. The image sensing integrated chip includes a semiconductor substrate having sidewalls defining one or more trenches on opposing sides of a region of the semiconductor substrate. One or more dielectrics are disposed within the one or more trenches. The semiconductor substrate has a plurality of flat surfaces arranged between the one or more trenches. Adjacent ones of the plurality of flat surfaces define a plurality of triangular shaped protrusions and alternative ones of the plurality of flat surfaces are substantially parallel to one another, as viewed along a cross-sectional view.Type: ApplicationFiled: April 21, 2021Publication date: August 26, 2021Inventors: Tung-Ting Wu, Jhy-Jyi Sze, Yimin Huang