Patents by Inventor Yin Chen

Yin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924462
    Abstract: A video decoding method includes obtaining split information indicating whether to split a current block, splitting the current block into two or more lower blocks when the split information indicates to split the current block, obtaining encoding order information indicating an encoding order of the lower blocks of the current block, determining a decoding order of the lower blocks according to the encoding order information, and decoding the lower blocks according to the decoding order.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yin-Ji Piao, Jie Chen, Elena Alshina
  • Patent number: 11921788
    Abstract: A system level search module receives system level search user interface registration information for an application of the computing device. The registration information includes an indication of how the system level search module can launch the application. The registration information is added to a registration store, and the application is included as one of one or more applications that can be searched using the system level search user interface.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: March 5, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Priya Vaidyanathan, Brian E. Uphoff, Brandon H. Paddock, Stephanie M. Monk, Dona Sarkar, Wentao Chen, Edward Boyle Averett, Manav Mishra, Derek S. Gebhard, Richard Jacob White, Yin Liu
  • Publication number: 20240071799
    Abstract: A system for a semiconductor fabrication facility comprises a transporting tool configured to move a carrier, a first manufacturing tool configured to accept the carrier facing in a first direction, a second manufacturing tool configured to accept the carrier facing in the second direction, and an orientation tool. The carrier is moved to the orientation tool by the transporting tool prior to being moved to the first manufacturing tool or the second manufacturing tool by the transporting tool. The orientation tool rotates the carrier so that the carrier is accepted by the first manufacturing tool or the second manufacturing tool. The transporting tool, the first manufacturing tool, the second manufacturing tool and the orientation tool are physically separated from each other.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: CHUAN WEI LIN, FU-HSIEN LI, YONG-JYU LIN, RONG-SHEN CHEN, CHI-FENG TUNG, HSIANG YIN SHEN
  • Publication number: 20240068465
    Abstract: Certain aspects of the present disclosure provide a surgical cassette configured to engage a first plurality of rollers of a first roller head. The cassette comprises a face coupled to a first substrate, the face being at a first angle with respect to the first roller head's axis of rotation and a wall of first substrate being at a second angle with respect to the axis of rotation, wherein the first angle is different from the second angle. The cassette also comprises a first sheet positioned on the wall's surface, wherein the first sheet and the wall form first one or more pump segments configured to engage the first plurality of rollers in a position where force applied by each one of the first plurality of rollers on the first one or more pump segments has a direction that is not parallel to the first roller head's axis of rotation.
    Type: Application
    Filed: November 2, 2023
    Publication date: February 29, 2024
    Inventors: Brad Yin CHEN, Eric LEE, Gary P. SORENSON, Vincent A. BAXTER
  • Publication number: 20240071847
    Abstract: A semiconductor package including two different adhesives and a method of forming are provided. The semiconductor package may include a package component having a semiconductor die bonded to a substrate, a first adhesive over the substrate, a heat transfer layer on the package component, and a lid attached to the substrate by a second adhesive. The first adhesive may encircle the package component and the heat transfer layer. The lid may include a top portion on the heat transfer layer and the first adhesive, and a bottom portion attached to the substrate and encircling the first adhesive. A material of the second adhesive may be different from a material of the first adhesive.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Huan Liao, Ping-Yin Hsieh, Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Ying-Ching Shih
  • Publication number: 20240072170
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor fin. The semiconductor device includes first spacers over the semiconductor fin. The semiconductor device includes a metal gate structure, over the semiconductor fin, that is sandwiched at least by the first spacers. The semiconductor device includes a gate electrode contacting the metal gate structure. An interface between the metal gate structure and the gate electrode has its side portions extending toward the semiconductor fin with a first distance and a central portion extending toward the semiconductor fin with a second distance, the first distance being substantially less than the second distance.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Yih-Ann Lin, Chia Ming Liang, Ryan Chia-Jen CHEN
  • Publication number: 20240074119
    Abstract: An immersion cooling system includes a pressure seal tank, an electronic apparatus, a pressure balance pipe and a relief valve. The pressure seal tank is configured to store coolant. A vapor space is formed in the pressure seal tank above the liquid level of the coolant. The electronic apparatus is completely immersed in the coolant. The pressure balance pipe has a gas collection length. The first port of the pressure balance pipe is disposed on the top surface of the pressure seal tank. The relief valve is disposed on the second port of the pressure balance pipe. The second port is farther away from the top surface of the pressure seal tank than the first port. The gas collection length of the pressure equalization tube allows the concentration of vaporized coolant at the first port to be greater than the concentration of vaporized coolant at the second port.
    Type: Application
    Filed: May 9, 2023
    Publication date: February 29, 2024
    Inventors: Ren-Chun CHANG, Wei-Chih LIN, Sheng-Chi WU, Wen-Yin TSAI, Li-Hsiu CHEN
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Publication number: 20240067782
    Abstract: An aluminum borate whisker reinforced and toughened non-metallic matrix composite is provided, which specifically includes a non-metallic material reinforced and toughened with aluminum borate whiskers. The composite exhibits a higher bending strength and fracture toughness and a higher wear resistance. A method for preparing the composite is also provided. The method includes mixing the aluminum borate whiskers and the non-metallic material to form a mixture; and sintering the mixture by a vacuum hot press method, or molding the mixture.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Yue Shi, Bi Jia, Jinliang Shi, Zhigang Zou, Yong Zhou, Yongjiang Di, Yin Liu, Huichao He, Rong Wang, Xueyi Wang, Hao Tian, Jun Zhu, Rui Tang, Xingyu Chen, Danxia Zhang
  • Publication number: 20240072128
    Abstract: A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode. The bottom mask remains over the source/drain region during the nitridation process and is removed after the nitridation. The method further includes forming a silicide over the source/drain region after removing the bottom mask.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Tsan-Chun Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11917152
    Abstract: A mechanism for position dependent spatial varying transform (SVT) for video coding. A prediction block and a corresponding transformed residual block are received at a decoder. A type of spatial varying transform (SVT) employed to generate the transformed residual block is determined. A position of the SVT relative to the transformed residual block is also determined. An inverse of the SVT is applied to the transformed residual block to reconstruct a reconstructed residual block. The reconstructed residual block is then combined with the prediction block to reconstruct an image block.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: February 27, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yin Zhao, Haitao Yang, Jianle Chen
  • Patent number: 11915942
    Abstract: A method of exposing a wafer to a high-tilt angle ion beam and an apparatus for performing the same are disclosed. In an embodiment, a method includes forming a patterned mask layer over a wafer, the patterned mask layer including a patterned mask feature; exposing the wafer to an ion beam, a surface of the wafer being tilted at a tilt angle with respect to the ion beam; and moving the wafer along a scan line with respect to the ion beam, a scan angle being defined between the scan line and an axis perpendicular to an axis of the ion beam, a difference between the tilt angle and the scan angle being less than 50°.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Cheng Chen, Wei-Ting Chien, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11916019
    Abstract: The present application discloses a method for fabricating a semiconductor device. The method includes providing a substrate, forming a first conductive layer above the substrate, concurrently forming a bottom conductive layer and a redistribution structure above the first conductive layer, forming a programmable insulating layer on the bottom conductive layer, and forming a top conductive layer on the programmable insulating layer. The bottom conductive layer, the programmable insulating layer, and the top conductive layer together configure a programmable unit. The bottom conductive layer and the redistribution structure are electrically coupled to the first conductive layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: February 27, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Te-Yin Chen
  • Patent number: 11908740
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a gate structure over a substrate. The semiconductor structure also includes source/drain structures on opposite sides of the gate structure. The semiconductor structure also includes a dielectric layer over the gate structure and the source/drain structures. The semiconductor structure also includes a via plug passing through the dielectric layer and including a first group IV element. The dielectric layer includes a second group IV element, a first compound, and a second compound, and the second compound includes elements in the first compound and the first group IV element.
    Type: Grant
    Filed: November 25, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Po Hsieh, Su-Hao Liu, Hong-Chih Liu, Jing-Huei Huang, Jie-Huang Huang, Lun-Kuang Tan, Huicheng Chang, Liang-Yin Chen, Kuo-Ju Chen
  • Patent number: 11901455
    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
  • Patent number: 11898306
    Abstract: The present application relates to a sizing agent composition, a carbon fiber material and a composite material. The sizing agent composition comprises specific compositions, thereby producing a sizing agent having emulsion droplets with specific diameter. The sizing agent has excellent emulsion stability, and it can efficiently improve hygroscopicity and dimensional stability of the carbon fiber material. Besides, the sizing agent can improve bonding properties between the carbon fiber material and resin matrix, therefore enhancing properties of the composite material.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 13, 2024
    Assignee: FORMOSA PLASTICS CORPORATION
    Inventors: Hsuan-Yin Chen, Long-Tyan Hwang
  • Publication number: 20240047553
    Abstract: A method of forming a semiconductor device includes: forming semiconductor fin structures over a substrate, where each of the semiconductor fin structures includes a layer stack over a semiconductor fin, the layer stack including alternating layers of a first semiconductor material and a second semiconductor material; forming a capping layer over sidewalls and upper surfaces of the semiconductor fin structures; and forming hybrid fins over isolation regions on opposing sides of the semiconductor fin structures, where forming the hybrid fins includes: forming dielectric fins over the isolation regions; and forming dielectric structures over the dielectric fins, which includes: forming an etch stop layer (ESL) over the dielectric fins; doping the ESL with a dopant; and forming a first dielectric material over the doped ESL.
    Type: Application
    Filed: January 5, 2023
    Publication date: February 8, 2024
    Inventors: Wei-Ting Chien, Liang-Yin Chen, Yee-Chia Yeo
  • Publication number: 20240047209
    Abstract: A method includes coating a photoresist film over a target layer; performing a lithography process to pattern the photoresist film into a photoresist layer, wherein the photoresist layer has an opening, and the opening of the photoresist layer at least has a first sidewall, a second sidewall non-parallel with the first sidewall, and a first corner connecting the first and second sidewalls; performing a first directional ion bombardment process to the first corner of the photoresist layer along a first direction, wherein the first direction is non-perpendicular to both the first and second sidewalls of the photoresist when viewed from top; and after the first directional ion bombardment process is complete, patterning the target layer using the photoresist layer as a patterning mask.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Tien SHEN, Chih-Kai YANG, Hsiang-Ming CHANG, Chun-Yen CHANG, Ya-Hui CHANG, Wei-Ting CHIEN, Chia-Cheng CHEN, Liang-Yin CHEN
  • Patent number: 11886531
    Abstract: A computing device can present, within a display, first network-associated content and a tab strip, the first network-associated content being associated with a first content locator, the tab strip including a first content indicator associated with the first content locator and a second content indicator associated with a second content locator, receive a directional input associated with the tab strip, in response to receiving the directional input, modify the presentation of the tab strip, the modification ending presentation of the first content indicator and initiating presentation of a third content indicator, the third content indicator being associated with a third content locator, receive a selection of the third content indicator, and in response to receiving the selection of the third content indicator, present second network-associated content at a location where the first network-associated content was previously presented, the second network-associated content being associated with the third con
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: January 30, 2024
    Assignee: GOOGLE LLC
    Inventors: Samuel L. Birch, Yusuf Ozuysal, Christopher Lee, Mei Liang, Wei-Yin Chen, Yue Zhang, Ayman Almadhoun
  • Publication number: 20240019787
    Abstract: In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 18, 2024
    Inventors: Ru-Gun LIU, Huicheng Chang, Chia-Cheng Chen, Jyu-Horng Shieh, Liang-Yin Chen, Shu-Huei Suen, Wei-Liang Lin, Ya Hui Chang, Yi-Nien Su, Yung-Sung Yen, Chia-Fong Chang, Ya-Wen Yeh, Yu-Tien Shen