Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for estimating a 3-D pose of an object of interest from image and point cloud data. In one aspect, a method includes obtaining an image of an environment; obtaining a point cloud of a three-dimensional region of the environment; generating a fused representation of the image and the point cloud; and processing the fused representation using a pose estimation neural network and in accordance with current values of a plurality of pose estimation network parameters to generate a pose estimation network output that specifies, for each of multiple keypoints, a respective estimated position in the three-dimensional region of the environment.

Abstract: In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.

Abstract: A biological kit for separating electronegative low density lipoproteins is disclosed. The biological kit includes a first reagent, a second reagent, a third reagent and a fourth reagent. The first reagent includes water. The second reagent includes a first buffer, a second buffer and a salt. The third reagent includes the first buffer, the second buffer, an organic compound and the salt. The fourth reagent includes the first buffer and the second buffer.

Abstract: Presented are systems and methods for logged Quality of Experience (QoE) measurement. A wireless communication device (e.g., a UE) may store a measurement of QoE as QoE buffered data. The wireless communication device may send a first message including the QoE buffered data to a wireless communication node (e.g., a BS).

Abstract: A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode. The bottom mask remains over the source/drain region during the nitridation process and is removed after the nitridation. The method further includes forming a silicide over the source/drain region after removing the bottom mask.

Abstract: Disclosed is a methods and apparatus which can improve defect tolerability of a hardware-based neural network. In one embodiment, a method for performing a calculation of values on first neurons of a first layer in a neural network, includes: receiving a first pattern of a memory cell array; determining a second pattern of the memory cell array according to a third pattern; determining at least one pair of columns of the memory cell array according to the first pattern and the second pattern; switching input data of two columns of each of the at least one pair of columns of the memory cell array; and switching output data of the two columns in each of the at least one pair of columns of the memory cell array so as to determine the values on the first neurons of the first layer.

Abstract: A method of the present disclosure includes forming a fin-shaped structure including a plurality of semiconductor layers, a first hard mask layer, a second hard mask layer, and a third hard mask layer, forming a patterned masking layer having a mask portion and a window portion, wherein the third hard mask layer is exposed through the window portion, performing a first etch process to expose the second hard mask layer through the window portion, performing a second etch process to etch the exposed second hard mask layer and to leave behind second hard mask layer residues, performing a third etch process to remove the second hard mask layer residues, etching the plurality of semiconductor layers in the fin-shaped structure through the window portion to divide the fin-shaped structure into a first segment and a second segment, and forming an isolation feature around the first segment and the second segment.

Abstract: Validity of a trained artificial intelligence model is verified. The verifying the validity includes generating a training dataset from the trained artificial intelligence model using reverse data generation of the trained artificial intelligence model. The training dataset generated using the reverse data generation is compared with a test dataset used to evaluate the trained artificial intelligence model. The comparing is to determine a relationship between the training dataset that was generated and the test dataset. Data from the test dataset determined to have a predefined relationship with the training dataset is removed to obtain a new test dataset. The new test dataset is used to verify the validity of the trained artificial intelligence model.

Abstract: A method includes forming a fin protruding from a substrate, the fin including an epitaxial stack over a fin base and a hard mask layer over the epitaxial stack, the epitaxial stack including first and second semiconductor layers of different material compositions, performing a first etching process to etch the hard mask layer, the first etching process including applying a first combination of etchants, performing a second etching process to etch the epitaxial stack, the second etching process including applying a second combination of etchants, and performing a third etching process to etch the fin base, the third etching process including applying a third combination of etchants. The first, second, and third combinations of etchants are different from each other.

Abstract: A semiconductor device includes a substrate, a first gate, a plurality of second gates and a resistor. The substrate is defined with an active region and a resistor region. The first gate is disposed in the active region. The first gate has a first length extending along a first direction and a second length extending along a second direction. The plurality of second gates are disposed in the resistor region. Each of the second gates has a third length extending along the first direction and a fourth length extending along the second direction. The first length is equal to the third length, and the second length is equal to the fourth length. The resistor is disposed on the plurality of second gates.

Abstract: A method of the present disclosure includes forming a fin-shaped structure including a plurality of semiconductor layers, a first hard mask layer, a second hard mask layer, and a third hard mask layer, forming a patterned masking layer having a mask portion and a window portion, wherein the third hard mask layer is exposed through the window portion, performing a first etch process to expose the second hard mask layer through the window portion, performing a second etch process to etch the exposed second hard mask layer and to leave behind second hard mask layer residues, performing a third etch process to remove the second hard mask layer residues, etching the plurality of semiconductor layers in the fin-shaped structure through the window portion to divide the fin-shaped structure into a first segment and a second segment, and forming an isolation feature around the first segment and the second segment.

Abstract: A waste liquid-crystalline glass recycling system includes a liquid-crystalline glass film removing module and a liquid-crystalline glass separation module connected with the liquid-crystalline glass film removing module. The liquid-crystalline glass film removing module includes a crushing device and a film removal device. The crushing device is configured to crush a liquid crystal panel. The film removal device is connected with the crushing device, and is configured to separate the liquid crystal panel into a glass-liquid crystal mixture and optical film debris. The liquid-crystalline glass separation module is connected with the liquid-crystalline glass film removing module, and is configured to separate the glass-liquid crystal mixture into glass sand and a liquid crystal mixture by using a solvent, in which the liquid crystal mixture includes the solvent.

Abstract: An aluminum borate whisker reinforced and toughened non-metallic matrix composite is provided, which specifically includes a non-metallic material reinforced and toughened with aluminum borate whiskers. The composite exhibits a higher bending strength and fracture toughness and a higher wear resistance. A method for preparing the composite is also provided. The method includes mixing the aluminum borate whiskers and the non-metallic material to form a mixture; and sintering the mixture by a vacuum hot press method, or molding the mixture.

Abstract: A device includes two BSI image sensor elements and a third element. The third element is bonded in between the two BSI image sensor elements using element level stacking methods. Each of the BSI image sensor elements includes a substrate and a metal stack disposed over a first side of the substrate. The substrate of the BSI image sensor element includes a photodiode region for accumulating an image charge in response to radiation incident upon a second side of the substrate. The third element also includes a substrate and a metal stack disposed over a first side of the substrate. The metal stacks of the two BSI image sensor elements and the third element are electrically coupled.

Abstract: The disclosure discloses a battery device, a detection method thereof, a method and device for screening battery cells. The characteristic values are determined according to parameters of two peaks in the frequency-domain impedance diagram. The characteristic values may reflect the magnitude of charge transfer impedance and diffusion impedance in each battery cell, then reflect the characteristics of the interface and characteristics of solid phase particles during charging and discharging, and further reflect the health and performance of battery cells. The battery set screened in this way still have good consistency after storage and shelving, and the consistency between battery cells will not deteriorate after storage for a period of time, so that the battery device may have better performance.

Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Abstract: A memory device for memory cell programming and erasing with refreshing operation is disclosed. The memory device includes multiple location-related memory cells and a refresh module. The location-related memory cells are coupled to a bit line on which a selecting voltage is applied. The refresh module rewrites a stored data of a first cell of the location-related memory cells to the first cell of the location-related memory cells in response to an operation count being smaller than a number N. N is related to the number of the location-related memory cells.