Abstract: The present disclosure relates to a processing tool that includes a first wafer-mounting frame and a second wafer-mounting frame. The first wafer-mounting frame is configured to retain a target wafer. The second wafer-mounting frame is configured to retain a masking wafer. The masking wafer includes a mask pattern made up of a number of openings passing through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first and second wafer-mounting frames, when the first and second wafer-mounting frames are clamped together to retain the target wafer and the masking wafer. The deposition chamber includes a material deposition source configured to deposit material from the material deposition source through the number of openings in the mask pattern to form the material in the predetermined deposition pattern on the target wafer.

Abstract: The present invention discloses a programmable gain amplifier having mode-switching mechanism. An operational amplifier includes a first input terminal, a second input terminal and an output terminal. The second input terminal is coupled to a ground terminal. The output terminal generates an output signal. A variable resistor and a first switch are coupled in series between a first terminal and a second terminal that coupled to the first input terminal. A first variable capacitor and a second switch are coupled in series between the first terminal and the second terminal. A second variable capacitor and a third switch are coupled in series between the first terminal and the ground terminal. A low-pass resistor and a low-pass capacitor are coupled in parallel between the first input terminal and the output terminal. An input resistor is coupled between a signal input terminal and the first terminal to receive an input signal from the signal input terminal.

Abstract: Base stations and methods for wireless communication networks, the base station having: a baseband processing unit; a first radio module including a digital signal processing block connected to the baseband processing unit, wherein the digital signal processing block is further connected to a first antenna; a second radio module connected to the baseband processing unit and having a second antenna; wherein the base station is configured to activate and deactivate the first radio module and second radio module based on the data capacity requirements of the wireless communication network.

Abstract: The present disclosure relates to a processing tool that includes a first wafer-mounting frame and a second wafer-mounting frame. The first wafer-mounting frame is configured to retain a target wafer. The second wafer-mounting frame is configured to retain a masking wafer. The masking wafer includes a mask pattern made up of a number of openings passing through the masking wafer to correspond to a predetermined deposition pattern to be formed on the target wafer. A deposition chamber is configured to receive the first and second wafer-mounting frames, when the first and second wafer-mounting frames are clamped together to retain the target wafer and the masking wafer. The deposition chamber includes a material deposition source configured to deposit material from the material deposition source through the number of openings in the mask pattern to form the material in the predetermined deposition pattern on the target wafer.

Abstract: In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.

Abstract: Disclosed is a methods and apparatus which can improve defect tolerability of a hardware-based neural network. In one embodiment, a method for performing a calculation of values on first neurons of a first layer in a neural network, includes: receiving a first pattern of a memory cell array; determining a second pattern of the memory cell array according to a third pattern; determining at least one pair of columns of the memory cell array according to the first pattern and the second pattern; switching input data of two columns of each of the at least one pair of columns of the memory cell array; and switching output data of the two columns in each of the at least one pair of columns of the memory cell array so as to determine the values on the first neurons of the first layer.

Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.

Abstract: A power generating device and a power supplying method thereof are provided. The power generating device includes a battery set, a charge storage device, a charger and a voltage converter. The battery set has microbial fuel cell and/or solar battery, and is configured to generate a supply voltage. The charger generates a charging voltage according to the supply voltage, and provides the charging voltage through a first resistor to charge the charge storage device. The voltage converter converts a storage voltage provided by the charge storage device to generate a driving voltage, and provides the driving voltage to drive a load.

Abstract: A plant microbial fuel cell includes a planting container, a plant, a cathode and an anode. The planting container has a culture medium therein, and a microbial population is in the culture medium. The plant is grown in the culture medium in the planting container. The cathode is disposed on a surface of the culture medium, and the anode is arranged in the culture medium close to roots of the plant. The anode includes a porous carbon material prepared from coffee grounds, and thus the overall cost of the plant microbial fuel cell may be greatly reduced, and the porous carbon material is easy to process and has high biocompatibility.

Abstract: In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.

Abstract: Disclosed is a methods and apparatus which can improve defect tolerability of a hardware-based neural network. In one embodiment, a method for performing a calculation of values on first neurons of a first layer in a neural network, includes: receiving a first pattern of a memory cell array; determining a second pattern of the memory cell array according to a third pattern; determining at least one pair of columns of the memory cell array according to the first pattern and the second pattern; switching input data of two columns of each of the at least one pair of columns of the memory cell array; and switching output data of the two columns in each of the at least one pair of columns of the memory cell array so as to determine the values on the first neurons of the first layer.

Abstract: A method of the present disclosure includes forming a fin-shaped structure including a plurality of semiconductor layers, a first hard mask layer, a second hard mask layer, and a third hard mask layer, forming a patterned masking layer having a mask portion and a window portion, wherein the third hard mask layer is exposed through the window portion, performing a first etch process to expose the second hard mask layer through the window portion, performing a second etch process to etch the exposed second hard mask layer and to leave behind second hard mask layer residues, performing a third etch process to remove the second hard mask layer residues, etching the plurality of semiconductor layers in the fin-shaped structure through the window portion to divide the fin-shaped structure into a first segment and a second segment, and forming an isolation feature around the first segment and the second segment.

Abstract: Validity of a trained artificial intelligence model is verified. The verifying the validity includes generating a training dataset from the trained artificial intelligence model using reverse data generation of the trained artificial intelligence model. The training dataset generated using the reverse data generation is compared with a test dataset used to evaluate the trained artificial intelligence model. The comparing is to determine a relationship between the training dataset that was generated and the test dataset. Data from the test dataset determined to have a predefined relationship with the training dataset is removed to obtain a new test dataset. The new test dataset is used to verify the validity of the trained artificial intelligence model.

Abstract: A method includes forming a fin protruding from a substrate, the fin including an epitaxial stack over a fin base and a hard mask layer over the epitaxial stack, the epitaxial stack including first and second semiconductor layers of different material compositions, performing a first etching process to etch the hard mask layer, the first etching process including applying a first combination of etchants, performing a second etching process to etch the epitaxial stack, the second etching process including applying a second combination of etchants, and performing a third etching process to etch the fin base, the third etching process including applying a third combination of etchants. The first, second, and third combinations of etchants are different from each other.

Abstract: A semiconductor device includes a substrate, a first gate, a plurality of second gates and a resistor. The substrate is defined with an active region and a resistor region. The first gate is disposed in the active region. The first gate has a first length extending along a first direction and a second length extending along a second direction. The plurality of second gates are disposed in the resistor region. Each of the second gates has a third length extending along the first direction and a fourth length extending along the second direction. The first length is equal to the third length, and the second length is equal to the fourth length. The resistor is disposed on the plurality of second gates.

Abstract: A method of the present disclosure includes forming a fin-shaped structure including a plurality of semiconductor layers, a first hard mask layer, a second hard mask layer, and a third hard mask layer, forming a patterned masking layer having a mask portion and a window portion, wherein the third hard mask layer is exposed through the window portion, performing a first etch process to expose the second hard mask layer through the window portion, performing a second etch process to etch the exposed second hard mask layer and to leave behind second hard mask layer residues, performing a third etch process to remove the second hard mask layer residues, etching the plurality of semiconductor layers in the fin-shaped structure through the window portion to divide the fin-shaped structure into a first segment and a second segment, and forming an isolation feature around the first segment and the second segment.

Abstract: A waste liquid-crystalline glass recycling system includes a liquid-crystalline glass film removing module and a liquid-crystalline glass separation module connected with the liquid-crystalline glass film removing module. The liquid-crystalline glass film removing module includes a crushing device and a film removal device. The crushing device is configured to crush a liquid crystal panel. The film removal device is connected with the crushing device, and is configured to separate the liquid crystal panel into a glass-liquid crystal mixture and optical film debris. The liquid-crystalline glass separation module is connected with the liquid-crystalline glass film removing module, and is configured to separate the glass-liquid crystal mixture into glass sand and a liquid crystal mixture by using a solvent, in which the liquid crystal mixture includes the solvent.