Abstract: Semiconductor devices having void-free dielectric structures and methods of fabricating same are disclosed herein. An exemplary semiconductor device includes a plurality of fin structures disposed over a substrate having isolation features disposed therein and a plurality of gate structures disposed over the plurality of fin structures. The plurality of gate structures traverse the plurality of fin structures. The semiconductor device further includes a dielectric structure defined between the plurality of fin structures and the plurality of gate structures. The dielectric structure has an aspect ratio of about 5 to about 16. The dielectric structure includes a first dielectric layer disposed over the substrate and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer and the second dielectric layer are disposed on sidewalls of the plurality of fin structures and sidewalls of the plurality of gate structures.

Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.

Abstract: A method of forming a semiconductor package includes attaching a thermal conductivity layer to a chip. The chip has a first surface and a second surface. The thermal conductivity layer is attached to the first surface of the chip. The thermal conductivity layer provides a path through which heat generated from the chip is dissipated to the ambient. A substrate is attached to the second surface of the chip after attaching the thermal conductivity layer to the chip. A molding compound is formed to encapsulate the chip and the thermal conductivity layer.

Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.

Abstract: Various embodiments of the present application are directed towards an edge-exposure tool with a light emitting diode (LED), as well as a method for edge exposure using a LED. In some embodiments, the edge-exposure tool comprises a process chamber, a workpiece table, a LED, and a controller. The workpiece table is in the process chamber and is configured to support a workpiece covered by a photosensitive layer. The LED is in the process chamber and is configured to emit radiation towards the workpiece. A controller is configured to control the LED to expose an edge portion of the photosensitive layer, but not a center portion of the photosensitive layer, to the radiation emitted by the LED. The edge portion of the photosensitive layer extends along an edge of the workpiece in a closed path to enclose the center portion of the photosensitive layer.

Abstract: A backside-illuminated photodetector structure includes a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.

Abstract: A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material.

Abstract: Some embodiments relate to a semiconductor package. The package includes a substrate having an upper surface and a lower surface. A first chip is disposed over a first portion of the upper surface of the substrate. A second chip is disposed over a second portion of the upper surface of the substrate. A first plurality of carbon nano material pillars are disposed over an uppermost surface of the first chip, and a second plurality of carbon nano material pillars are disposed over an uppermost surface of the second chip. A molding compound is disposed above the substrate, and encapsulates the first chip, the first plurality of carbon nano material pillars, the second chip, and the second plurality of carbon nano material pillars.

Abstract: A backside-illuminated photodetector structure includes a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.

Abstract: Embodiments of the present invention provide methods and structures for protecting gates during epitaxial growth. An inner spacer of a first material is deposited adjacent a transistor gate. An outer spacer of a different material is deposited adjacent the inner spacer. Stressor cavities are formed adjacent the transistor gate. The inner spacer is recessed, forming a divot. The divot is filled with a material to protect the transistor gate. The stressor cavities are then filled. As the gate is safely protected, unwanted epitaxial growth (“mouse ears”) on the transistor gate is prevented.

Abstract: A method for repairing a membrane filtration module in fluid communication with a plurality of additional membrane filtration modules includes fluidly connecting a fluid transfer assembly to the membrane filtration module, fluidly isolating the membrane filtration module from the plurality of additional membrane filtration modules, forcing liquid within the membrane filtration module into the fluid transfer assembly by introducing a pressurized gas into the membrane filtration module, releasing the pressurized gas from the membrane filtration module, fluidly disconnecting the fluid transfer assembly from the membrane filtration module, repairing one or more damaged membranes in the membrane filtration module, and fluidly reconnecting the membrane filtration module to the plurality of additional membrane filtration modules.

Abstract: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide.

Abstract: The present disclosure relates a lithographic substrate marking tool. The tool includes a first electromagnetic radiation source disposed within a housing and configured to generate a first type of electromagnetic radiation. A radiation guide is configured to provide the first type of electromagnetic radiation to a photosensitive material over a substrate. A second electromagnetic radiation source is disposed within the housing and is configured to generate a second type of electromagnetic radiation that is provided to the photosensitive material.

Abstract: Various embodiments of the present application are directed towards an edge-exposure tool with a light emitting diode (LED), as well as a method for edge exposure using a LED. In some embodiments, the edge-exposure tool comprises a process chamber, a workpiece table, a LED, and a controller. The workpiece table is in the process chamber and is configured to support a workpiece covered by a photosensitive layer. The LED is in the process chamber and is configured to emit radiation towards the workpiece. A controller is configured to control the LED to expose an edge portion of the photosensitive layer, but not a center portion of the photosensitive layer, to the radiation emitted by the LED. The edge portion of the photosensitive layer extends along an edge of the workpiece in a closed path to enclose the center portion of the photosensitive layer.

Abstract: In some embodiments, the present disclosure relates to a package for holding a plurality of integrated circuits. The package includes a first conductive pad disposed over a first substrate and a second conductive pad disposed over a second substrate. The second conductive pad is a multi-layer structure having an uppermost metal layer including titanium or nickel. A molding structure surrounds the first substrate and the second substrate. A conductive structure is over the first substrate and the second substrate. The conductive structure is conductively coupled to the second conductive pad.

Abstract: A cathode layer and a membrane electrode assembly of a solid oxide fuel cell are provided. The cathode layer consists of a plurality of perovskite crystal films, and the average change rate of linear thermal expansion coefficients of these perovskite crystal films is about 5% to 40% along the thickness direction. The membrane electrode assembly includes the above-mentioned cathode layer, and the linear thermal expansion coefficients of these perovskite crystal films are reduced towards the solid electrolyte layer of the membrane electrode assembly.

Abstract: An image data retrieving method and an image data retrieving device are provided. The image data retrieving method includes: receiving an image including a plurality of data from a communication interface; obtaining a plurality of regions of interest from the image, wherein each of the regions of interest is a data image including at least one of the data; dividing the regions of interest into a plurality of groups, wherein at least one of the data included in the regions of interest of each of the groups has a same type; combining the regions of interest of each of the groups into a to-be-recognized image; and performing an optical character recognition to the to-be-recognized image corresponding to each of the groups respectively to obtain the data corresponding to the regions of interest of each of the groups.

Abstract: A backside-illuminated photodetector structure comprising a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.