Abstract: Glass separation systems for separating glass substrates from a continuous glass ribbon are disclosed. In one embodiment, the system may include an A-surface nosing bar positioned on a first side of a glass conveyance pathway. A long axis of the A-surface nosing bar may be substantially orthogonal to a conveyance direction of the glass conveyance pathway. The glass separation system may further comprise a B-surface nosing bar positioned on a second side of the glass conveyance pathway and opposite the A-surface nosing bar. A long axis of the B-surface nosing bar may be substantially orthogonal to the conveyance direction of the glass conveyance pathway. The A-surface nosing bar and the B-surface nosing bar may be pivotable about axes of rotation parallel to the conveyance direction of the glass conveyance pathway.

Abstract: A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material.

Abstract: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide.

Abstract: An optical bench including a substrate having a trench with the trench having an angled sidewall on which a reflective coating is provided. The optical bench also includes a first device and a waveguide positioned within the trench, a second device optically connected to the first device, and at least one active circuit electrically connected to the first device with the waveguide being positioned optically between the first device and the reflective coating. The optical bench also includes an optically transparent material that forms a first interface with the first device and a second interface with a first surface of the waveguide.

Abstract: An electro-optic modulator device includes a modulation region, a reflecting region, a conductive line and an anti-reflecting region. The modulation region includes a doped region. The reflecting region is over the modulation region. The conductive line is connected to the doped region. The conductive line extends through the reflecting region. The anti-reflecting region is on an opposite surface of the modulation region from the reflecting region.

Abstract: The present disclosure, in some embodiments, relates to a semiconductor package. The semiconductor package includes a first chip attached to a first substrate and a thermal conductivity layer attached to the first chip. A molding compound encapsulates the chip and the thermal conductivity layer. Electrical connectors are arranged between the first substrate and a board. The molding compound covers upper surfaces of the thermal conductivity layer facing away from the electrical connectors.

Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.

Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.

Abstract: A device including a gate stack over a semiconductor substrate having a pair of spacers abutting sidewalls of the gate stack. A recess is formed in the semiconductor substrate adjacent the gate stack. The recess has a first profile having substantially vertical sidewalls and a second profile contiguous with and below the first profile. The first and second profiles provide a bottle-neck shaped profile of the recess in the semiconductor substrate, the second profile having a greater width within the semiconductor substrate than the first profile. The recess is filled with a semiconductor material. A pair of spacers are disposed overly the semiconductor substrate adjacent the recess.

Abstract: The present disclosure, in some embodiments, relates to a method of forming a semiconductor package. The method may be performed by attaching a first thermal conductivity layer to an upper surface of a first chip, and attaching a second thermal conductivity layer to an upper surface of a second chip. A first support substrate is attached to lower surfaces of the first chip and the second chip. A molding compound is formed over the first support substrate and laterally surrounds the first chip and the second chip. The first support substrate is replaced with a package substrate after forming the molding compound over the first support substrate.

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.

Abstract: In some embodiments, the present disclosure relates to a package for holding a plurality of integrated circuits. The package includes a first conductive pad disposed over a first substrate and a second conductive pad disposed over a second substrate. The second conductive pad is a multi-layer structure having an uppermost metal layer including titanium or nickel. A molding structure surrounds the first substrate and the second substrate. A conductive structure is over the first substrate and the second substrate. The conductive structure is conductively coupled to the second conductive pad.

Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.

Abstract: Various embodiments of the present application are directed towards an edge-exposure tool with a light emitting diode (LED), as well as a method for edge exposure using a LED. In some embodiments, the edge-exposure tool comprises a process chamber, a workpiece table, a LED, and a controller. The workpiece table is in the process chamber and is configured to support a workpiece covered by a photosensitive layer. The LED is in the process chamber and is configured to emit radiation towards the workpiece. A controller is configured to control the LED to expose an edge portion of the photosensitive layer, but not a center portion of the photosensitive layer, to the radiation emitted by the LED. The edge portion of the photosensitive layer extends along an edge of the workpiece in a closed path to enclose the center portion of the photosensitive layer.

Abstract: A method for fabricating heteroepitaxial semiconductor material on a mica sheet is disclosed. Firstly, a mica substrate is provided. Then, at least one semiconductor film is deposited on the mica substrate to form a flexible substrate whose flexibility is applied to various applications, such as wearable devices, portable photoelectric equipment, or improving the speed and bandwidth of commercial and military systems, such that the flexible substrate has the competitiveness in the market.

Abstract: Method and system for calibrating a plurality of voltages of a light-emitting element and a plurality of grayscale values of a respective pixel of the light-emitting element on a display panel are provided. The method may include determining a mapping correlation between the plurality of voltages of the light-emitting element and a plurality of luminance values of the light-emitting element, determining N grayscale values of the pixel, and determining N first luminance values each corresponding to the respective one of the N grayscale values. The method may also include determining N first voltages mapped to the N first luminance values using the mapping correlation and determining, of each one of the N first luminance values, (M?1) second luminance values. Each one of the (M?1) second luminance values may correspond to a different dimmed luminance value of the respective first luminance value.

Abstract: A method for controlling the IoT devices and an IoT system using the same are provided. The IoT devices includes a trigger device and a functional device. A managing software is executable on a client device. First, a credential is sent to the client from the functional device. Second, a script is received at the trigger device. The script includes the credential, at least one supported command, and at least one supported event. The script is generated at the managing software. The supported command is recognizable to the functional device. When the supported event is triggered at the trigger device, the supported command from the trigger device is received at the functional device. Then, a function of the functional device is performed based on the command, which increases the convenience of operating the system. The trigger device need not recognize the command, which increases the flexibility of the system.

Abstract: Methods, non-transitory machine readable media, and computing devices that more efficiently and effectively manage storage quota enforcement are disclosed. With this technology, a quota ticket comprising a tally generation number (TGN) and a local allowed usage amount (AUA) are obtained. The local AUA comprises a portion of a global AUA associated with a quota rule. The local AUA is increased following receipt of another portion of the global AUA in a response from a cluster peer, when another TGN in the response matches the TGN and the local AUA is insufficient to execute a received storage operation associated with the quota rule. The local AUA is decreased by an amount corresponding to, and following execution of, the storage operation, when the increased local AUA is sufficient to execute the storage operation.

Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.

Abstract: Provided is an etchant composition for a multilayered metal film comprising both a layer comprising copper and a layer comprising molybdenum, the etchant composition: being capable of etching en bloc a multilayered metal film comprising a layer constituted of copper or an alloy including copper as the main component and a layer constituted of molybdenum or an alloy including molybdenum as the main component; being effective in preventing the molybdenum layer from being undercut; making it easy to regulate the component concentrations so as to accommodate the cross-sectional shape control and cross-section; and being stable. Also provided are a method of etching using the etchant composition and a method for prolonging the life of the etchant composition.