Patents by Inventor Ying Huang

Ying Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149387
    Abstract: Various embodiments of the present disclosure are directed towards a method for non-destructive inspection of cell etch redeposition. In some embodiments of the method, a grayscale image of a plurality of cells on a wafer is captured. The grayscale image provides a top down view of the cells and, in some embodiments, is captured in situ after etching to form the cells. The cells are identified in the grayscale image to determine non-region of interest (non-ROI) pixels corresponding to the cells. The non-ROI pixels are subtracted from the grayscale image to determine ROI pixels. The ROI pixels are remaining pixels after the subtracting and correspond to material on sidewalls of, and in recesses between, the cells. An amount of etch redeposition on the sidewalls and in the recesses is then scored based on gray levels of the ROI pixels. Further, the wafer is processed based on the score.
    Type: Application
    Filed: December 27, 2024
    Publication date: May 8, 2025
    Inventors: I-Che Lee, Huai-Ying Huang, Yi Chien Lee
  • Publication number: 20250144073
    Abstract: A novel prophylactic therapy for cancer, as well as therapy against DNA damage, inflammation and immunosuppression involves the ?-blocker carvedilol, which is a racemic mixture consisting of two enantiomers, S- and R-carvedilol, in 1:1 ratio. S-carvedilol is a ?-blocker, with a highly potent antagonizing activity against the ?-adrenergic receptors, which is the main mechanism for the drug's pharmacological activity in treatment of high blood pressure and heart failure. Carvedilol—the racemic mixture—prevents ultraviolet radiation induced skin cancer by attenuating DNA damage, reducing inflammation and reversing immunosuppression. The non-?-blocking enantiomer R-carvedilol exhibits the same cancer preventive efficacy as the racemic carvedilol, without disturbing the cardiovascular system. Both carvedilol and R-carvedilol prevent chemical carcinogen-induced lung cancer development and lung inflammation.
    Type: Application
    Filed: June 10, 2024
    Publication date: May 8, 2025
    Inventors: Ying Huang, Bradley Tram Andresen, Jinghua Jeffrey Wang, Vijay Kumar Nekkanti, Aysz Shahid
  • Patent number: 12292086
    Abstract: The bearing seat device includes a bearing seat, a bearing set, a driven module, and an adjusting member. The bearing seat has a mounting hole, an adjusting slot, and an inserting hole. The adjusting slot divides a section of the bearing seat that is adjacent to the inserting hole and the mounting hole into a first side compartment and a second side compartment. The inserting hole extends from the first side compartment to the second side compartment. The bearing set is mounted in the mounting hole. The driven module extends into the mounting hole, is supported by the bearing set, and is rotatable relative to the bearing seat. The adjusting member engages the mounting hole and is operable to adjust a width of the adjusting slot between the first and the second side compartments and a diameter of the mounting hole.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: May 6, 2025
    Assignee: Hold Well Industrial Co., Ltd.
    Inventors: Kuan-Ta Chen, Shih-Ying Huang
  • Publication number: 20250140329
    Abstract: Upon determining that a first read operation on one memory cell of memory cells has failed, a second read operation on the memory cell is started. In the second read operation, a second pass voltage is applied to second word line, and a first pass voltage is applied to third word line. The second word line include one or more word lines adjacent to a selected word line, and the third word line include remaining unselected word lines. The selected word line corresponds to the memory cell to be read. The first pass voltage includes a voltage applied to the second word line in the first read operation. The second pass voltage is higher than the first pass voltage.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Inventors: Hongtao Liu, Lei Jin, Xiangnan Zhao, Ying Huang, Lei Guan, Yuanyuan Min
  • Patent number: 12289692
    Abstract: A method for improving transmission power management with compliance to regulations of radiofrequency exposure, which may comprise: at a current time, estimating whether a window average power, which may reflect average power transmitted using a radio technology during a moving time window, will exceed a power limit after the current time; if true, proceeding to at least one of a first handling subroutine and a second handling subroutine to set a power cap, and causing power transmitted to be capped by the power cap after the current time. The first handling subroutine may comprise: scheduling to set the power cap lower at a scheduled time. Estimating whether the window average power will exceed the power limit may involve discarding one of a plurality of power records. The second handling subroutine may comprise: setting the power cap not higher than the discarded one of the plurality of power records.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: April 29, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yi-Hsuan Lin, Han-Chun Chang, Chih-Yuan Lin, Yi-Ying Huang
  • Patent number: 12288803
    Abstract: A transistor includes a body of semiconductor material, where the body has laterally opposed body sidewalls and a top surface. A gate structure contacts the top surface of the body. A source region contacts a first one of the laterally opposed body sidewalls and a drain region contacts a second one of the laterally opposed body sidewalls. A first isolation region is under the source region and has a top surface in contact with a bottom surface of the source region. A second isolation region is under the drain region and has a top surface in contact with a bottom surface of the drain region. Depending on the transistor configuration, a major portion of the inner-facing sidewalls of the first and second isolation regions contact respective sidewalls of either a subfin structure (e.g., FinFET transistor configurations) or a lower portion of a gate structure (e.g., gate-all-around transistor configuration).
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: April 29, 2025
    Assignee: Intel Corporation
    Inventors: Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma, Anand S. Murthy, Jack T. Kavalieros, Tahir Ghani, Gilbert Dewey
  • Patent number: 12289747
    Abstract: Provided are a method and apparatus for resource configuration for a sidelink in Internet of vehicles. The method includes: a terminal receiving configuration information about a sidelink Bandwidth part (BWP)/resource pool; and the terminal performing sidelink data transmission according to the received configuration information about the sidelink BWP/resource pool.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: April 29, 2025
    Assignee: ZTE Corporation
    Inventors: Lin Chen, Mengzhen Wang, Boyuan Zhang, Ying Huang, Wei Luo, Wei Zou
  • Publication number: 20250133820
    Abstract: In some embodiments, the present disclosure relates to an integrated device, including a substrate; a gate overlying the substrate; a channel layer separated from the gate by a dielectric and overlying the gate; source/drain regions on the channel layer, the gate extending between the source/drain regions; an insertion layer conforming to an upper surface of the channel layer and comprising a first material; and a passivation layer conforming to an upper surface of the insertion layer and comprising a second material different from the first material; where the passivation layer has a higher density than the insertion layer, such that the passivation layer mitigates the diffusion of environmental materials towards the channel layer, and where the insertion layer mitigates the diffusion of the second material from the passivation layer into the channel layer.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Inventors: I-Che Lee, Wei-Gang Chiu, Pin-Ju Chen, Huai-Ying Huang, Yen-Chieh Huang, Kai-Wen Cheng, Yu-Ming Lin
  • Patent number: 12281991
    Abstract: A semiconductor device inspection method including: depositing a dielectric material over a substrate to form an interconnect-level dielectric (ILD) layer; patterning the ILD layer to form via structures in the ILD layer; depositing an electrically conductive material to form an inspection layer on the ILD layer and in the via structures; optically inspecting light reflected from the inspection layer to generate image data; and detecting any defects in the via structures by analyzing the image data.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: April 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: I-Che Lee, Huai-Ying Huang
  • Patent number: 12280482
    Abstract: A driving device for a nail gun includes a striking unit and an air storage unit. The striking unit includes a striking cylinder connected to the nail gun and defining a cylinder chamber having an opening, and a piston disposed in and making an air-tight contact with the striking cylinder. The air storage unit includes an air storage cylinder including a protrusion that protrudes toward the opening and cooperating with the striking cylinder to define an air storage chamber that is in fluid communication with the cylinder chamber via the opening. When the piston moves in a pressure-generating direction, air in the air storage chamber is pressurized. The air storage unit further includes a lubricant disposed in the cylinder chamber and the air storage chamber, and flowing along the protrusion into the cylinder chamber to lubricate the piston.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: April 22, 2025
    Assignee: Basso Industry Corp.
    Inventors: An-Gi Liu, Chang-Sheng Lin, Fu-Ying Huang
  • Patent number: 12276683
    Abstract: A measurement method for the impedance of the converter at multiple operating points based on the secondary-side disturbance includes the following steps: superimposing the positive sequence current disturbance in the current sampling value; superimposing the positive sequence voltage disturbance in the voltage sampling value; determining whether measurement data of the converter at two or more current operating points are obtained, if so, based on the measurement data of the converter at two current operating points, calculating values of A(s) and B(s); further calculating values of coefficients at each frequency point, and obtaining the impedance value of the converter at multiple current operating points by calculation. The above-mentioned measurement method overcomes the disadvantages of high cost and complicated operation of the impedance measurement method based on the primary-side disturbance, and solves the problem of lacking the pre-judgment function.
    Type: Grant
    Filed: December 6, 2024
    Date of Patent: April 15, 2025
    Assignee: Zhejiang University
    Inventors: Pengfei Hu, Quansen Rong, Yujing Li, Huanhai Xin, Ying Huang, Longyue Wang, Ping Ju, Daozhuo Jiang, Yanxue Yu, Dong Wang
  • Publication number: 20250113263
    Abstract: Presented are systems, methods, apparatuses, or computer-readable media for migrating integrated access and backhaul (IAB) nodes. A first network node may receive a first message comprising assistance information. The assistance information is associated with a migration of an integrated access and backhaul (IAB) entity.
    Type: Application
    Filed: January 26, 2022
    Publication date: April 3, 2025
    Inventors: Ying HUANG, Lin CHEN
  • Publication number: 20250111879
    Abstract: Example memory devices, memory systems, and methods for reducing time of program operation in NAND flash memory are disclosed. One example method includes programming a first memory cell in a first memory cell string of a memory cell array by applying a first programming voltage to a first word line coupled to the first memory cell string from a first time to a second time. A second programming voltage higher than or equal to the first programming voltage is applied to the first word line from the second time to a third time to program a second memory cell in a second memory cell string of the memory cell array, where the first word line is coupled to the second memory cell string.
    Type: Application
    Filed: November 17, 2023
    Publication date: April 3, 2025
    Inventors: Hongtao LIU, Xiangnan ZHAO, Ying HUANG, Lei GUAN
  • Publication number: 20250112006
    Abstract: A device includes a button, a base, a haptic engine coupled to the base, and a fastener fastening the button to the base and allowing movement of the button with respect to the base. The movement of the button with respect to the base enables, in part, a better alignment of the button with a device housing to which the base is attached. The haptic engine may include a core, an electric coil wound around a portion of the core, and an attraction plate separated from the core by a gap. The base may include a frame, a set of tabs extending from the core and fastened to the button to allow the movement of the button with respect to the base, and a set of flexures extending from the tabs and coupling the core to the frame. The attraction plate may also be coupled to the frame.
    Type: Application
    Filed: June 13, 2024
    Publication date: April 3, 2025
    Inventors: Darya Amin-Shahidi, Stephanie Moon, Alex M. Lee, Daniel M. Winslow, Scott D. Ridel, Jere C. Harrison, Jacob Barton, Ehsan Masoumi Khalil Abad, Kevin Y. Chung, Jinhong Qu, Sai Sharon Injeti, Fu-Ying Huang
  • Publication number: 20250113603
    Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating depopulated channel structures using split source or drain approaches, are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires, the first vertical arrangement of nanowires having one or more dielectric nanowires coupled to a dielectric source or drain structure. A first gate stack is over the first vertical arrangement of nanowires. A second vertical arrangement of nanowires is laterally spaced apart from the first vertical arrangement of nanowires, the second vertical arrangement of nanowires having one or more semiconductor nanowires coupled to an epitaxial source or drain structure, the one or more semiconductor nanowires horizontally corresponding to the one or more dielectric nanowires, and the epitaxial source or drain structure laterally spaced apart from the dielectric source or drain structure.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Inventors: Munzarin QAYYUM, Rohit GALATAGE, Marko RADOSAVLJEVIC, Cheng-Ying HUANG, Evan CLINTON, David BENNETT, Jami WIEDEMER
  • Publication number: 20250102142
    Abstract: A combustion assembly includes a gas adjusting device, a mixing pipe, and a burner. The gas adjusting device includes a gas adjusting valve, a nozzle, a connecting base, and an ignition unit. The gas adjusting valve includes a valve body for being detachably connected to a gas tank, an adjusting member located in a gas passage of the valve body, and a knob connected to the adjusting member and for adjusting a gas flow. The nozzle is disposed on the valve body. The connecting base is connected between the valve body and the burner and has a mixing chamber and an inlet. The nozzle extends into the mixing chamber. The inlet is located on a side of the nozzle. The ignition unit is disposed in the connecting base. An ignition electrode of the ignition unit extends to a position next to the burner.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Applicant: GRAND MATE CO., LTD.
    Inventors: CHIN-YING HUANG, HSIN-MING HUANG, HSING-HSIUNG HUANG, YEN-JEN YEH
  • Publication number: 20250106105
    Abstract: Presented are systems, methods, apparatuses, or computer-readable media for configuring mobile relay nodes. A first network node may send, to a second network node, configuration information. The configuration information may be associated with a node capable of providing at least one user plane (UP) function.
    Type: Application
    Filed: September 30, 2024
    Publication date: March 27, 2025
    Applicant: ZTE Corporation
    Inventors: Xueying DIAO, Ying HUANG, Lin CHEN, Tao QI
  • Patent number: 12261897
    Abstract: The present disclosure relates to an electronic device, webcast interaction system and method, a storage medium and a program product. A first motion parameter of a virtual object corresponding to an anchor user is determined according to acquired target feedback data of an audience user on a webcast of the anchor user. Further, the motion of the virtual object on the webcast screen is controlled according to the first motion parameter, to allow a first sensor tool for the anchor user to move with the virtual object.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: March 25, 2025
    Inventor: Ying Huang
  • Patent number: 12260161
    Abstract: A method for establishing a variation model related to circuit characteristics for performing circuit simulation includes: performing first, second, third, and fourth Monte Carlo simulation operations according to a first netlist file and predetermined process model data to generate a first, a second, a third, and a fourth performance simulation results, respectively, where the first netlist file is arranged to indicate a basic circuit in a circuit system; and execute a performance simulation results expansion procedure according to the first, the second, the third, and the fourth performance simulation results to generate a plurality of performance simulation results to establish the variation model, for performing the circuit simulation to generate at least one circuit simulation result according to one or more performance simulation results among the plurality of performance simulation results, where the number of the plurality of performance simulation results is greater than four.
    Type: Grant
    Filed: March 13, 2022
    Date of Patent: March 25, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wei-Ming Huang, Szu-Ying Huang, Mei-Li Yu, Yu-Lan Lo
  • Patent number: D1072773
    Type: Grant
    Filed: January 21, 2025
    Date of Patent: April 29, 2025
    Inventor: Ying Huang