Patents by Inventor Ying Huang

Ying Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240249784
    Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.
    Type: Application
    Filed: April 4, 2024
    Publication date: July 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
  • Publication number: 20240247282
    Abstract: The disclosure discloses an expression cassette for expressing a gene including overlapping open reading frames in an insect cell and an application thereof. The expression cassette includes from 5? to 3? and operably linked: a promoter capable of driving transcription in the insect cell; an artificially constructed sequence; the overlapping open reading frames missing only a first translation start codon; wherein the artificially constructed sequence includes a native or engineered intron with splicing activity in the insect cell, the intron includes ATG or the intron is located between any two adjacent nucleotides in ATG. A recombinant adeno-associated virus vector including the expression cassette of the disclosure regulates relative expressions of VP1, VP2, and VP3 proteins, and relative expressions of Rep78 and Rep52 proteins by using a designed intron sequence and through an intron splicing function for large-scale production of rAAV.
    Type: Application
    Filed: September 27, 2021
    Publication date: July 25, 2024
    Applicant: GENEVOYAGER (WUHAN) CO., LTD.
    Inventors: He XIAO, Xiaobin HE, Gang HUANG, Ying HU, Xing PAN, He HUANG, Liang DU, Mengdie WANG
  • Publication number: 20240244674
    Abstract: A physical layer collision avoidance (PLCA) device and a method for automatically determining a node identity for the PLCA device are provided. The method includes: generating a random number as identification information of the PLCA device, wherein the PLCA device maintains an identification information table and a device count; receiving a first synchronization packet, wherein the first synchronization packet includes first identification information of a first PLCA device; determining a first comparison result between the identification information of the PLCA device and the first identification information of the first PLCA device; updating the identification information table and the device count based on the first comparison result; sending a synchronization packet corresponding to the PLCA device based on the first comparison result; and determining the node identity of the PLCA device in a PLCA network based on the identification information table.
    Type: Application
    Filed: March 8, 2023
    Publication date: July 18, 2024
    Applicant: IC Plus Corp.
    Inventor: Chun-Ying Huang
  • Publication number: 20240242882
    Abstract: The present invention provides a wireless charging cable, a wireless charging coil structure and a producing method thereof, and a wireless charging device. The wireless charging cable has a conductive wire, an alloy layer and an insulation layer. The alloy layer is electroplated on an outer surface of the conductive wire and composed of nickel and iron, the insulation layer is coated on an outer surface of the alloy layer, wherein a better range of the cable diameter of the wireless charging cable is between 0.1 and 0.5 mm. The wireless charging coil structure has a sewed object and a sewing wire material including the wireless charging cable. The sewing wire material is sewed on the sewed object, and the wireless charging cable is sewed to become a wireless charging coil.
    Type: Application
    Filed: December 7, 2023
    Publication date: July 18, 2024
    Applicant: LUXSHARE PRECISION INDUSTRY COMPANY LIMITED
    Inventors: Kuan-Ying HO, Yu-Pei HUANG, Yao-Nien CHUNG, Chih-Yung WU
  • Publication number: 20240243227
    Abstract: Provided are an ultraviolet light emitting diode (LED) and a manufacturing method thereof. The manufacturing method includes: providing an LED wafer including a substrate and a semiconductor stacked layer, the semiconductor stacked layer has a lower surface and an upper surface, the semiconductor stacked layer includes a first semiconductor layer, a light emitting layer and a second semiconductor layer; focusing a first laser beam and a second laser beam into the substrate, a focusing position of the first laser beam is closer to the lower surface than that of the second laser beam, the first laser beam is focused to form at least one first laser cutting line, laser scratches of each first laser cutting line are quasi-circular, and the at least one first laser cutting line includes a laser cutting line closest to the lower surface; and separating the LED wafer to form LED chips.
    Type: Application
    Filed: January 18, 2024
    Publication date: July 18, 2024
    Inventors: Gong CHEN, Yashu ZANG, Jianbin CHEN, Bin JIANG, Chung-Ying CHANG, Shao-Hua HUANG
  • Publication number: 20240242656
    Abstract: A power supply circuit, a driving method thereof, a printed circuit board, a display module and a display apparatus are disclosed, which relates to a technical field of displaying. The power supply circuit includes a first power management chip and a second power management chip configured to be respectively connected with a display panel and provide different driving signals to the display panel, and the driving signals are configured for driving the display panel to display.
    Type: Application
    Filed: May 20, 2022
    Publication date: July 18, 2024
    Applicants: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Ying Zhang, Jin Sha, Can Shen, Xiang Fang, Bo Ran, Chao Gao, Yao Chen, Yiming Cheng, Jinxiang Li, Shifei Huang, Shengjie Yin, Pan Chen, Jun Tao, Wendi Zhang, Zhou Zhang, Qiuju Xie, Jun Wei, Hongchao Su
  • Publication number: 20240243946
    Abstract: Embodiments of the disclosure provide a physical layer collision avoidance (PLCA) device and a method for performing emergency transmission thereof. The method includes: in response to determining that the PLCA device enters an emergency transmission mode, finding a first PLCA device that is performing a corresponding first packet transmission; in response to determining that a first transmission priority of the first PLCA device is lower than a transmission priority of the PLCA device, suspending the first packet transmission of the first PLCA device; and in response to determining that it is the PLCA device's turn to perform a corresponding packet transmission, sending an emergency packet corresponding to the emergency transmission mode.
    Type: Application
    Filed: March 3, 2023
    Publication date: July 18, 2024
    Applicant: IC Plus Corp.
    Inventor: Chun-Ying Huang
  • Publication number: 20240244007
    Abstract: A reordering method performed by a receiving apparatus is provided. The receiving apparatus may receive a first PPDU from a transmitting apparatus, wherein the first PPDU includes a plurality of MPDUs, and the MPDUs correspond to the same BA window. The receiving apparatus may determine a traffic that each of the MPDUs belongs to according to an MPDU identification, wherein traffics that the plurality of MPDUs belonging to include a first traffic and a second traffic which is different from the first traffic. The receiving apparatus may perform a reordering operation for the MPDUs belonging to the first traffic, and a reordering operation for the MPDUs belonging to the second traffic, respectively. The receiving apparatus may transmit a BA frame in response to the first PPDU to the transmitting apparatus, wherein the BA frame includes information for indicating whether the MPDUs in the first PPDU have been successfully received.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 18, 2024
    Inventors: Chi-Han HUANG, Yen-Hsiung TSENG, Cheng-Ying WU, Wei-Wen LIN
  • Patent number: 12041834
    Abstract: A display device includes: a substrate, a plurality of pixel islands, and a plurality of traces. The substrate is stretchable. The plurality of pixel islands are disposed over the substrate. The plurality of traces respectively connect two adjacent pixel islands of the plurality of pixel islands, and each of the traces extends in a first main direction and then extends in a second main direction through a turning angle.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: July 16, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Zih-Shuo Huang, Tsung-Ying Ke
  • Patent number: 12040616
    Abstract: A distributed voltage clamping method for a 100% renewable-energy sending-end grid, including: selecting key nodes from the 100% renewable-energy sending-end grid, including their voltage levels and positions; installing a dynamic reactive power compensation device on each key node, where the dynamic reactive power compensation device is controlled by a constant alternating-current (AC) voltage effective value, and the instruction value of the constant AC voltage effective value is adjustable according to an operation mode; according to AC voltage variation of the sending-end grid under a typical working condition, judging whether the key nodes meet the checking requirements; if not, selecting more key nodes.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: July 16, 2024
    Assignee: Zhejiang University
    Inventors: Zheren Zhang, Wentao Liu, Yiyan Dong, Zheng Xu, Ying Huang
  • Patent number: 12040018
    Abstract: A method includes setting a current level of a write signal to a first non-zero value for a first period of time. The write signal is provided to a memory element during the first period of time. The current level of the write signal is adjusted from the first non-zero value to a second non-zero value, different from the first non-zero value, for a second period of time. The write signal is provided to the memory element during the second period of time. The current level of the write signal is adjusted from the second non-zero value to a third value, different from the first non-zero value and different from the second non-zero value, for a third period of time. The write signal is provided to the memory element during the third period of time.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Che Lee, Huai-Ying Huang
  • Publication number: 20240236875
    Abstract: A method for adjusting time-averaged (TA) parameters of a transmitting (TX) power of a radio module includes: obtaining at least one message of the at least one other radio module or at least one message of the radio module; determining a scenario of the TX power of the radio module according to the at least one message of the at least one other radio module or the at least one message of the radio module; determining whether the scenario is different from a predetermined scenario of the TX power of the radio module; and in response to the scenario being different from the predetermined scenario, adjusting the TA parameters according to the scenario.
    Type: Application
    Filed: October 2, 2023
    Publication date: July 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yi-Ying Huang, Yi-Hsuan Lin, Han-Chun Chang
  • Publication number: 20240234422
    Abstract: Embodiments disclosed herein include stacked forksheet transistor devices, and methods of fabricating stacked forksheet transistor devices. In an example, an integrated circuit structure includes a backbone. A first transistor device includes a first vertical stack of semiconductor channels adjacent to an edge of the backbone. A second transistor device includes a second vertical stack of semiconductor channels adjacent to the edge of the backbone. The second transistor device is stacked on the first transistor device.
    Type: Application
    Filed: March 22, 2024
    Publication date: July 11, 2024
    Inventors: Cheng-Ying HUANG, Gilbert DEWEY, Anh PHAN, Nicole K. THOMAS, Urusa ALAAN, Seung Hoon SUNG, Christopher M. NEUMANN, Willy RACHMADY, Patrick MORROW, Hui Jae YOO, Richard E. SCHENKER, Marko RADOSAVLJEVIC, Jack T. KAVALIEROS, Ehren MANNEBACH
  • Publication number: 20240227145
    Abstract: A driving device for a nail gun includes a striking unit and an air storage unit. The striking unit includes a striking cylinder connected to the nail gun and defining a cylinder chamber having an opening, and a piston disposed in and making an air-tight contact with the striking cylinder. The air storage unit includes an air storage cylinder including a protrusion that protrudes toward the opening and cooperating with the striking cylinder to define an air storage chamber that is in fluid communication with the cylinder chamber via the opening. When the piston moves in a pressure-generating direction, air in the air storage chamber is pressurized. The air storage unit further includes a lubricant disposed in the cylinder chamber and the air storage chamber, and flowing along the protrusion into the cylinder chamber to lubricate the piston.
    Type: Application
    Filed: June 5, 2023
    Publication date: July 11, 2024
    Applicant: BASSO INDUSTRY CORP.
    Inventors: An-Gi LIU, Chang-Sheng LIN, Fu-Ying HUANG
  • Publication number: 20240222521
    Abstract: Technologies for ribbon field-effect transistors with variable nanoribbon numbers are disclosed. In an illustrative embodiment, a stack of semiconductor nanoribbons is formed, with each semiconductor nanoribbon having a source region, a channel region, and a drain region. Some or all of the channel regions can be selectively removed, allowing for the drive and/or leakage current to be tuned. In some embodiments, one or more of the semiconductor nanoribbons near the top of the stack can be removed. In other embodiments, one or more of the semiconductor nanoribbons at or closer to the bottom of the stack can be removed.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Evan A. Clinton, Rohit V. Galatage, Cheng-Ying Huang, Jack T. Kavalieros, Munzarin F. Qayyum, Marko Radosavljevic, Jami A. Wiedemer
  • Publication number: 20240216378
    Abstract: A compound of Formula (I), or a pharmaceutically acceptable salt thereof, is provided that has been shown to be useful for treating a PRC2-mediated disease or disorder: wherein R1, R2, R3, R4, R5, and n are as defined herein.
    Type: Application
    Filed: January 26, 2024
    Publication date: July 4, 2024
    Inventors: Ho Man CHAN, Xiang-Ju Justin GU, Ying HUANG, Ling LI, Yuan MI, Wei QI, Martin SENDZIK, Yongfeng SUN, Long WANG, Zhengtian YU, Hailong ZHANG, Ji Yue (Jeff) ZHANG, Man ZHANG, Qiong ZHANG, Kehao ZHAO
  • Publication number: 20240222376
    Abstract: Technologies for ribbon field-effect transistors with variable nanoribbon channel dimensions are disclosed. In an illustrative embodiment, a stack of semiconductor nanoribbons are formed, with each semiconductor nanoribbon having a source region, a channel region, and a drain region. Some or all of the channel regions can be selectively narrowed and/or thinned, allowing for the drive and/or leakage current to be tuned. In some embodiments, one or more of the semiconductor nanoribbons near the top of the stack can be narrowed and/or thinned. In other embodiments, one or more of the semiconductor nanoribbons at or closer to the bottom of the stack can be narrowed and/or thinned.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Intel Corporation
    Inventors: Marko Radosavljevic, Jami A. Wiedemer, Munzarin F. Qayyum, Cheng-Ying Huang, Rohit V. Galatage, Evan A. Clinton
  • Publication number: 20240207240
    Abstract: The present invention provides a method for treating patients with cognitive dysfunction complicating HIV-associated CM with lenalidomide. Patients with HIV-associated CM develop IRIS, some of which develop cognitive dysfunction. The patients with HIV-associated CM-IRIS are diagnosed as having cognitive dysfunction by Chinese version of the Montreal Cognitive Assessment (MoCA) and International HIV Dementia Scale (IHDS). After the treatment with lenalidomide, the MoCA score and IHDS score of the patients are improved significantly, and the leukocyte, proteins, albumin, IgG and inflammatory cytokines (growth-related oncogene, interleukin [IL]-10, granulocyte-colony stimulating factor, IL-6, IL-8, complement factor H, tumor necrosis factor-?, and ?2 macroglobulin) in cerebrospinal fluid are greatly reduced.
    Type: Application
    Filed: December 20, 2023
    Publication date: June 27, 2024
    Inventors: Biao Zhu, Ran Tao, Ye Xiong, Xiaorong Peng, Ying Huang
  • Patent number: 12020929
    Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to manufacturing transistors that include a substrate, an epitaxial layer with a first side and a second side opposite the first side, where the first side and the second side of the epitaxial layer are substantially planar, where the second side of the epitaxial layer is substantially parallel to the first side, and where the first side of the epitaxial layer is directly coupled with a side of the substrate. In particular, the epitaxial layer may be adjacent to an oxide layer having a side that is substantially planar, where the second side of the epitaxial layer is adjacent to the side of the oxide layer, and the epitaxial layer was grown and the growth was constrained by the oxide layer.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: June 25, 2024
    Assignee: Intel Corporation
    Inventors: Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron Lilak, Ehren Mannebach, Patrick Morrow, Anh Phan, Willy Rachmady, Hui Jae Yoo
  • Patent number: D1035562
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: July 16, 2024
    Assignee: KENDA RUBBER IND. CO., LTD.
    Inventors: Yin-Jie Huang, Sin-Ying Liou