Patents by Inventor Ying Huang

Ying Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220011511
    Abstract: A method for fabricating a photonic device is provided. The method includes forming an optical coupler and a waveguide structure connected to the optical coupler over a semiconductor substrate; forming a metal-dielectric stack over the optical coupler and the waveguide structure; etching a hole in the metal-dielectric stack and vertically overlapping the optical coupler; and forming a protection layer on a sidewall and a bottom of the hole.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 13, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sui-Ying HSU, Yueh-Ying LEE, Chien-Ying WU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
  • Patent number: 11223988
    Abstract: A method of managing default QoS rules for PDU session is proposed. A PDU session defines the association between the UE and the data network that provides a PDU connectivity service. Each PDU session is identified by a PDU session ID, and may include multiple QoS flows and QoS rules. There can be more than one QoS rule associated with the same QoS flow. A default QoS rule is required to be sent to the UE for every PDU session establishment and it is associated with a QoS flow. Within a PDU session, there should be one and only one default QoS rule. In one novel aspect, UE behavior and error handling for proper QoS rule management is defined for PDU session establishment and modification procedures to enforce the one and only one default QoS rule policy.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: January 11, 2022
    Assignee: MEDIATEK INC.
    Inventors: Chien-Chun Huang-Fu, Po-Ying Chuang
  • Patent number: 11216025
    Abstract: The disclosure provides an adjustable fixing assembly. The adjustable fixing assembly includes a base plate and a cover plate. The cover plate includes a plate portion and a protrusion portion protruding from the plate portion. The cover plate includes a first installation position and a second installation position. When the cover plate is in the first installation position, the protrusion portion extends away from the base plate, and the cover plate is spaced apart from the base plate by a first minimum distance. When the cover plate is in the second installation position, the protrusion portion extends towards the base plate, and the cover plate is spaced apart from the base plate by a second minimum distance, where the second minimum distance is smaller than the first minimum distance.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: January 4, 2022
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Shiang-Chun Tsau, Chen-Wei Huang, Chun-Ying Yang, Ying-Chao Peng, Hsiang-Yun Lu, Tai-Yi Chiang
  • Patent number: 11214774
    Abstract: The present disclosure includes a PINK1-C-terminal domain (PINK1-CTD) polypeptide that binds to ERBB tyrosine kinase domain (ERBB-TKD) and therefore impedes ERBB from dimerization and activation. The PINK1-CTD polypeptide inhibits, prevents and/or treats ERBB-expressing cancers. The disclosure demonstrates the anti-tumor function of the PINK1-CTD, which provides a new direction for ERBB-expressing cancer therapy.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: January 4, 2022
    Assignees: National Taiwan University, Academia Sinica
    Inventors: Pan-Chyr Yang, Pei-Ying Lin, Bo-Tsang Huang
  • Patent number: 11217479
    Abstract: A multiple metallization scheme in conductive features of a device uses ion implantation in a first metal layer to make a portion of the first metal layer soluble to a wet cleaning agent. The soluble portion may then be removed by a wet cleaning process and a subsequent second metal layer deposited over the first metal layer. An additional layer may be formed by a second ion implantation in the second metal layer may be used to make a controllable portion of the second metal layer soluble to a wet cleaning agent. The soluble portion of the second metal layer may be removed by a wet cleaning process. The process of depositing metal layers, implanting ions, and removing soluble portions, may be repeated until a desired number of metal layers are provided.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: January 4, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Ying Ho, Fang-I Chih, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20210401520
    Abstract: Systems and methods for saturated robotic movement are provided. In one aspect, there is provided a robotic system, including a robotic arm configured to control movement of a medical instrument, and a processor configured to: receive a first user input from a user for moving the medical instrument with the robotic arm, determine that moving the robotic arm according to the first user input would cause a contact point of the robotic arm to contact or cross a collision boundary surrounding an object, and guide the movement of the robotic arm such that the contact point of the robotic arm continuously moves along the collision boundary based in part on the first user input, in response to the determination that moving the robotic arm according to the first user input would cause the contact point to contact or cross the collision boundary.
    Type: Application
    Filed: May 11, 2021
    Publication date: December 30, 2021
    Inventors: Yanan HUANG, Nima SARLI, Ying MAO, David Stephen MINTZ
  • Publication number: 20210407997
    Abstract: Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using a selective bottom-up approach, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a substrate. The vertical arrangement of nanowires has one or more active nanowires above one or more oxide nanowires. A first gate stack is over and around the one or more active nanowires. A second gate stack is over and around the one or more oxide nanowires.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 30, 2021
    Inventors: Nicole THOMAS, Ehren MANNEBACH, Cheng-Ying HUANG, Marko RADOSAVLJEVIC
  • Publication number: 20210408767
    Abstract: The present invention proposes an O-band silicon-based high-speed semiconductor laser diode for optical communication and its manufacturing method, by using different buffer layers to form the growth surface of InP material with low dislocation density; N—InAlGaAs is used instead of conventional N—InAlAs electron-blocking layer in the epi-structure to reduce the barrier for electrons to enter the quantum wells from N-type and lower the threshold; a superlattice structure quantum barrier is used instead of a single layer barrier structure to improve the transport of heavy holes in the quantum wells; and the material structure is adjusted to achieve a reliable O-band high direct modulation speed semiconductor laser diode for optical communication on silicon substrate.
    Type: Application
    Filed: August 31, 2021
    Publication date: December 30, 2021
    Applicant: FuJian Z.K. Litecore,Ltd.
    Inventors: zheng qun Xue, hui ying Huang, chang ping Zhang, ze lei Lin, rui yu Fang, hui Su
  • Publication number: 20210402615
    Abstract: Systems and methods for detecting contact between a link and an external object are provided. In one aspect, there is provided a robotic system, including a manipulatable link, a rigid shell configured to overlay the manipulatable link, and one or more sensors positioned between the rigid shell and the manipulatable link. The one or more sensors are configured to detect contact between the rigid shell and an external object.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 30, 2021
    Inventors: Nicholas J. EYRE, Alex C. SPIES, Colin Allen WILSON, Mason Myles MARKEE, Ying MAO, Bo YANG, Yanan HUANG
  • Publication number: 20210407947
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Chi CHEN, Hsun-Ying HUANG, Chih-Ming LEE, Shang-Yen WU, Chih-An YANG, Hung-Wei HO, Chao-Ching CHANG, Tsung-Wei HUANG
  • Publication number: 20210407999
    Abstract: Embodiments disclosed herein include stacked forksheet transistor devices, and methods of fabricating stacked forksheet transistor devices. In an example, an integrated circuit structure includes a backbone. A first transistor device includes a first vertical stack of semiconductor channels adjacent to an edge of the backbone. A second transistor device includes a second vertical stack of semiconductor channels adjacent to the edge of the backbone. The second transistor device is stacked on the first transistor device.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Cheng-Ying HUANG, Gilbert DEWEY, Anh PHAN, Nicole K. THOMAS, Urusa ALAAN, Seung Hoon SUNG, Christopher M. NEUMANN, Willy RACHMADY, Patrick MORROW, Hui Jae YOO, Richard E. SCHENKER, Marko RADOSAVLJEVIC, Jack T. KAVALIEROS, Ehren MANNEBACH
  • Patent number: 11207008
    Abstract: The present disclosure provides a system and method for analyzing a physiological parameter of a vital sign signal. The method may include acquiring a vital sign signal, storing data, computing and analyzing, processing, and outputting a result. The system may compute and analyze the physiological parameter of the vital sign signal, especially a blood oxygen saturation, via a plurality of algorithms, judge or process the computation result, and output the judgment result.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: December 28, 2021
    Assignee: VITA-COURSE TECHNOLOGIES (HAINAN) CO., LTD.
    Inventors: Ying Lu, Chuanmin Wei, Jiwei Zhao, Heng Peng, Ziming Deng, Zijian Huang, Zhiyong Wang
  • Patent number: 11207325
    Abstract: A compound of Formula (I), or a pharmaceutically acceptable salt thereof, is provided that has been shown to be useful for treating a PRC2-mediated disease or disorder: wherein R1, R2, R3, R4, R5, and n are as defined herein.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 28, 2021
    Assignee: Novartis AG
    Inventors: Ho Man Chan, Xiang-Ju Justin Gu, Ying Huang, Ling Li, Yuan Mi, Wei Qi, Martin Sendzik, Yongfeng Sun, Long Wang, Zhengtian Yu, Hailong Zhang, Ji Yue (Jeff) Zhang, Man Zhang, Qiong Zhang, Kehao Zhao
  • Publication number: 20210396512
    Abstract: An alarming and measuring method for a volume measuring apparatus including a processor, a button, a first camera, and a second camera, the method includes: controlling the first and second cameras to capture a left image and a right image when the button is pressed; generating a depth graphic by the processor according to the left and right image; scanning the depth graphic to determine an existence of a target box; calculating a capturing angle of the apparatus with respect to the target box based on contour lines of the target box; alarming when the target box is not in the depth graphic or the capturing-angle does not match a measuring condition; and, calculating volume related data of the target box according to the contour lines when the target box exists and the capturing angle matches the measuring condition.
    Type: Application
    Filed: May 3, 2021
    Publication date: December 23, 2021
    Inventors: Kuo-Chun WANG, Shu-Ying HUANG
  • Publication number: 20210392905
    Abstract: A kiln includes a stage, a stove, a gas supply assembly, and a combustion device wherein, the stage includes a stage body and a carrier member. The stage body has a first chamber, while the carrier member is detachably disposed at the stage body. The stove is joined to the stage body and has an entry and a second chamber. The gas supply assembly is disposed at the stage body, and part of the gas supply assembly is located in the first chamber. The combustion device is located in the second chamber. The carrier member can be detached from the stage body and be moved out of the stove from the entry so that the first chamber communicates with the second chamber. In this way, the working space inside the kiln can be increased, which is convenient for users to repair and maintain the gas supply assembly or the combustion device.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Applicant: GRAND MATE CO., LTD.
    Inventors: CHUNG-CHIN HUANG, CHIN-YING HUANG, HSIN-MING HUANG, HSING-HSIUNG HUANG, YEN-JEN YEH, KUAN-CHOU LIN
  • Publication number: 20210394499
    Abstract: A tool for pressing a foamed material onto a substrate, a manufacturing apparatus thereof, and a method for manufacturing a laminated structure of a heat-retaining container are disclosed. The tool comprises a body, a blade portion extending in a lengthwise direction from the body, and a press portion extending in the lengthwise direction from the body and configured for pressing the foamed material onto the substrate. The tool may be used to press a foamed material sheet onto a paper substrate and form a tear line on the foamed material sheet at the same time to simplify the manufacturing process of the laminated structure of a heat-retaining container.
    Type: Application
    Filed: September 1, 2021
    Publication date: December 23, 2021
    Inventor: Shih-Ying Huang
  • Patent number: 11204897
    Abstract: A computer-implemented method includes executing, using a computer, a process including a main thread that receives a layout file. The layout file includes a first plurality of tags and compressed information blocks. Each tag of the first plurality is associated with a compressed information block. The method further includes decompressing the compressed information blocks using sub-threads and thereby obtaining decompressed information blocks. The sub-threads are created by the main thread, and each sub-thread corresponds to a compressed information block. The decompressed information blocks are combined into decompressed layout information. The decompressed file is partitioned and each partition is provided to a node of a distributed computing system for performing layout correction.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu An Tien, Changsheng Ying, Hsu-Ting Huang, Ru-Gun Liu
  • Patent number: 11205706
    Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. A first insulating layer is formed, in the source/drain space, at least on etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space, thereby forming air gaps between the source/drain epitaxial layer and the first semiconductor layers.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Lin Yang, Tung Ying Lee, Shao-Ming Yu, Chao-Ching Cheng, Tzu-Chiang Chen, Chao-Hsien Huang
  • Publication number: 20210372770
    Abstract: A volume measuring apparatus is disclosed and includes a body having a working part and a holding part extended downward from the bottom of the working part, a processor arranged in the body, a first camera, a second camera, and a barcode capturing unit arranged on a front end of the working part, a first button arranged on one side of the holding part, and a second button arranged on a top of the working part. The first button and the second button are different types of button. By respectively operating the first button and the second button, the processor is controlled to perform a measuring action of the volume of a target box or to perform a decoding action of a target barcode based on the image captured by at least one of the first camera, the second camera, and the barcode capturing unit.
    Type: Application
    Filed: April 19, 2021
    Publication date: December 2, 2021
    Inventors: Kuo-Chun WANG, Shu-Ying HUANG
  • Publication number: 20210371954
    Abstract: The present disclosure provides a method for optimizing a liquid injection process of ionic rare earth ore, including the following steps of: 1) testing the hydraulic properties of an ore body; 2) determining the diffusion degree of the ore body; 3) determining the spatial distribution of the rare earth grade and the impurity grade of the ore body prior to leaching; 4) determining model parameters of competitive exchange of rare earth ions and impurity ions with ammonium ions; 5) obtaining distribution of rare earth ion concentration within the ore body after completion of leaching; 6) obtaining a profile plot of a rare earth leaching rate as a function of the concentration and dosage of an injected leaching agent; and 7) determining a minimum leaching agent dosage to achieve a target leaching rate according to the profile plot, and then determining the ammonium sulfate concentration according to the minimum leaching agent dosage.
    Type: Application
    Filed: March 11, 2021
    Publication date: December 2, 2021
    Applicants: JIANGXI UNIVERSITY OF SCIENCE AND TECHNOLOGY, LONGYAN RARE-EARTH DEVELOPMENT CO., LTD.
    Inventors: Guanshi WANG, Ping LONG, Wenli LIU, Ying HUANG, Dingshun HE, Lei QIN, Shili HU, Chenliang PENG, Sihai LUO, Guoqiang DENG