Abstract: Provided are a memory device and a method of forming the same. The memory device includes: a selector; a magnetic tunnel junction (MTJ) structure, disposed on the selector; a spin orbit torque (SOT) layer, disposed between the selector and the MTJ structure, wherein the SOT layer has a sidewall aligned with a sidewall of the selector; a transistor, wherein the transistor has a drain electrically coupled to the MTJ structure; a word line, electrically coupled to a gate of the transistor; a bit line, electrically coupled to the SOT layer; a first source line, electrically coupled to a source of the transistor; and a second source line, electrically coupled to the selector, wherein the transistor is configured to control a write signal flowing between the bit line and the second source line, and control a read signal flowing between the bit line and the first source line.

Abstract: A processing device in a memory system identifies a workload condition associated with a memory device. The processing device determines a host rate associated with the memory device based on the workload condition. The processing device detects a change in a condition of the memory device from a first state condition to a second state condition. The processing device determines, while the memory device is in the second state condition, an adjusted host rate, wherein the adjusted host rate is used to determine a credit consuming rate for a host operation.

Abstract: An oven includes an oven body, a heating element, a frame, and an oven door. The oven body has an inner space inside and includes a front plate, wherein the front plate has an entrance that communicates with the inner space. The heating element is adapted to heat the inner space. The frame is engaged with the oven body and has an abutted portion. The oven door is pivotally connected to the oven body and is located at the entrance. The oven door can pivot to a closed position to close the entrance and can pivot downward to an open position from the closed position to open the entrance. When the oven door is located at the open position, the second surface abuts against the abutted portion of the frame, thereby forming a platform outside the entrance for placing objects.

Abstract: The present invention discloses a catalytic hydrogenation method for carbon nine resin, comprising the following steps: 1) adding a Pt—W—Y/?-Al2O3 catalyst in the first half of a fixed bed, adding a Pd—Zr—Nd/?-Al2O3 catalyst in the second half of the fixed bed, and feeding hydrogen for reduction; and 2) catalytic hydrogenating the pretreated carbon nine resin in the fixed bed. In the present invention, different catalysts capable of reacting under the same catalytic conditions are added in the first and second halves of the fixed bed, and the two different catalysts play different roles, and can be active and complementary to each other under the same conditions. The synergistic effect of the two catalysts plays a good catalytic role. Moreover, the production process is simplified, and the production cost is saved.

Abstract: A fan-out semiconductor device includes stacked semiconductor dies having die bond pads arranged in columns exposed at a sidewall of the stacked semiconductor dies. The stacked dies are encapsulated in a photo imageable dielectric (PID) material, which is developed to form through-hole cavities that expose the columns of bond pads of each die at the sidewall. The through-hole cavities are plated or filled with an electrical conductor to form conductive through-holes coupling die bond pads within the columns to each other.

Abstract: A data transmission method includes receiving, by first UE, bearer configuration information sent by a serving node; and performing, by the first UE, bearer configuration. A data transmission method, includes: sending, by a first base station, a sidelink (SL) data forwarding request to a second base station; and receiving, by the first base station, an SL data forwarding response sent by the second base station.

Abstract: A ship navigation display system is set in a ship and includes a communications device, sensing device, first computing device, second computing device and wearable device. The communications device receives first coordinate information corresponding to a ship. The sensing device senses second coordinate information corresponding to a first ship around the ship. The first computing device is communicably connected with the communications device and calculates a collision probability according to the first and second coordinate information. When the collision probability is greater than a threshold value, the first computing device transmits a collision prediction signal. The second computing device receives the collision prediction signal and projects the second coordinate information corresponding to the first ship to a virtual coordinate in a virtual space.

Abstract: The present application provides a battery module and an electric vehicle. The battery module includes a case, a longitudinal beam, and a tray. The case is provided with at least one exhaust port. The longitudinal beam is disposed in the case and is abutted against a bottom surface of the case to partition accommodating areas in the case on both sides of the longitudinal beam along a width direction. The tray is disposed in one of the accommodating areas and is configured to install a battery cell. A through hole opposite to an end of the battery cell is defined on the tray, the tray is spaced from the bottom surface of the case to define a pressure relief cavity, the through hole and the exhaust port are respectively communicated with the pressure relief cavity.

Abstract: A detection method for a malicious domain name in a domain name system (DNS) and a detection device are provided. The method includes: obtaining network connection data of an electronic device; capturing log data related to at least one domain name from the network connection data; analyzing the log data to generate at least one numerical feature related to the at least one domain name; inputting the at least one numerical feature into a multi-type prediction model, which includes a first data model and a second data model; and predicting whether a malicious domain name related to a malware or a phishing website exists in the at least one domain name by the multi-type prediction model according to the at least one numerical feature.

Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.

Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.

Abstract: A display panel is provided. The display panel includes a substrate, and a plurality of anodes, a pixel definition layer, a light-emitting layer, and a cathode layer that are laminated on the substrate. By collecting the anodes spaced apart from each other in a first direction in a same first pixel opening, number of the first pixel openings in the display area can be reduced, and number of ink droplets that can be sprayed within a single first pixel opening can be increased, so that a risk of bridging between adjacent ones of pixel openings can be lowered.

Abstract: Disclosed herein are memory device, method for program operations. In an aspect, a memory device comprises a memory configured to store a program code and a processor. The processor is configured to perform a first programming to a first cell of the memory device by incremental step pulse programming (ISPP) with a first step voltage. The processor is further configured to perform a second programming to a second cell of the memory device by ISPP with a second step voltage. The first step voltage is larger than the second step voltage. The first cell corresponds to a first target voltage and the second cell corresponds to a second target voltage. The first cell corresponds to a first target voltage and the second cell corresponds to a second target voltage.

Abstract: A transistor includes a body of semiconductor material, where the body has laterally opposed body sidewalls and a top surface. A gate structure contacts the top surface of the body. A source region contacts a first one of the laterally opposed body sidewalls and a drain region contacts a second one of the laterally opposed body sidewalls. A first isolation region is under the source region and has a top surface in contact with a bottom surface of the source region. A second isolation region is under the drain region and has a top surface in contact with a bottom surface of the drain region. Depending on the transistor configuration, a major portion of the inner-facing sidewalls of the first and second isolation regions contact respective sidewalls of either a subfin structure (e.g., FinFET transistor configurations) or a lower portion of a gate structure (e.g., gate-all-around transistor configuration).

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: A memory device includes a memory array including a cell, and a controller coupled to the memory array. The controller is configured to control sequentially applying programming voltage pulses to the cell. A pulse width of each of the programming voltage pulses decreases as a pulse count of the programming voltage pulses increases.

Abstract: A method for data radio bearer management, the method including: transmitting a data radio bearer (DRB) setup request message to a wireless communication node; receiving a DRB setup response message from the wireless communication node, determining at least one DRB and at least one Quality of Service (QoS) flow mapped to the at least one DRB supported by the wireless communication node; and configuring the wireless communication node to support the at least one DRB and the at least one QoS flow.

Abstract: A battery module and an electric vehicle are provided by the present application. The battery module includes a case body and at least one tray; at least one exhaust port is defined in the case body, at least one tray mounting cavity is defined in the case body, and the case body includes a first mounting surface surrounding a periphery of the tray; the tray is disposed in the tray mounting cavity to divide the tray mounting cavity into a cell accommodating cavity located above the tray and a pressure relief cavity located below the tray, the tray is provided with through holes facing battery cells, the pressure relief cavity is communicated with the through holes and the exhaust port, respectively, and the cell accommodating cavity is configured to accommodate the battery cells; the tray includes a second mounting surface, and the second mounting surface abuts against the first mounting surface.

Abstract: A light-emitting diode and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, an LED wafer is provided. The LED wafer includes a substrate and a light-emitting semiconductor stacking structure positioned on the surface of the substrate. The light-emitting semiconductor stacking structure includes a first type semiconductor layer, an active layer, and a second type semiconductor layer from a side of the substrate. Second, dicing lanes are defined on the upper surface of the LED wafer. Third, dicing is performed along the dicing lanes of the substrate using a laser. The laser is focused on the lower surface of the substrate to form a surface hole and focused inside the substrate to form an internal hole. The diameter of the surface hole is greater than the diameter of the internal hole. Fourth, the LED wafer is separated into LED chips along the dicing lanes.