Patents by Inventor Ying Shen

Ying Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170165158
    Abstract: Disclosed is a hair treatment composition comprising from 0.00001 to 1% zinc salt by weight of the composition, from 0.2 to 2% non-ionic surfactant by weight of the composition, and a preservative system comprising an antimicrobial urea derivative.
    Type: Application
    Filed: June 1, 2015
    Publication date: June 15, 2017
    Applicant: Conopco, Inc., d/b/a UNILEVER
    Inventors: Xiaojing CHEN, Amit JAYASWAL, Ying SHEN
  • Publication number: 20170170394
    Abstract: A resistive random access memory is provided. The resistive random access memory includes a bottom electrode, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The bottom electrode is disposed over a substrate. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer as an oxygen supply layer is at least disposed at sidewalls of the oxygen exchange layer.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 15, 2017
    Inventors: Frederick Chen, Ping-Kun Wang, Shao-Ching Liao, Po-Yen Hsu, Yi-Hsiu Chen, Ting-Ying Shen, Bo-Lun Wu, Meng-Hung Lin
  • Patent number: 9666570
    Abstract: The invention provides a memory device and a manufacturing method thereof. The memory device includes a substrate, a capacitor, a protection device, a first metal interconnect, and a second metal interconnect. The capacitor is located on the substrate of a first region. The protection device is located in the substrate of a second region. The capacitor includes a plurality of bottom electrodes, a top electrode, and a capacitor dielectric layer. The top electrode has a first portion and a second portion, wherein the second portion is extended to the second region. The capacitor dielectric layer is located between the bottom electrodes and the top electrode. The first metal interconnect is located between the capacitor and the substrate. The second metal interconnect is located between the second portion of the top electrode and the protection device. The top electrode is electrically connected to the protection device through the second metal interconnect.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: May 30, 2017
    Assignee: Winbond Electronics Corp.
    Inventors: Bo-Lun Wu, Chia-Hua Ho, Ting-Ying Shen, Meng-Hung Lin
  • Publication number: 20170139812
    Abstract: A method, computer program product, and system for testing an application on a GUI are provided. A request to perform a test of an application is received. The test uses a script that includes instructions to perform real actions on a GUI of the application. Execution of the script is initiated. A test recording is generated by capturing a first plurality of screenshots of the GUI during the test. In response to detecting an error during execution of the script, a baseline video is retrieved. The baseline video includes a second plurality of screenshots of the GUI from a successful execution of the script. An error message is issued. The error message includes at least a portion of the test recording and at least a portion of the baseline video.
    Type: Application
    Filed: April 21, 2016
    Publication date: May 18, 2017
    Inventors: Zhu Hong Cai, Dong Rui Li, Miao Liu, Ying Shen, Kui Song
  • Publication number: 20170125673
    Abstract: Provided are a resistive memory and a method of fabricating the resistive memory. The resistive memory includes a first electrode, a second electrode, a variable resistance layer, an oxygen exchange layer, and a protection layer. The first electrode and the second electrode are arranged opposite to each other. The variable resistance layer is arranged between the first electrode and the second electrode. The oxygen exchange layer is arranged between the variable resistance layer and the second electrode. The protection layer is arranged at least on sidewalls of the oxygen exchange layer.
    Type: Application
    Filed: March 9, 2016
    Publication date: May 4, 2017
    Inventors: Po-Yen Hsu, Ting-Ying Shen, Chia-Hua Ho, Chih-Cheng Fu, Frederick Chen
  • Patent number: 9583813
    Abstract: Various embodiments are directed toward systems and method for manufacturing low cost passive waveguide components. For example, various embodiments relate to low cost manufacturing of passive waveguide components, including without limitation, waveguide filters, waveguide diplexers, waveguide multiplexers, waveguide bends, waveguide transitions, waveguide spacers, and antenna adapters. Some embodiments comprise manufacturing a passive waveguide component by creating a non-conductive structure using a low cost fabrication technology, such as injection molding or three-dimensional (3D) printing, and then forming a conductive layer over the non-conductive structure such that the conductive layer creates an electrical feature of the passive waveguide component.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: February 28, 2017
    Assignee: Aviat U.S., Inc.
    Inventors: Jayesh Nath, Ying Shen, Edwin Nealis
  • Publication number: 20170018709
    Abstract: The invention provides a memory device and a manufacturing method thereof. The memory device includes a substrate, a capacitor, a protection device, a first metal interconnect, and a second metal interconnect. The capacitor is located on the substrate of a first region. The protection device is located in the substrate of a second region. The capacitor includes a plurality of bottom electrodes, a top electrode, and a capacitor dielectric layer. The top electrode has a first portion and a second portion, wherein the second portion is extended to the second region. The capacitor dielectric layer is located between the bottom electrodes and the top electrode. The first metal interconnect is located between the capacitor and the substrate. The second metal interconnect is located between the second portion of the top electrode and the protection device. The top electrode is electrically connected to the protection device through the second metal interconnect.
    Type: Application
    Filed: October 21, 2015
    Publication date: January 19, 2017
    Inventors: Bo-Lun Wu, Chia-Hua Ho, Ting-Ying Shen, Meng-Hung Lin
  • Patent number: 9538658
    Abstract: A compact transition structure includes a printed circuit board, wherein there is a rectangular region on one side of the printed circuit board and the rectangular region has a pair of long edges and a pair of short edges; a transition probe on the one side of the printed circuit board, wherein the transition probe extends into the rectangular region through a long edge of the rectangular region and has a terminal near a center of the rectangular region; and a coupler probe on the one side the printed circuit board, wherein the coupler probe extends into the rectangular region through a short edge of the rectangular region and has a terminal before the center of the rectangular region such that the coupler probe is electrically insulated from the transition probe.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: January 3, 2017
    Assignee: ZTE (USA) INC.
    Inventors: Ying Shen, Peng Gao
  • Patent number: 9531412
    Abstract: Various embodiments provide for systems and methods for increased linear output power of a transmitter. An exemplary wireless communications system for transmitting an input signal comprises a predistorter module, a GaN power amplifier, a coupler, and an antenna. The predistorter module is configured to detect existing distortion by comparing the input signal to a feedback signal and generate a correction signal. The predistorter may adaptively adjust its operation to minimize the existing distortion due to GaN power amplifier nonlinear characteristics. The result is that the GaN power amplifier may send a power signal of improved linearity to the antenna. The coupler is configured to sample the amplified signal from the GaN power amplifier to generate the feedback signal. The antenna is configured to transmit the amplified signal.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: December 27, 2016
    Assignee: Aviat U.S., Inc.
    Inventors: Jayesh Nath, Ying Shen, Frank Matsumoto, Youming Qin, David C. M. Pham
  • Publication number: 20160261240
    Abstract: An exemplary system comprises a linearizer module, a first upconverter module, a power amplifier module, a signal sampler module, and a downconverter module. The linearizer module may be configured to receive a first intermediate frequency signal and to adjust the first intermediate frequency signal based on a reference signal and a signal based on a second intermediate frequency signal. The first upconverter module may be configured to receive and up-convert a signal based on the adjusted first intermediate frequency signal to a radio frequency signal. The power amplifier module may be configured to receive and amplify a power of a signal based on the radio frequency signal. The signal sampler module may be configured to sample a signal based on the amplified radio frequency signal. The downconverter module may be configured to receive and down-convert a signal based on the sampled radio frequency signal to the second intermediate frequency signal.
    Type: Application
    Filed: May 17, 2016
    Publication date: September 8, 2016
    Applicant: Aviat U.S., Inc.
    Inventors: Frank Matsumoto, Youming Qin, David C.M. Pham, Jayesh Nath, Ying Shen
  • Patent number: 9429794
    Abstract: A pixel unit includes an active area pixel electrode and a passive area pixel electrode disposed in the same layer; a thin film transistor switch electrically connected to the active area pixel electrode; and a coupling electrode disposed in a different layer from the active area pixel electrode and electrically connected to the active area pixel electrode, wherein the coupling electrode and the passive area pixel electrode are arranged to be at least partly overlapped with each other to form a coupling capacitance. The present invention also discloses an array substrate comprising the pixel unit and a liquid crystal display comprising the array substrate.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: August 30, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Ying Shen, Zhizhong Tu, Rongge Sun
  • Patent number: 9378178
    Abstract: A method, system and computer program product for improving performance in connection with requesting resources. A request is sent by a browser to a server to retrieve a resource, where the message includes identifiers and tags associated with blocks of data of the resource which are stored in a cache of the client. If the browser receives a response from the server indicating that the resource has not change since last accessed, the browser will determine if one of the tags associated with the data blocks of the resource stored in the cache differs from the associated tags received in the response message. If there is not a match, then the browser has identified the situation where a block of data of the resource has outdated content which can be updated using the content stored in the data block of another resource in the cache with the same identifier.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: June 28, 2016
    Assignee: International Business Machines Corporation
    Inventors: Michael Baessler, Si Bin Fan, Peng Hui Jiang, Ying Shen, Yan Xu, Ling Zhang, Jia Zou
  • Patent number: 9363130
    Abstract: A method for performing digital predistortion to a microwave radio transceiver in response to an increase/decrease of transmit power level is disclosed. If the new transmit power level is higher than the current transmit power level, a set of digital predistortion (DPD) coefficients is applied to the transceiver before the issuance of a transmit power level increase command to the transceiver. Otherwise, a transmit power level decrease command is issued to the transceiver before the application of the set of DPD coefficients to the transceiver. Determining the set of DPD coefficients for the transceiver involves two stages: (i) calibrating the transceiver at a room temperature under predefined conditions and generating a DPD lookup table including DPD coefficients at a plurality of predefined temperatures other than the room temperature and (ii) determining the set of DPD coefficients for a given set of operating conditions using entries in the DPD lookup table.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: June 7, 2016
    Assignee: ZTE (USA) INC.
    Inventors: Thanh Hung Nguyen, Ying Shen, Andrey Kochetkov, Aleksandr Semenyshev, William Schmid
  • Patent number: 9362964
    Abstract: A microwave radio receiver includes a first down-converter, a second down-converter, and a combined receiver signal level (RSL) and interference detector. The first down-converter is configured to convert a RF signal into a first IF signal. The second down-converter is configured to convert the first IF signal into a second IF signal. The combined RSL and interference detector is configured to determine one or more RSLs and generate an interference indicator based on the first IF signal from the first down-converter and a control signal from the second down-converter.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: June 7, 2016
    Assignee: ZTE (USA) INC.
    Inventors: Ying Shen, Thanh Nguyen, Aleksandr Semenyshev, Shawn Walsh, William Schmid
  • Publication number: 20160155505
    Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.
    Type: Application
    Filed: June 3, 2015
    Publication date: June 2, 2016
    Inventors: Meng-Hung Lin, Bo-Lun Wu, Ting-Ying Shen
  • Publication number: 20160149283
    Abstract: An antenna coupling device is disclosed. The device includes a first isolator that includes an input port and an output port and a first circulator that includes a first port, a second port, and a third port. The first port of the first circulator is coupled with the output port of the first isolator; and the second port of the first circulator is configured for coupling with a first antenna. The device also includes a second isolator that includes an input port and an output port. The input port of the second isolator is coupled with the third port of the first circulator.
    Type: Application
    Filed: November 24, 2015
    Publication date: May 26, 2016
    Inventors: Ying SHEN, Edwin John NEALIS, Zhuo LI, Zhiping FENG, Thanh Hung NGUYEN
  • Patent number: 9349451
    Abstract: A resistive memory and a repairing method of the resistive memory are provided. Steps of the repairing method includes: operating a plurality of set-reset cycles on the resistive memory; detecting whether the resistive memory encounters an over-set issue after the set-reset cycles are operated; if the resistive memory encounters the over-set issue, executing an enhanced reset programming on the resistive memory. Here, the enhanced reset programming is executed by applying an enhanced reset voltage on the resistive memory during an enhanced reset time period. A product of the enhanced reset voltage and the enhanced reset time period is larger than a product of a reset voltage and a reset time period.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: May 24, 2016
    Assignee: Winbond Electronics Corp.
    Inventors: Meng-Hung Lin, Bo-Lun Wu, Ting-Ying Shen
  • Patent number: 9348727
    Abstract: A method, computer program product, and system for testing an application on a GUI are provided. A request to perform a test of an application is received. The test uses a script that includes instructions to perform real actions on a GUI of the application. Execution of the script is initiated. A test recording is generated by capturing a first plurality of screenshots of the GUI during the test. In response to detecting an error during execution of the script, a baseline video is retrieved. The baseline video includes a second plurality of screenshots of the GUI from a successful execution of the script. An error message is issued. The error message includes at least a portion of the test recording and at least a portion of the baseline video.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventors: Zhu Hong Cai, Dong Rui Li, Miao Liu, Ying Shen, Kui Song
  • Publication number: 20160118540
    Abstract: A light-emitting diode includes at least an N-type layer, a light-emitting layer and a P-type layer, wherein the light-emitting layer forms a ā€œVā€-shaped indentation or pit during epitaxial process and the V pit is filled in with at least one type of metal nanoparticles to generate surface plasma coupling effect and to improve recombination probability of holes and electrons, thus improving internal quantum efficiency; further, a V pit is generated in the N-type layer during epitaxial process; surface plasma coupling effect is generated by filling metal nanoparticles in the V pit to increase light reflection, light extraction efficiency and external quantum efficiency, thereby improving light emitting efficiency of LED; and the V pit is formed directly by adjusting growth rate, thickness, temperature, pressure or doping during epitaxial process instead of etching, which causes no damage to the LED epitaxial layer, thus simplifying process and improving device stability.
    Type: Application
    Filed: June 10, 2015
    Publication date: April 28, 2016
    Applicant: TIANJIN SANAN OPTOELECTRONICS CO., LTD.
    Inventors: MU-SEN DONG, LI-YING SHEN, DU-XIANG WANG, CHAO-YU WU, LIANG-JUN WANG
  • Publication number: 20160115502
    Abstract: Expression-enhancing nucleotide sequences for eukaryotic expressions systems are provided that allow for enhanced and stable expression of recombinant proteins in eukaryotic cells. Genomic integration sites providing enhanced expression and methods of use thereof are provided for expression of a gene of interest in a eukaryotic cell. Chromosomal loci, sequences, and vectors are provided for enhanced and stable expression of genes in eukaryotic cells.
    Type: Application
    Filed: October 21, 2015
    Publication date: April 28, 2016
    Inventors: Ying Shen, Darya Burakov, Gang Chen, James P. Fandl