Abstract: A disposable childproof lighter includes an ignition means which including a flint supported by a resilient element, a striker wheel, a pair of driven gear elements each coaxially mounted on a side of the striker wheel, and a pair of driving caps each coaxially mounted between the driven gear element and the striker wheel in freely rotating manner. Each driving cap includes a driving cavity formed on an outer side thereof for receiving a gear wheel of the driven gear element in rotatable manner. A plurality of driving teeth are spacedly provided on an inner circumferential surface of the driving cavity for engaging with a plurality of driven gear teeth spacedly provided on an outer circumferential surface of the driven gear element when a downward force is applied to the two driving caps.

Abstract: A childproof barbecue lighter includes a lock button having a locking arm downwardly extended to a stopper in a pusher cavity for blocking up a pusher button from being pushed downwardly so as to lock up the pusher button from ignition. The lock button is movable with respect to the pusher button wherein the lock button is arranged to drive the locking arm to move offset from the stopper in such a manner the pusher button is capable of being pushed downwardly to ignite the barbecue lighter.

Abstract: A method is provided for manufacturing a memory cell with a increased threshold voltage accuracy. The memory cell has a substrate including a plurality of first conducting lines in a first direction and a plurality of second conducting lines in a second direction. The method includes the steps of forming a photoresist layer over the first and the second conducting lines, forming a window on the photoresist layer to expose a portion of the second conducting lines, thinning the portion of the second conducting lines in the windows, and doping impurities into the substrate between two of the first conducting lines to form the memory cell.

Abstract: A high Q inductor and its forming method is disclosed. In this forming method, a semiconductor substrate is first provided with a trench formed thereon. The trench is defined by dry etching and formed to a depth of 3˜5 &mgr;m. A material having a higher resistivity than that of the semiconductor is then provided to fill the trench. The material can be formed by first depositing an epitaxy layer with a lower dopant concentration than that of the semiconductor substrate by several orders of magnitude on the semiconductor substrate, then etching back the epitaxy layer to expose the surface of the semiconductor substrate. Thereafter, a dielectric layer is formed on the semiconductor substrate and the trench, and an inductor winding is formed on the dielectric layer above the trench to form the high Q inductor.

Abstract: A method for forming an inductor in a semiconductor substrate having a trench therein including the steps of forming a first metal portion in the trench, providing a flowable dielectric material in the trench, depositing a layer of dielectric material over the layer of first metal portion and flowable dielectric material, forming a plug in the layer of dielectric material wherein the plug is in electrical contact with the first metal portion, and forming a second metal portion over the layer of dielectric material wherein the second metal portion is in electrical contact with the plug.

Abstract: This invention discloses a memory cell that has a first polysilicon, which functions as a gate. The memory cell further includes a first TEOS oxide layer overlying the first polysilicon and a plurality of via-1 openings exposing the first polysilicon therein. The memory cell further includes a patterned second polysilicon layer overlying the first TEOS oxide layer and filling the via-1 openings thus contacting the gate wherein the patterned second polysilicon containing dopant ions for functioning as a connector for the memory cell. The memory cell further includes a second TEOS oxide layer overlying the connector includes a plurality of via-2 openings for exposing the connector therein. The memory cell further includes a silicide barrier layer disposed in the via-2 openings.

Abstract: A method of manufacturing a semiconductor cell comprises a step of anisotropically dry etching a polysilicon layer to form a polysilicon gate wherein an etching stop is formed on a buried contact region before the anisotropically dry etching step, the etching stop is preferably formed by salicide technology of titanium silicide.

Abstract: A method for making planar silicon-based inductor structure with improved Q is disclosed. This method includes the steps of: (a) providing a lightly-doped P-type substrate as a starting wafer; (b) forming a preliminary oxide layer on the lightly-doped P-type substrate; (c) forming a first oxide layer from the preliminary oxide layer enclosing a predetermined epitaxial area; (d) depositing an epitaxial layer in the epitaxial area using intrinsic doping; (e) forming a second oxide layer which covers both the epitaxial layer and the first oxide layer, and is merged with the first oxide layer to thus form a contiguous inter-connected inductor oxide layer; (f) forming a metal line according to a planar inductor pattern so as to form a silicon-based inductor structure. The epitaxial layer has a resistivity of at least 2 K ohm-cm. The planar silicon-based inductor improves the Q value by reducing or stopping current losses into the substrate.

Abstract: A method for manufacturing a semiconductor memory cell with a floating gate having a predetermined length includes the steps of: growing a thin oxide layer over a substrate; depositing a polysilicon layer over the thin oxide layer; depositing a silicon nitride layer over the polysilicon layer; masking and etching the nitride layer down to the polysilicon layer so as to form an oxide receiving groove in the nitride layer, the groove being parallel to a longitudinal axis of the floating gate to be formed and being longer than the predetermined width of the floating gate to be formed, and the width of the receiving groove in latitudal axis is equal to the predetermined length of the floating gate, the receiving groove overlapping a floating gate region to be defined on the polysilicon layer; growing a polysilicon oxide layer in the receiving groove; removing the nitride layer; providing a mask which is transverse to the polysilicon oxide layer and which has a width equal to the predetermined length of the floati

Abstract: An aerostatic bearing with an adjustable stabilizing structure suitable to be applied to a linear sliding rail of a precision test instrument or a precision tool machine, etc., comprises a bearing body with a round or other shaped planes. The plane is furnished with a pocket, a plurality of radial grooves, and a ring-shaped grooves, being in communication with one another. The outer edge of the bearing body is provides with an air intake extended, through an intake passsage, to an area nearing a pocket. The intake passage is in communication with the pocket through a first orifice. A spacing member with a second orifice is movably mounted in the intake passage so as to form a cavity between the two orifices.