Patents by Inventor Ying Wu

Ying Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12110563
    Abstract: The present disclosure relates to a multiple LAMP primer set, a detection method, and a kit for simultaneously detecting multiple pathogens, belonging to the field of microbial detection. The multiple pathogens are Vibrio harveyi, Vibrio parahaemolyticus, and Singapore grouper iridovirus. The detection primer set is as shown in SEQ ID NO.: 1-18. The present disclosure further provides an application, a kit, and a detection method of multiple LAMP primer sets in simultaneously detecting multiple pathogens. The method of the present disclosure can simultaneously detect whether a sample contains the Vibrio harveyi, the Vibrio parahaemolyticus, or the Singapore grouper iridovirus, has strong specificity, convenient and simple operation, and has no need for an expensive instrument and equipment.
    Type: Grant
    Filed: January 29, 2024
    Date of Patent: October 8, 2024
    Assignee: HAINAN UNIVERSITY
    Inventors: Yun Sun, Zhenjie Cao, Yongcan Zhou, Tao Li, Ying Wu, Hehe Du, Weiliang Guo, Shifeng Wang
  • Publication number: 20240325089
    Abstract: Systems and methods for navigation and identification for endoscopic kidney surgery may include generating a map of an internal space of a patient's collecting system, including segmentation preoperative CT scans, using localization and three-dimensional reconstruction techniques on endoscopic video to create a point cloud, and registering the point cloud to the segmented CT scans. The systems and methods may include tracking a tip of the endoscope during the endoscopic kidney surgery using localization and three-dimensional reconstruction techniques. The systems and methods may include identifying and tracking kidney stones during the endoscopic kidney surgery using computational models.
    Type: Application
    Filed: March 29, 2024
    Publication date: October 3, 2024
    Applicant: Vanderbilt University
    Inventors: Nicholas L. Kavoussi, Ipek Oguz, Zachary Stoebner, Ayberk Acar, Jie Ying Wu, Daiwei Lu
  • Publication number: 20240331976
    Abstract: Systems and methods for synchronization of radio frequency (RF) generators are described. One of the methods includes receiving, by a first RF generator, a first recipe set, which includes information regarding a first plurality of pulse blocks for operating the first RF generator. The method further includes receiving, by a second RF generator, a second recipe set, which includes information regarding a second plurality of pulse blocks for operating a second RF generator. Upon receiving a digital pulsed signal, the method includes executing the first recipe set and executing the second recipe set. The method further includes outputting a first one of the pulse blocks of the first plurality based on the first recipe set in synchronization with a synchronization signal. The method includes outputting a first one of the pulse blocks of the second plurality based on the second recipe set in synchronization with the synchronization signal.
    Type: Application
    Filed: June 11, 2024
    Publication date: October 3, 2024
    Inventors: Ying Wu, John Stephen Drewery, Alexander Miller Paterson, Xiang Zhou, Zhuoxian Wang, Yoshie Kimura
  • Publication number: 20240329541
    Abstract: The present invention provides a cyclic exposure scanning system having distributed multi-lens and method thereof. The system includes a processor, a platform, an optical engine, a first optical imaging device, a second optical device and a light guide structure. By executing the method of the present disclosure by the system, the optical engine projects the first optical image and the second optical image respectively. The first optical image is guided to the first optical imaging device and the second optical image is sequentially guided to the second optical imaging device through the light guide structure. The first optical imaging device and the second optical imaging device receives and projects the first and second optical images onto the corresponding exposure areas, respectively. Such that efficiency and light source utilization may be significantly increased.
    Type: Application
    Filed: March 28, 2024
    Publication date: October 3, 2024
    Inventors: YUNG-CHUN LEE, TING-HSUAN MIAU, CHUN-YING WU
  • Patent number: 12094386
    Abstract: A digital low color shift (DLCS) edge smoothing method, for a display panel having a plurality of pixels, includes determining an edge gain of a first pixel of the plurality of pixels of the display panel; and smoothing the edge of the first pixel and the other neighbor pixels of the plurality of pixels of the display panel according to a spatial filter.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: September 17, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventor: Tung-Ying Wu
  • Publication number: 20240304705
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Application
    Filed: May 16, 2024
    Publication date: September 12, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Publication number: 20240296771
    Abstract: A digital low color shift (DLCS) edge smoothing method, for a display panel having a plurality of pixels, includes determining an edge gain of a first pixel of the plurality of pixels of the display panel; and smoothing the edge of the first pixel and the other neighbor pixels of the plurality of pixels of the display panel according to a spatial filter.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 5, 2024
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventor: Tung-Ying Wu
  • Publication number: 20240290588
    Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.
    Type: Application
    Filed: May 3, 2024
    Publication date: August 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Otto CHEN, Chi-Ying WU, Chia-Chih CHEN
  • Patent number: 12072534
    Abstract: A coupling system includes an optical fiber configured to carry an optical signal. The coupling system further includes a chip in optical communication with the optical fiber. An angle between the optical fiber and a top surface of the chip ranges from about 92-degrees to about 88-degrees. The chip includes a grating configured to receive the optical signal; and a waveguide, wherein the grating is configured to receive the optical signal and redirect the optical signal along the waveguide. ms.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: August 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chen-Hao Huang, Chien-Chang Lee, Chia-Ping Lai
  • Patent number: 12068131
    Abstract: Systems and methods for multi-level pulsing of a parameter and multi-level pulsing of a frequency of a radio frequency (RF) signal are described. The parameter is pulsed from a low level to a high level while the frequency is pulsed from a low level to a high level. The parameter and the frequency are simultaneously pulsed to increase a rate of processing a wafer, to increase mask selectivity, and to reduce angular spread of ions within a plasma chamber.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: August 20, 2024
    Assignee: Lam Research Corporation
    Inventors: Juline Shoeb, Alex Paterson, Ying Wu
  • Patent number: 12068155
    Abstract: Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: August 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chen-Ying Wu, Zhiyuan Ye, Xuebin Li, Sathya Chary, Yi-Chiau Huang, Saurabh Chopra
  • Publication number: 20240274463
    Abstract: The present disclosure relates to overlapping substrate supports and pre-heat rings, and related process kits, processing chambers, methods, and components to facilitate process adjustability. In one or more embodiments, a substrate support applicable for use in semiconductor manufacturing includes a first side face and a second side face opposing the first side face. The first side face includes a support surface. The second side face includes a backside surface, and a first shoulder protruding relative to the backside surface. The first shoulder is disposed outwardly of the backside surface. The substrate support includes an arcuate outer face extending between the first side face and the second side face.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 15, 2024
    Inventors: Zhepeng CONG, Nimrod SMITH, Tao SHENG, Chen-Ying WU, Hui CHEN, Xinning LUAN
  • Publication number: 20240264244
    Abstract: An electric leakage detection method is used for detecting an electric leakage region of a component to be tested, which includes a first surface and a second surface, the first surface being provided over at least part of the second surface, and the electric leakage detection method includes: arranging a first conductive element on a side of the first surface away from the second surface, and applying a voltage between the first conductive element and the second surface; and moving the first conductive element relative to the first surface, and determining, under a condition that a resistance between the first conductive element and the second surface is less than a preset resistance, a projection region of the first conductive element on the first surface as the electric leakage region.
    Type: Application
    Filed: April 18, 2024
    Publication date: August 8, 2024
    Inventors: Jinbiao YE, Fenggui ZENG, Ying WU
  • Publication number: 20240266327
    Abstract: An electronic device includes a light-emitting module including a substrate, a plurality of light-emitting units, and a light-adjusting layer. The substrate has a first region and a second region, the second region being closer to the edge of the substrate than the first region. The light-emitting units are disposed on the substrate, wherein the light-emitting units include a first light-emitting unit disposed in the first region and a second light-emitting unit disposed in the second region. The light-adjusting layer includes a first light-adjusting element disposed on the first light-emitting unit and a second light-adjusting element disposed on the second light-emitting unit. The first light-adjusting element and the second light-adjusting element have different dimensions.
    Type: Application
    Filed: January 4, 2024
    Publication date: August 8, 2024
    Inventors: Yu-Siou LIN, Ting-Ying WU, Yang-Ruei LI
  • Publication number: 20240259022
    Abstract: A logic gate circuit includes a pull-up network, a pull-down network, a signal output end, at least one signal input end, a first voltage end, and a second voltage end. The pull-up network includes a first gate and a second gate. A first electrode of the first NFET and the first gate are connected to the first voltage end. A second electrode of the first NFET and the second gate are connected to the signal output end. The pull-down network includes a second NFET. The pull-down network is connected to the signal output end, the at least one signal input end, and the second voltage end. The pull-down network is configured to: control the second NFET based on a voltage of the at least one signal input end, and pull down a voltage of the signal output end by using a voltage of the second voltage end.
    Type: Application
    Filed: April 8, 2024
    Publication date: August 1, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Ying Wu, Weiliang Jing, Zhaozhao Hou, Renshi Fan, JEFFREY JUNHAO XU
  • Patent number: 12050628
    Abstract: Anomalies may be detected using a multiple machine learning model anomaly detection framework. A clustering model is trained using an unsupervised machine learning algorithm on a historical anomaly dataset. A plurality of clusters of records are determined by applying the historical anomaly dataset to the clustering model. Then it is determined whether each cluster of the plurality of clusters is an anomaly-type cluster or a normal-type cluster. The plurality of labels for the plurality of records are updated based on the particular record's cluster classification. Non-pure clusters are determined from among the plurality of clusters based on a purity threshold. A supervised machine learning model is trained for each of the non-pure clusters using the records in the given cluster and the labels for each of those records. Then, predictions of an anomaly are made using the clustering model and the supervised machine learning models.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: July 30, 2024
    Assignee: BUSINESS OBJECTS SOFTWARE LTD
    Inventors: Paul O'Hara, Ying Wu, Malte Christian Kaufmann
  • Patent number: 12050348
    Abstract: A method of making a chip includes depositing a first polysilicon layer on a top surface and a bottom surface of a substrate. The method further includes patterning the first polysilicon layer to define a recess, wherein the first polysilicon layer is completed removed from the recess. The method further includes implanting dopants into the substrate to define an implant region. The method further includes depositing a contact etch stop layer (CESL) in the recess, wherein the CESL covers the implant region. The method further includes patterning the CESL to define a CESL block. The method further includes forming a waveguide and a grating in the substrate. The method further includes forming an interconnect structure over the waveguide, the grating and the CESL block. The method further includes etching the interconnect structure to define a cavity aligned with the grating.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chien-Chang Lee, Chia-Ping Lai
  • Patent number: 12051866
    Abstract: An electrical connector assembly includes an electrical plug connector and an electrical receptacle connector corresponding to the electrical plug connector. The electrical plug connector includes a plug insulated housing as well as plug terminals and buckling portions on the plug insulated housing. The electrical receptacle connector includes a receptacle insulated housing as well as receptacle terminals and locking components on the receptacle insulated housing. The locking components at the two sides of the electrical receptacle connector are firmly buckled with the buckling portions at the two sides of the electrical plug connector. Therefore, during the use of the electrical connector assembly, the electrical plug connector can be prevented from detaching off the electrical receptacle connector.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: July 30, 2024
    Assignee: ADVANCED-CONNECTEK INC.
    Inventors: Ta-Teh Meng, Mei Shi, Ya-Ping Liang, Xu-Kun Li, Meng Liu, Bo-Wen Xu, Jia-Ying Wu, Man Ge
  • Patent number: 12046450
    Abstract: Systems and methods for synchronization of radio frequency (RF) generators are described. One of the methods includes receiving, by a first RF generator, a first recipe set, which includes information regarding a first plurality of pulse blocks for operating the first RF generator. The method further includes receiving, by a second RF generator, a second recipe set, which includes information regarding a second plurality of pulse blocks for operating a second RF generator. Upon receiving a digital pulsed signal, the method includes executing the first recipe set and executing the second recipe set. The method further includes outputting a first one of the pulse blocks of the first plurality based on the first recipe set in synchronization with a synchronization signal. The method includes outputting a first one of the pulse blocks of the second plurality based on the second recipe set in synchronization with the synchronization signal.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: July 23, 2024
    Assignee: Lam Research Corporation
    Inventors: Ying Wu, John Stephen Drewery, Alexander Miller Paterson, Xiang Zhou, Zhuoxian Wang, Yoshie Kimura
  • Publication number: 20240244007
    Abstract: A reordering method performed by a receiving apparatus is provided. The receiving apparatus may receive a first PPDU from a transmitting apparatus, wherein the first PPDU includes a plurality of MPDUs, and the MPDUs correspond to the same BA window. The receiving apparatus may determine a traffic that each of the MPDUs belongs to according to an MPDU identification, wherein traffics that the plurality of MPDUs belonging to include a first traffic and a second traffic which is different from the first traffic. The receiving apparatus may perform a reordering operation for the MPDUs belonging to the first traffic, and a reordering operation for the MPDUs belonging to the second traffic, respectively. The receiving apparatus may transmit a BA frame in response to the first PPDU to the transmitting apparatus, wherein the BA frame includes information for indicating whether the MPDUs in the first PPDU have been successfully received.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 18, 2024
    Inventors: Chi-Han HUANG, Yen-Hsiung TSENG, Cheng-Ying WU, Wei-Wen LIN