Patents by Inventor Ying Yu

Ying Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070258290
    Abstract: A flash based device in configured for soft programming to correct for over-erase effect; however, the soft programming current is limited so as not to exceed the current that can be supplied during soft programming. Additionally, the voltage on the source node of each cell on the flash based device is maintained at a non-zero level, in order to allow for the use of a higher word line voltage, but help prevent an over soft programming effect.
    Type: Application
    Filed: July 13, 2007
    Publication date: November 8, 2007
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chun-Hsiung Hung, Chuan-Ying Yu
  • Patent number: 7257029
    Abstract: A flash based device in configured for soft programming to correct for over-erase effect; however, the soft programming current is limited so as not to exceed the current that can be supplied during soft programming. Additionally, the voltage on the source node of each cell on the flash based device is maintained at a non-zero level, in order to allow for the use fo a higher word line voltage, but help prevent an over soft programming effect.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: August 14, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Chun-Hsiung Hung, Chuan-Ying Yu
  • Publication number: 20070116869
    Abstract: This invention discloses a coating method to apply a layer of nano-particles adsorbed on submicron ceramic oxide particles, which can prevent the agglomeration of nano-particles by the effects of Brownian motion and van der Waals force. Using this method, nano-sized titania can be uniformly coated on the surface of silica. This method is conducted in an aqueous solution and able to fabricate a coating layer in a controlled thickness between 5 to tens nm. After calcination, the coated particles can be assembled to form a photonic bandgap crystal. This invention also discloses a coating method to apply a uniform nano TiO2-coating layer on the SiO2 photonic bandgap crystals.
    Type: Application
    Filed: January 25, 2006
    Publication date: May 24, 2007
    Inventors: Wen-Cheng Wei, Chuin-Shan Chen, Bang-Ying Yu, Jenn-Feng Li
  • Publication number: 20070069800
    Abstract: A negative charge-pump circuit for flash memory includes a well, a pass-gate transistor, a well bias circuit and a negative voltage recovery circuit. The pass-gate transistor has a source, a drain and a gate. The well bias circuit controls the well to remain one of zero biased and reverse biased. The negative voltage recovery circuit is coupled to a negative recovery voltage and coupled to the pass-gate transistor to selectively provide the negative recovery voltage to the pass-gate transistor when the charge-pump circuit is disabled.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 29, 2007
    Inventors: Yi-Chun Shih, Chun Hung, Kuen-Long Chang, Chuan-Ying Yu
  • Publication number: 20070057646
    Abstract: An automatic anti-trap device is provided to add safety to other apparatuses. The automatic anti-trap device of this invention has a driving circuit to control a motor, a current sensor to generate a current signal, a current ripple peak value circuit to generate a current ripple peak value signal according to the current signal, and a micro processor to generate a working signal for the driving circuit to control the motor according to a keystroke signal, the current signal and the current ripple peak value signal.
    Type: Application
    Filed: December 12, 2005
    Publication date: March 15, 2007
    Inventors: Yu-Chia Hsu, Te-Yang Shen, Ming Yeh, Yuan-Ying Yu
  • Publication number: 20070057644
    Abstract: An automatic anti-trap device is provided to add safety to other apparatuses. The automatic anti-trap device of this invention has a driving circuit to control a motor, a current sensor to generate a current signal, a current ripple peak value circuit to generate a current ripple peak value signal according to the current signal, and a micro processor to generate a working signal for the driving circuit to control the motor according to a keystroke signal, the current signal and the current ripple peak value signal.
    Type: Application
    Filed: June 7, 2006
    Publication date: March 15, 2007
    Inventors: Yu-Chia Hsu, Te-Yang Shen, Ming Yeh, Yuan-Ying Yu
  • Publication number: 20070054514
    Abstract: An apparatus and method to determine the amount of misalignment between a chip carrier and socket by the use of an inspection master. The inspection master is tailored to the perimeter size of the chip carrier and contains alignment marks on the same array as the electrical contact pads of the chip carrier. The inspection master allows bad sockets to be screened out prior to use on a chip carrier and also provides a quantified characterization of the socket array positional error which can be used to adjust the socket fabrication process.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 8, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Long, Paul Bodenweber, Jason Miller, Yuet-Ying Yu
  • Patent number: 7180782
    Abstract: Non-volatile memory circuits according to the present invention provide a reference memory having multiple reference cells that are shared among a group of sense amplifiers through an interconnect conductor line. The higher number of reference cells for each reference memory generates a greater amount of electrical current for charging multiple source lines. The multiple source lines are coupled to the interconnect conductor bar for capacitance matching with a source line coupled to a memory cell in a main memory array. After a silicon wafer out, measurements to the capacitance produced by the source line in the main memory array and the capacitance produced by the source line in the reference array are taken for an optional trimming. A further calibration in capacitance matching is achieved by trimming one of the source lines that is coupled to the interconnect conductor bar and the reference memory, either by cutting a portion of the source line or adding a portion to the source line.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: February 20, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Chuan-Ying Yu, Nai-Ping Kuo, Ken-Hui Chen, Han-Sung Chen, Chun-Hsiung Hung
  • Publication number: 20070019470
    Abstract: A flash based device in configured for soft programming to correct for over-erase effect; however, the soft programming current is limited so as not to exceed the current that can be supplied during soft programming. Additionally, the voltage on the source node of each cell on the flash based device is maintained at a non-zero level, in order to allow for the use fo a higher word line voltage, but help prevent an over soft programming effect.
    Type: Application
    Filed: July 25, 2005
    Publication date: January 25, 2007
    Applicant: Macronix International Co., Ltd.
    Inventors: Chun-Hsiung Hung, Chuan-Ying Yu
  • Patent number: 7166147
    Abstract: A process and a device for separating and exhausting gas bubbles from a flowing liquid, especially in a microfluidic system, are proposed. Radial deflection of the liquid, a preferably annular deaeration chamber from which gas can escape through gas separation material, and a following discharge filter are characteristic. The discharge filter is made of a hydrophilic material which forms pores or small channels. Optionally, there is an inlet filter of the corresponding material upstream of the deaeration chamber.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: January 23, 2007
    Assignee: Boehringer Ingelheim microParts GmbH
    Inventors: Christian Vesper, Ying Yu, Ralf-Peter Peters, Wolfgang Stoeters
  • Publication number: 20070014157
    Abstract: A memory cell array, such as an EEPROM flash memory array, includes a current limiting circuit that limits a sum of leakage currents from nonselected memory cells during operation of the array, such as during a programming operation.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 18, 2007
    Inventors: Chun-Hsiung Hung, Chuan-Ying Yu, Han-Sung Chen, Nai-Ping Kuo, Ching-Chung Lin, Kuen-Long Chang
  • Publication number: 20060279996
    Abstract: Non-volatile memory circuits according to the present invention provide a reference memory having multiple reference cells that is shared among a group of sense amplifiers through an interconnect conductor line. The higher number of reference cells for each reference memory generates a greater amount of electrical current for charging multiple source lines. The multiple source lines are coupled to the interconnect conductor bar for capacitance matching with a source line coupled to a memory cell in a main memory array. After a silicon wafer out, measurements to the capacitance produced by the source line in the main memory array and the capacitance produced by the source line in the reference array are taken for an optional trimming. A further calibration in capacitance matching is achieved by trimming one of the source lines that is coupled to the interconnect conductor bar and the reference memory, either by cutting a portion of the source line or adding a portion to the source line.
    Type: Application
    Filed: June 10, 2005
    Publication date: December 14, 2006
    Applicant: Macronix International Co., Ltd.
    Inventors: Chuan-Ying Yu, Nai-Ping Kuo, Ken-Hui Chen, Han-Sung Chen, Chun-Hsiung Hung
  • Publication number: 20060267059
    Abstract: A wordline driver cell, coupled to at least one wordline, includes at least one diffusion region and at least one wordline driver semiconductor switching device formed in the at least one diffusion region. The at least one wordline driver semiconductor switching device has a channel width that is arranged perpendicular to a longitudinal axis of the at least one wordline.
    Type: Application
    Filed: May 25, 2005
    Publication date: November 30, 2006
    Inventors: Chuan-Ying Yu, Chun-Hsiung Hung, Su-Chueh Lo, Nai-Ping Kuo, Ken-Hui Chen
  • Patent number: 7118385
    Abstract: A self-aligning socket for an integrated circuit package includes an outer frame and an array of contacts configured for alignment with corresponding conductive pads on the bottom of the integrated circuit package. The outer frame further includes a first plurality of alignment ball bearings configured thereon, the ball bearings mounted on cantilevered spring rods.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Paul Bodenweber, David C. Long, Jason S. Miller, Robert P. Westerfield, Jr., Yuet-Ying Yu
  • Publication number: 20060213755
    Abstract: A radio frequency (RF) wireless steering wheel is disclosed, which is suitable for an automobile. The radio frequency wireless steering wheel comprises: a steering wheel body having an operation panel; a plurality of keys set in the operation panel; a radio frequency signal transmitting installed in the steering wheel body, wherein the radio frequency signal transmitting module can be triggered by the keys module; and a radio frequency signal receiving module installed within the automobile and used to receive the signal transmitted from the radio frequency signal transmitting module, wherein the radio frequency signal receiving module is electrically connected to electronic devices of the automobile. Therefore, the electronic devices of the automobile can be controlled respectively through the keys, the radio frequency signal transmitting module and the radio frequency signal receiving module.
    Type: Application
    Filed: February 3, 2006
    Publication date: September 28, 2006
    Inventors: Chia-Jung Chang, Chien-Li Lo, Yuan-Ying Yu, Ming Yeh
  • Publication number: 20060104113
    Abstract: A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The memory device also includes a plurality of reference lines and reference cells. Each reference cell corresponds to one of the operating modes, supplies a reference current for the corresponding mode, and is coupled to at least one of the reference lines. A reference cell current from a reference cell can also be compared to a target range and, if outside the target range, the voltage level on a corresponding referece line can be adjusted accordingly such that the reference current falls within the target range (i.e., reference current trimming).
    Type: Application
    Filed: November 10, 2005
    Publication date: May 18, 2006
    Inventors: Wen-Yi Hsieh, Ken-Hui Chen, Chun-Hsiung Hung, Han-Sung Chen, Nai-Ping Kuo, Ching-Chung Lin, Chuan-Ying Yu
  • Publication number: 20060057721
    Abstract: The invention provides methods and compositions for identifying agents which modulate cell death, indicated e.g. by the expression of caspase-2 and/or caspase-7, in GDNF family growth factor deprived neuronal or nonneuronal cells. The methods for identifying such agents find particular application in drug development.
    Type: Application
    Filed: January 29, 2004
    Publication date: March 16, 2006
    Inventors: Urmas Arumae, Li-Ying Yu, Mart Saarma
  • Patent number: 6994848
    Abstract: The present invention provides an isolated microorganism strain, Lactobacillus paracasei GM-080, which is found to be effective in treating allergy. The use of the Lactobacillus paracasei GM-080 in treating allergy related disease is also provided.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: February 7, 2006
    Assignee: GenMont Biotech Inc.
    Inventors: Ching-Hsiang Hsu, Wei-Chih Su, Ying-Yu Wang, Tzu-Chi Chang, Cheng-Wei Lai
  • Patent number: 6984997
    Abstract: A system and method for utilizing a multi-probe tester to test an electrical device having a plurality of contact pads. Multi-probe tester test probes and electrical device contact pads are arrayed in a common distribution pitch, wherein at least one test probe is masked, thereby preventing the at least one test probe from returning a test result to the testing apparatus. In one embodiment mask membrane physically prevents at least one test probe from making contact with the electrical device. In another embodiment at least one software command is provided configured to cause an input from at least one test probe to be disregarded during a test routine. Another embodiment features both mask membrane and software command probe masking.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: January 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Yuet-Ying Yu, Paul F. Bodenweber, Charles J. Hendricks, Frank C. Seelmann
  • Patent number: D539891
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: April 3, 2007
    Assignee: Haier America
    Inventors: Lintao Lu, Bernie Tumkiw, Kurtis Narus, Dawei Ding, Peng Zhang, Yunpeng Dong, Ying Yu