Abstract: A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The memory device also includes a plurality of reference lines and reference cells. Each reference cell corresponds to one of the operating modes, supplies a reference current for the corresponding mode, and is coupled to at least one of the reference lines. A reference cell current from a reference cell can also be compared to a target range and, if outside the target range, the voltage level on a corresponding reference line can be adjusted accordingly such that the reference current falls within the target range (i.e., reference current trimming).

Abstract: An extract prepared from the root barks of Morus australis Poir.

Abstract: An antenna device includes a housing having a lower portion for coupling to a non-magnetic option coupler of a vehicle, an insulating member engaged in an upper chamber of the housing, a conductor member engaged into a central bore of the insulating member for engaging with the non-magnetic option coupler, a conductive coupling element having a lower portion engaged into the housing, and a coaxial radiating assembly includes a coaxial radiating device having a central radiating member for connecting to the conductor member, and a peripheral radiating member for connecting to the conductive coupling element, and an insulating element mounted between the central radiating member and the cylindrical radiating member.

Abstract: An apparatus is disclosed for aligning socket housing segments for an area array device. Each socket housing segment includes at least a first surface and a second surface, with the second surface opposite the first surface. The second surface of each socket housing segment provides electrical connections for a portion of the area array device. Socket contact pads are disposed on the first surfaces of the plurality of socket housing segments. The socket contact pads correspond to substrate contact pads disposed on a substrate. One or more alignment structures are disposed at a space between the socket housing segments. Each alignment structure is coupled to at least two of the socket housing segments. The one or more alignment structures maintain a predetermined alignment of each socket housing segment so that the socket contact pads align with the substrate contact pads during a surface mount connection process.

Abstract: The present invention discloses a soluble polythiophene derivative containing highly coplanar repeating units. The coplanar characteristic of the TPT (thiophene-phenylene -thiophene) units improves the degree of intramolecular conjugation and intermolecular ?-? interaction. The polythiophene derivative exhibits good carrier mobility and is suitable for use in optoelectronic devices such as organic thin film transistors (OTFTs), organic light-emitting diodes (OLEDs), and organic solar cells (OSCs).

Abstract: The application of aqueous solution of magnesium bicarbonate and/or calcium bicarbonate in the process of extraction separation and purification of metals is disclosed, wherein the aqueous solution of magnesium bicarbonate and/or calcium bicarbonate is used as an acidity balancing agent, in order to adjust the balancing pH value of the extraction separation process which uses an acidic organic extractant, improve the extraction capacity of organic phase, and increase the concentration of metal ions in the loaded organic phase.

Abstract: A method of erasing memory cells of a memory device includes programming memory cells if the erasing procedure is suspended. The erasing procedure can include pre-programming, erasing, and soft-programming of memory cells in a selected memory unit. If a suspend command is received, for example to allow for a read operation of memory cells of another unit of memory, the erasing procedure stops the pre-programming, erasing, or soft-programming, and proceeds with programming one or more memory cells of the memory unit that was being erased.

Abstract: A power supply apparatus and a method for supplying power are provided. The apparatus, for use in a system having a first power signal, includes an assistance unit and a power supply device. The assistance unit outputs at least one maintaining signal according to the first power signal selectively. The power supply device outputs a second power signal, wherein the power supply device maintains the second power signal according to the at least one maintaining signal, for example, in an inactive state, such as an idle or standby state or other suitable timing.

Abstract: A method, computer program product and apparatus for indicating program modifications affecting program performance in an Integrated Development Environment (IDE). The modifications that a developer makes to a program is detected and the code location where these modifications occur is determined. The previous profiling data of the program is acquired. The effect of the modifications on the program performance according to the previous profiling data and the code location where the modifications occur is evaluated. The evaluation results may then be provided to the developer. As a result of the above process, the developer can be aware of the performance problem while he/she is editing the source code so as to make corrections without waiting after the profiling phase, thus greatly shortening the development period.

Abstract: The invention discloses soluble polythiophene derivatives containing highly coplanar repeating units. The coplanar characteristic of side chain conjugated thiophene units improves the degree of the intramolecular conjugation and intermolecular ?-? interaction. The polythiophene derivative exhibits good carrier mobility and is suitable for use in photo-electronic device such as organic thin film transistors (OTFT), organic light-emitting diodes (OLEDs), and organic solar cells (OSCs).

Abstract: The present invention relates to methods for identifying candidate therapeutics for hypertension. The invention further provides a method for treating hypertension and/or decreasing atherogenesis by administration of an inhibitor of PGF2? receptor.

Abstract: The invention provides an efficient method for preparing 3-endo-(8-azabicyclo[3.2.1]oct-3-yl)benzamide by hydrogenation, under controlled conditions, of an amino-protected 3-(8-azabicyclo[3.2.1]oct-2-en-3-yl)benzamide intermediate in which the amino-protecting group is removable by catalytic hydrogenation.

Abstract: The invention provides a prestress structural material formed by reorganization with polygonal bamboo units and the manufacturing method for it, the manufacturing method includes manufacturing substrate of prestress structural material formed by reorganization with polygonal bamboo units, and the adding of reinforcement material.

Abstract: The present invention relates to compositions related to a polynucleotide encoding a transient receptor potential channel gene. Also disclosed is the use of this polynucleotide, its homologs, fragments, variants and its resultant polypeptides in the diagnosis, prevention and treatment of disease, particularly idiopathic pulmonary arterial hypertension (IPAH). This invention also teaches the use of these polynucleotides and polypeptides as assays for drug discovery and therapies.

Abstract: A method of generating a pumping voltage in an integrated circuit includes receiving an external clock signal from outside of the integrated circuit. The frequency of the received external clock signal is changed according to one or more modulation ratios, resulting in one or more respective modulated external clock signal. The external clock signal or one of the modulated external clock signals is then selected for use as a pump clock signal. The pump clock signal is used for driving the pump capacitance of a pump circuit for generating the pumping voltage.

Abstract: An integrated circuit includes a first connection line; a second connection line; a plurality of tuning resistors with each having a sequence number and being coupled between the first connection line and the second connection line; and a plurality of switches, with each being coupled in series with one of the plurality of tuning resistors. The sequence numbers of the plurality of tuning resistors are continuous. The resistance values of the plurality of tuning resistors are a function of the respective sequence numbers.

Abstract: An integrated circuit includes a pad coupled with a driver. The driver is capable of driving data to the pad. The driver is capable of providing a first set of resistance data substantially fitting to a first curve and a second set of resistance data substantially fitting to a second curve. A portion of at least one of the first set of resistance data and the second set of resistance data is an impedance of the driver to drive data.

Abstract: The invention provides an efficient method for preparing 3-endo-(8-azabicyclo[3.2.1]oct-3-yl)benzamide by hydrogenation, under controlled conditions, of an amino-protected 3-(8-azabicyclo[3.2.1]oct-2-en-3-yl)benzamide intermediate in which the amino-protecting group is removable by catalytic hydrogenation.

Abstract: A method and system for decompressing a compressed file is disclosed in this invention, the method comprising: reading a compressed data block from the compressed file; decompressing the compressed data block; outputting the decompressed data for storage into a decompressed file; deleting the compressed data block that was decompressed from the compressed file. The proposed method and system in this invention can reduce the unnecessary repeated data between compressed data and decompressed data. The storage space requirement will be reduced during decompression, and the existing compression/decompression algorithms need not be changed by using this invention. Thus, this invention is easy to be integrated into existing compression/decompression tools.

Abstract: One embodiment of the technology is an apparatus, a memory integrated circuit. The memory integrated circuit has word line address decoding circuitry. The circuit allows selection of a single word line to have an erase voltage. A decoder circuit includes an inverter and logic. The inverter has an input, and an output controlling a word line to perform the erase operation. A voltage range of the input extends between a first voltage reference and a second voltage reference. Examples of voltages references are a voltage supply and a ground. In some embodiments, this wide voltage range results from the input being free of a threshold voltage drop from preceding circuitry limiting the voltage range of the input. The logic of the decoder is circuit is controlled by a word line address to determine a value of the input of the inverter during the erase operation.