Patents by Inventor Ying Yu

Ying Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104030
    Abstract: A data bus coupled to a plurality of memory devices is determined to be in a read mode. Responsive to determining that the data bus is in the read mode, a particular read operation identified in a particular memory queue of memory queues that include identifiers of one or more write operations and identifiers of one or more read operations is determined. The particular memory queue includes a highest number of read operations for a memory device of the memory devices. The particular read operation is transmitted from the particular memory queue over the data bus.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Samir Mittal
  • Publication number: 20240091810
    Abstract: The present disclosure provides a three-dimensionally arranged nanoparticle film and a preparation method and use thereof, and belongs to the technical field of nanophotonics. The preparation method includes the following steps: coating nanoparticles with hydrophobic molecules, and dispersing in an organic solvent to obtain a modified nanoparticle dispersion; conducting a surface treatment on a three-dimensional template to obtain a hydrophilic three-dimensional template; and adding water to a surface of the hydrophilic three-dimensional template to form a water film, adding the modified nanoparticle dispersion dropwise on a surface of the water film to conduct self-assembly, and removing the water film to obtain a three-dimensionally arranged nanoparticle film with an array structure.
    Type: Application
    Filed: March 3, 2022
    Publication date: March 21, 2024
    Applicant: TAIYUAN UNIVERSITY OF TECHNOLOGY
    Inventors: Shaoding LIU, Wei GENG, Peng YUE, Lanqi LIAN, Ying YU
  • Patent number: 11918648
    Abstract: The present disclosure describes combination therapies comprising an antagonist of Programmed Death 1 receptor (PD-1) and a Toll-like receptor 9 (TLR9) agonist that is a CpG-C type oligonucleotide, and the use of the combination therapies for the treatment of cancer.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: March 5, 2024
    Assignees: MERCK SHARP & DOHME LLC, TRISALUS LIFE SCIENCES, INC.
    Inventors: Ying Yu, Andrew Evan Denker, Svetlana Sadekova, Uyen Truong Phan, Robert A. Kastelein, David Ross Kaufman, Robert L. Coffman, Cristiana Guiducci, Robert S. Janssen
  • Patent number: 11907563
    Abstract: Methods, systems, and devices for one or more clock domain crossing queues are described. A queue can receive, from a first clock domain, a first command to store data in the queue. The queue can store the data at a first location indicated by a first pointer. The queue can receive, from the first clock domain, a second command to cause the second clock domain to retrieve the data from the queue. The queue can generate, based on receiving the second command, a third command synchronized with a clock of the second clock domain and to cause the second clock domain to retrieve the data. The queue can retrieve the data from the first location in the queue indicated by a second pointer associated with retrieving data based at least in part on generating the third command. The queue can transmit, to the second clock domain, the data.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: February 20, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Yueh-Hung Chen, Chih-Kuo Kao, Ying Yu Tai, Jiangli Zhu
  • Patent number: 11886383
    Abstract: Techniques for managing a file system involve: receiving an event published by the file system, the event being associated with an operation on an object in the file system; determining a value of a counter corresponding to the event based on execution information of the operation; determining a target action corresponding to the value of the counter based on a trigger strategy associated with the counter, the trigger strategy defining at least one action that can be triggered by the counter; and generating an indication for causing the file system to execute the target action. Accordingly, file system management in finer granularity can be provided.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: January 30, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Ying Yu, Jing Li, Jia Huang
  • Patent number: 11889641
    Abstract: A display device includes a screen, a screen stand and a fixing module. The screen stand is pivotally connected to the screen. The fixing module is connected to the screen stand and configured to clamp a first surface and a second surface of a board and includes a connecting element, a first abutting element and a second abutting element. The first abutting element is fixed to the connecting element and configured to abut against the first surface of the board. The second abutting element is pivotally connected to the connecting element and includes an abutting end configured to abut against the second surface of the board.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: January 30, 2024
    Assignee: Qisda Corporation
    Inventors: Jen-Feng Chen, Ying-Yu Tsai, Kuan-Hsu Lin, Hsin-Hung Lin, Shih-An Lin, Yung-Chun Su, Hsin-Che Hsieh, Hao-Chun Tung, Yang-Zong Fan, Chih-Ming Chang
  • Patent number: 11874779
    Abstract: A data bus is determined to be in a write mode. Whether a number of memory queues that identify at least one write operation satisfies a threshold criterion is determined. The memory queues include identifiers of one or more write operations and identifiers of one or more read operations. Responsive to determining that the number of memory queues satisfies the threshold criterion, a write operation from the memory queues is transmitted over the data bus.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: January 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Samir Mittal
  • Patent number: 11874769
    Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ning Chen, Jiangli Zhu, Ying Yu Tai
  • Publication number: 20240015988
    Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Xinyu BAO, Hengyuan Lee, Ying-Yu Chen
  • Publication number: 20240014205
    Abstract: An input/output port circuit includes an input/output pad, a transistor, and a conductive routing wire. The transistor has a first connection terminal and a second connection terminal. The first connection terminal of the transistor is electrically connected to the input/output pad through a conductive connection wire, and the second connection terminal is electrically connected to another transistor. The conductive routing wire is electrically connected to the first terminal of the transistor. The conductive routing wire is configured to provide a serial resistance, thereby forcing a surge current to flow toward the another transistor when the surge current is inputted in the input/output circuit through the input/output pad.
    Type: Application
    Filed: September 9, 2022
    Publication date: January 11, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Sz-Ying YU, Chen-Hsuan KU, Shang-Hung LIN, Kun-Yu TAI
  • Patent number: 11869618
    Abstract: A sequencer component residing in a first package receives data from a controller residing in a second package that is different than the first package including the sequencer component. The sequencer component performs an error correction operation on the data received from the controller. The error correction operation encodes the data with additional data to generate a code word. The sequencer component stores the code word at a memory device.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu, Jiangli Zhu
  • Publication number: 20240008208
    Abstract: Disclosed herein is a method for producing a land grid array (LGA) socket connector assembly and the resultant assembly. The method comprises providing a carrier having a first carrier thickness with an array of vias, each having a first diameter, providing pockets around top surfaces of the vias, each having a second diameter and creating a portion of the pockets having a second carrier thickness that is less than the first carrier thickness, providing socket contact springs, each comprising a hole support structure that supports the socket contact spring within the via, and a contact beam configured to contact a conductor of an integrated circuit to be placed within the socket connector assembly, wherein a portion of carrier having a first carrier thickness is configured to prevent the contact beam from inelastically deforming when bent under load. Alternately, a contact feature may be used to prevent the inelastic deformation.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Mark K. Hoffmeyer, Sarah K. Czaplewski-Campbell, Brian Beaman, Yuet-Ying Yu
  • Patent number: 11861167
    Abstract: Methods, systems, and devices for performing an access operation on a memory cell, incrementing a value of a first counter based on performing the access operation on the memory cell, determining that the incremented value of the first counter satisfies a threshold, incrementing a value of a second counter based on determining that the incremented value of the first counter satisfies the threshold, and performing a maintenance operation on the memory cell based on determining that the incremented value of the first counter satisfies the threshold are described.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ning Chen, Jiangli Zhu, Fangfang Zhu, Ying Yu Tai
  • Publication number: 20230418090
    Abstract: Provided is polarization control device based on silicon waveguide and phase change material, including polarization rotation beam splitter, optical beam splitter component, phase shifter component, and polarization rotation beam combiner; input end of polarization rotation beam splitter is connected to input optical fiber; input end of first optical beam splitter is connected to output end of polarization rotation beam splitter, first output end of first optical beam splitter is connected to first phase shifter, and second output end thereof is connected to second phase shifter; input end of second optical beam splitter is connected to first phase shifter and second phase shifter, respectively, first output end of second optical beam splitter is connected to third phase shifter, and second output end of second optical beam splitter is connected to fourth phase shifter; and input end of polarization rotation beam combiner is connected to third phase shifter and fourth phase shifter, respectively.
    Type: Application
    Filed: April 3, 2023
    Publication date: December 28, 2023
    Inventors: Zhaohui Li, Yuhang Wei, Siqing Zeng, Yan Li, Ying Yu
  • Publication number: 20230400993
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on temperature-related memory component capabilities. The controller can obtain a write temperature associated with an individual group of memory components. Based on the write temperature and a temperature threshold associated with the individual group of memory components, the controller can select an individual media management operation to perform.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 14, 2023
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Patent number: 11837603
    Abstract: A method includes forming a source/drain region for a transistor, forming a first inter-layer dielectric over the source/drain region, and forming a lower source/drain contact plug over and electrically coupling to the source/drain region. The lower source/drain contact plug extends into the first inter-layer dielectric. The method further includes depositing an etch stop layer over the first inter-layer dielectric and the lower source/drain contact plug, depositing a second inter-layer dielectric over the etch stop layer, and performing an etching process to etch the second inter-layer dielectric, the etch stop layer, and an upper portion of the first inter-layer dielectric to form an opening, with a top surface and a sidewall of the lower source/drain contact plug being exposed to the opening, and forming an upper source/drain contact plug in the opening.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ying-Yu Lai, Chih-Hsuan Lin, Hsi Chung Chen, Chih-Teng Liao
  • Publication number: 20230378182
    Abstract: A method includes forming a source/drain region for a transistor, forming a first inter-layer dielectric over the source/drain region, and forming a lower source/drain contact plug over and electrically coupling to the source/drain region. The lower source/drain contact plug extends into the first inter-layer dielectric. The method further includes depositing an etch stop layer over the first inter-layer dielectric and the lower source/drain contact plug, depositing a second inter-layer dielectric over the etch stop layer, and performing an etching process to etch the second inter-layer dielectric, the etch stop layer, and an upper portion of the first inter-layer dielectric to form an opening, with a top surface and a sidewall of the lower source/drain contact plug being exposed to the opening, and forming an upper source/drain contact plug in the opening.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Ying-Yu Lai, Chih-Hsuan Lin, Hsi Chung Chen, Chih-Teng Liao
  • Publication number: 20230371280
    Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufactruring Company, Ltd.
    Inventors: Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Xinyu Bao, Hengyuan Lee, Ying-Yu Chen
  • Publication number: 20230364545
    Abstract: A gas purification system includes a dust removal filler, a fouling collection pan and a gas purification device. The dust removal filler has a plurality of rows of channels, each channel extending obliquely with respect to a vertical direction to form a windward surface, and a leeward surface, and a waveform plate. The peak portion of the waveform plate is attached to the leeward surface of the obliquely prismatic channel. During operation, dust adheres to a concave portion of a lower surface of the waveform plate and accumulates to form dust aggregates. When the gravity of the dust aggregates is greater than the adhesion force, the dust aggregates fall onto the windward surface of the channels and slide off from the windward surface of the channels.
    Type: Application
    Filed: September 16, 2021
    Publication date: November 16, 2023
    Inventors: Deqiang PENG, Minghua GUAN, Ping JIN, Xiangcheng LIANG, Xiuna YANG, Ying YU, Zonglin RUAN
  • Patent number: D1011339
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: January 16, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventor: Jo-Ying Yu