Abstract: A data bus is determined to be in a write mode. Whether a number of memory queues that identify at least one write operation satisfies a threshold criterion is determined. The memory queues include identifiers of one or more write operations and identifiers of one or more read operations. Responsive to determining that the number of memory queues satisfies the threshold criterion, a write operation from the memory queues is transmitted over the data bus.

Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.

Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.

Abstract: An input/output port circuit includes an input/output pad, a transistor, and a conductive routing wire. The transistor has a first connection terminal and a second connection terminal. The first connection terminal of the transistor is electrically connected to the input/output pad through a conductive connection wire, and the second connection terminal is electrically connected to another transistor. The conductive routing wire is electrically connected to the first terminal of the transistor. The conductive routing wire is configured to provide a serial resistance, thereby forcing a surge current to flow toward the another transistor when the surge current is inputted in the input/output circuit through the input/output pad.

Abstract: A sequencer component residing in a first package receives data from a controller residing in a second package that is different than the first package including the sequencer component. The sequencer component performs an error correction operation on the data received from the controller. The error correction operation encodes the data with additional data to generate a code word. The sequencer component stores the code word at a memory device.

Abstract: Disclosed herein is a method for producing a land grid array (LGA) socket connector assembly and the resultant assembly. The method comprises providing a carrier having a first carrier thickness with an array of vias, each having a first diameter, providing pockets around top surfaces of the vias, each having a second diameter and creating a portion of the pockets having a second carrier thickness that is less than the first carrier thickness, providing socket contact springs, each comprising a hole support structure that supports the socket contact spring within the via, and a contact beam configured to contact a conductor of an integrated circuit to be placed within the socket connector assembly, wherein a portion of carrier having a first carrier thickness is configured to prevent the contact beam from inelastically deforming when bent under load. Alternately, a contact feature may be used to prevent the inelastic deformation.

Abstract: Methods, systems, and devices for performing an access operation on a memory cell, incrementing a value of a first counter based on performing the access operation on the memory cell, determining that the incremented value of the first counter satisfies a threshold, incrementing a value of a second counter based on determining that the incremented value of the first counter satisfies the threshold, and performing a maintenance operation on the memory cell based on determining that the incremented value of the first counter satisfies the threshold are described.

Abstract: Provided is polarization control device based on silicon waveguide and phase change material, including polarization rotation beam splitter, optical beam splitter component, phase shifter component, and polarization rotation beam combiner; input end of polarization rotation beam splitter is connected to input optical fiber; input end of first optical beam splitter is connected to output end of polarization rotation beam splitter, first output end of first optical beam splitter is connected to first phase shifter, and second output end thereof is connected to second phase shifter; input end of second optical beam splitter is connected to first phase shifter and second phase shifter, respectively, first output end of second optical beam splitter is connected to third phase shifter, and second output end of second optical beam splitter is connected to fourth phase shifter; and input end of polarization rotation beam combiner is connected to third phase shifter and fourth phase shifter, respectively.

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on temperature-related memory component capabilities. The controller can obtain a write temperature associated with an individual group of memory components. Based on the write temperature and a temperature threshold associated with the individual group of memory components, the controller can select an individual media management operation to perform.

Abstract: A method includes forming a source/drain region for a transistor, forming a first inter-layer dielectric over the source/drain region, and forming a lower source/drain contact plug over and electrically coupling to the source/drain region. The lower source/drain contact plug extends into the first inter-layer dielectric. The method further includes depositing an etch stop layer over the first inter-layer dielectric and the lower source/drain contact plug, depositing a second inter-layer dielectric over the etch stop layer, and performing an etching process to etch the second inter-layer dielectric, the etch stop layer, and an upper portion of the first inter-layer dielectric to form an opening, with a top surface and a sidewall of the lower source/drain contact plug being exposed to the opening, and forming an upper source/drain contact plug in the opening.

Abstract: A method includes forming a source/drain region for a transistor, forming a first inter-layer dielectric over the source/drain region, and forming a lower source/drain contact plug over and electrically coupling to the source/drain region. The lower source/drain contact plug extends into the first inter-layer dielectric. The method further includes depositing an etch stop layer over the first inter-layer dielectric and the lower source/drain contact plug, depositing a second inter-layer dielectric over the etch stop layer, and performing an etching process to etch the second inter-layer dielectric, the etch stop layer, and an upper portion of the first inter-layer dielectric to form an opening, with a top surface and a sidewall of the lower source/drain contact plug being exposed to the opening, and forming an upper source/drain contact plug in the opening.

Abstract: A gas purification system includes a dust removal filler, a fouling collection pan and a gas purification device. The dust removal filler has a plurality of rows of channels, each channel extending obliquely with respect to a vertical direction to form a windward surface, and a leeward surface, and a waveform plate. The peak portion of the waveform plate is attached to the leeward surface of the obliquely prismatic channel. During operation, dust adheres to a concave portion of a lower surface of the waveform plate and accumulates to form dust aggregates. When the gravity of the dust aggregates is greater than the adhesion force, the dust aggregates fall onto the windward surface of the channels and slide off from the windward surface of the channels.

Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.

Abstract: A determination is made of whether a memory sub-system operates in a full capacity mode or a reduced capacity mode. The full capacity mode corresponds to accessing data residing at a set of memory devices via a number of physical data channels that corresponds to a number of logical data channels. The reduced capacity mode corresponds to accessing the data via a number of physical data channels that is less than the number of logical data channels. A data structure is updated to include one or more mappings between physical data channels and logical data channels according to the determination. A memory access operation to access a data item at memory cells of at least one of the set of memory devices is executed based on the one or more mappings of the data structure.

Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on memory component reliabilities. The controller can access configuration data to determine a reliability grade associated with individual groups of the memory components. The controller can then adaptively select between different media management operations based on the reliability grade associated with each individual group of the memory components.

Abstract: Systems and methods for performing slide drilling and for determining operational parameters to be utilized during slide drilling. An example method includes commencing operation of a processing device, whereby the processing device determines a reference rotational distance of a top drive to be utilized during slide drilling. The processing device outputs a control command to the top drive to cause the top drive to rotate a drill string. The processing device also determines the reference rotational distance based on rotational distance measurements indicative of rotational distance achieved by the top drive and torque measurements indicative of torque applied to the drill string by the top drive.

Abstract: A method for decolorizing a dyed textile comprising a synthetic fiber and a disperse dye, the method includes contacting the dyed textile with a super critical fluid thereby extracting at least a portion of the disperse dye from the textile into the super critical fluid and forming an at least partially decolorized textile.

Abstract: A semiconductor device includes a semiconductor substrate and an interconnection structure. The interconnection structure is disposed over the semiconductor substrate. The interconnection structure includes first conductive lines, second conductive lines, and ovonic threshold switches. The first conductive lines extend parallel to each other in a first direction. The second conductive lines are stacked over the first conductive lines and extend parallel to each other in a second direction perpendicular to the first direction. The ovonic threshold switches are disposed between the first conductive lines and the second conductive lines. The ovonic threshold switches include a ternary GeCTe material. The ternary GeCTe material consists substantially of carbon, germanium, and tellurium. In the ternary GeCTe material, a content of carbon is in a range from 10 to 30 atomic percent and a content of germanium is in a range from 10 to 65 atomic percent.

Abstract: Multiple dry etching operations are performed to form an opening for an interconnect structure, with a wet cleaning operation performed in between the dry etching operations. This multi-step etch approach increases the effectiveness of residual material removal, which increases the quality of the interconnect structure and reduces the likelihood of under etching, both of which increase semiconductor device yield and semiconductor device performance.