Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.

Abstract: Disclosed is a low-luminance imaging device using a silicon photomultiplier, which includes a first optical portion for collecting incident light, the silicon photomultiplier including a plurality of microcells so that photons of collected light are converted into photoelectrons which are then multiplied, a phosphor screen for converting the multiplied photoelectrons into photons, a second optical portion for transferring the converted photons, and an image sensor for picking-up the transferred photons thus obtaining an image, so that the imaging device has a high photomultiplication factor thereby obtaining an image having good image quality even at low luminance and achieving a low bias voltage and a small size.

Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.

Abstract: Disclosed herein is a silicon photomultiplier tube, including: a first type silicon substrate; a cell, each including a first type epitaxial layer formed on the first type silicon substrate, a first type conductive layer formed on the first type epitaxial layer, and a second type conductive layer formed on the first type conductive layer; a separating element located between the cell and a cell adjacent to the cell to separate the cells from each other; and an antireflection coating layer formed on a top surface of the second type conductive layer and an inner wall of the separating element, wherein any one of the first type conductive layer and the second type conductive layer is formed in a plurality of rows.

Abstract: A manufacturing method of a circuit board is disclosed. The manufacturing method of a circuit board in accordance with the present invention includes forming a separation layer on a carrier, stacking an adhesion layer which is coupled to the carrier and covers the separation layer, forming a circuit layer on the adhesion layer, forming a circuit board unit by cutting the separation layer, the adhesion layer and the circuit layer such that the separation layer is separated from the carrier, and forming a stiffener by processing the separation layer of the circuit board unit. The manufacturing method of a circuit board in accordance with the present invention can reduce the cost and time for forming the stiffener by forming the stiffener together in the manufacturing process of the circuit board.

Abstract: The present invention relates to a semiconductor package and a method of manufacturing the same. The semiconductor package may include: an insulator that has first and second opening parts; an active element that is disposed inside the first opening part; a passive element that is disposed inside the second opening part; a protective member that is disposed at a lower part of the insulator and covers a lower part of the passive element; a build-up layer that is disposed on the insulator and electrically connected to the active element; and an external connection unit that is electrically connected to the build-up layer.

Abstract: Disclosed is a silicon photoelectric multiplier having a cell structure, which includes a first type silicon substrate; a plurality of cells including a first type epitaxial layer formed on the substrate, a high concentration first type conductive layer formed on the epitaxial layer, and a high concentration second type conductive layer doped with a second type opposite the first type and formed on the high concentration first type conductive layer; a trench formed to optically separate the plurality of cells; and a guard ring formed on an outer wall of the trench so as to reach a bottom surface of the first type epitaxial layer, thus further increasing the degree of optical separation to thereby increase light detection efficiency.

Abstract: This invention relates to a printed circuit board and a method of manufacturing the same, in which an outermost layer of the printed circuit board includes a fine circuit and the manufacturing cost of the printed circuit board is reduced.

Abstract: Disclosed herein are a printed circuit board having metal bumps which have uniform diameter and are formed at fine pitch, and a method of manufacturing the printed circuit board.

Abstract: A motherboard assembly of a computer includes a motherboard (80) and an expansion device. The expansion device is connected to the motherboard. The expansion device includes a BIOS chip (10), a first connector (20) and at least one second connector (30). The first connector is connected to a socket (40) mounted on the motherboard. The second connector is capable of connecting to a burning device (90) for restoring the BIOS chip. The BIOS chip is connected to the first connector, the second connector, and to a signal choice terminal of the motherboard which acts to access the BIOS chip through the first connector and the socket such that the BIOS chip of the expansion device can replace a BIOS chip mounted on the motherboard to be accessed when the computer is powered up to be tested, thereby protecting the BIOS chip mounted on the motherboard being damaged in test.

Abstract: A BIOS chip expansion card for starting a computer when the computer needs to be tested, includes a BIOS chip for starting the computer a first connector configured for connecting with a motherboard of the computer, and a switch member connected to the BIOS chip and the first connector for controlling communication therebetween, thereby controlling communication between the BIOS chip and the motherboard of the computer. Wherein when the BIOS chip communicates with the motherboard, the computer is started via the BIOS chip so that the computer can be tested.

Abstract: A method of fabricating a micro-vertical structure is provided. The method includes bonding a second crystalline silicon (Si) substrate onto a first crystalline Si substrate by interposing an insulating layer pattern and a cavity, etching the second crystalline Si substrate using a deep reactive ion etch (DRIE) process along a [111] crystal plane vertical to the second crystalline Si substrate, and etching an etched vertical surface of the second crystalline Si substrate using a crystalline wet etching process to improve the surface roughness and flatness of the etched vertical surface. As a result, no morphological defects occur on the etched vertical surface. Also, footings do not occur at an etch end-point due to the insulating layer pattern. In addition, the micro-vertical structure does not float in the air but is fixed to the first crystalline Si substrate, thereby facilitating subsequent processes.

Abstract: A package substrate is disclosed. The package substrate as a printed circuit board, in which a semiconductor chip is mounted on one side thereof and the other side thereof is mounted on a main board, can include a substrate part, a first pad, which is formed on one side of the substrate part such that the first pad is electrically connected to the semiconductor chip, and a first solder resist layer, which is formed on one surface of the substrate part such that the first pad is exposed. Here, the first solder resist layer is divided into a pad portion and a dummy portion, the first pad is exposed in the pad portion, and the dummy portion is thinner than the pad portion. The package substrate can contribute to the formation of a structure in which thermal expansion coefficients are symmetrical between the top and bottom, thus preventing the warpage.

Abstract: A rotor for a synchronous motor includes a main core which is formed with a shaft hole disposed in a center area thereof, a plurality of inductive conductor slots arranged along an outer area thereof, and a plurality of magnet slots each arranged between the shaft hole and the inductive conductor slots; an inductive conductor which is inserted into each inductive conductor slot; a first and a second permanent magnet units which each have at least one first permanent magnet and at least one second permanent magnet having different polarities, the first permanent magnet and the second permanent magnet being inserted into the magnet slots and being disposed opposite to each other with the shaft hole being interposed therebetween; and a magnetic flux loss prevention member which is disposed between the first permanent magnet unit and the second permanent magnet unit and prevents loss of magnetic flux, intervals between the inductive conductor slots become small as the inductive conductor slots go from centers of

Abstract: The invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier, the method including (A) preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; (B) patterning the metal layers to form base circuit layers; (C) forming buildup layers on the base circuit layers; (D) executing a routing process to separate the insulating layers from the releasing layer; and (E) forming solder-resist layers on the buildup layers and forming openings in-the solder-resist layers and the insulating layers to expose pads.

Abstract: Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer.

Abstract: Disclosed herein is a printed circuit board, including: metal bumps having constant diameters and protruding over an insulation layer; a circuit layer formed beneath the insulation layer; and vias passing through the insulation layer to connect the metal bumps with the circuit layer.

Abstract: A method of manufacturing a multi-layer PCB having external contact pads formed on one side can include: forming an outermost insulation layer, in which openings are formed corresponding with the external contact pads; forming a mask, in which openings are formed corresponding with the external contact pad and with a circuit pattern, on the outermost insulation layer; forming the external contact pads and the circuit pattern in the openings of the outermost insulation layer and the openings of the mask; removing the mask; forming a build-up layer by stacking layers over the outermost insulation layer such that the external contact pads and the circuit pattern are covered; forming a first solder resist layer on the build-up layer; and forming a second solder resist layer on an opposite side of the outermost insulation layer; and forming openings in the second solder resist layer such that the external contact pads are exposed.

Abstract: Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey.

Abstract: A micro USB memory package and method for manufacturing the same, which can meet the USB standard specification, can have a light, thin, short and small configuration, can have various applications, and can simply expand the memory capacity thereof. The micro USB memory package comprises a substrate with a plurality of circuit patterns formed on the top surface thereof, at least one of passive elements connected with the circuit patterns of the substrate, at least one of controllers connected with the circuit patterns of the substrate, at least one of flash memories connected with the circuit patterns of the substrate, and an encapsulation part encapsulating the passive elements, the controllers and the flash memories on the substrate, and at least one of USB lands connected with the circuit patterns by a conducting via are formed on the under surface of one side of the substrate.