Abstract: A pulse width modulation (PWM) generating circuit includes a first comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a capacitor, and a diode. The first resistor and the second resistor are connected in series between a voltage input and ground. The third resistor, the fourth resistor, and the capacitor are connected in series between the voltage input and ground. The first comparator has a non-inverting input connected to a node between the first resistor and the second resistor, an inverting input connected to a node between the fourth resistor and the capacitor, and an output connected to a node between the third resistor and the fourth resistor. The diode is connected between the non-inverting input and the output. The inverting input of the first comparator provides triangular wave signals to a second comparator by which PWM signals are generated.

Abstract: A connector, such as an edge card connector, is provided with positive locking ejection latches. The positive locking of the ejection latches ensure that an associated card inserted into the connector will not accidentally be ejected under shock and vibration conditions. To use the ejection latches, a locking member provided in association with the ejections latches must be disabled.

Abstract: The method for manufacturing an FeRAM capacitor with a merged top electrode plate line (MTP) structure is employed to prevent a detrimental impact on the FeRAM and to secure a reliable FeRAM device. The method includes steps of: preparing an active matrix obtained by a predetermined process; forming a first conductive layer, a dielectric layer and a second conductive layer on the active matrix in sequence; forming a hard mask on the second conductive layer; patterning the second conductive layer, the dielectric layer and the first conductive layer by using the hard mask, thereby forming a vertical capacitor stack, a width of the capacitor stack being larger than that of the storage node contact; forming a second ILD embracing the capacitor stack; planarizing the second ILD till the top face of the hard mask is exposed; removing the hard mask to form an opening above the top electrode; and forming a plate line of which a width is larger than that of the capacitor stack.

Abstract: An image sensor device and methods thereof. In an example method, a protective layer may be formed over at least one microlens. An adhesive layer may be formed over the protective layer. The adhesive layer may be removed so as to expose the protective layer. The protective layer may be removed so as to expose the at least one microlens, the exposed at least one microlens not including residue from the adhesive layer. The at least one microlens may have an improved functionality due at least in part to the lack of residue from the adhesive layer. In an example, the at least one microlens may be included in an image sensor module.

Abstract: A method for managing a defective area of a write-once optical recording medium, and an optical recording medium using the same, is provided. In an optical disc device for recording/reproducing data using an optical disc such as a BD-WO type disc, the method permits the normal reading and reproducing of recording data written on a defective area of the disc, through a replacement write operation for the recording data of the defective area. When a defect is detected within a predetermined recording sector of the optical disc during the recording process, the recording data is written on a spare area corresponding to the defective area and the thus written data is managed. To accomplish this during data recording, the method selectively searches a write location of temporary defect list (TDFL) information, which is effective before disc finalization, or defect list (DFL) information, which becomes effective upon execution of a disc finalization operation.

Abstract: Provided is an optical transceiver module of an optical transceiver, which is used for optical communications. The optical transceiver module prevents electrical crosstalk between a light source and a light receiver. Additionally, the optical transceiver module includes an optical transceiver unit including a light source and a light receiver together integrated into a substrate, a circuit unit including a drive circuit driving the light source and a detect circuit reading a signal of the light receiver, and a crosstalk prevention unit connected between the substrate and ground to prevent electrical crosstalk between the light source and the light receiver.

Abstract: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. In an embodiment, a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner is provided.

Abstract: An on-die termination apparatus guarantees a desirable spec margin by separately controlling pull-up transistors and pull-down transistors provided in a main on-die termination block. The on-die termination circuit includes an extended mode register set decoding unit for decoding an inputted address to output a plurality of decoding signals to set a termination impedance; an ODT control unit for selectively activating a plurality of pull-up control signals and a multiplicity of pull-down control signals by logically combining the plurality of decoding signals, pull-up test signals and pull-down test signals; and an ODT unit including a plurality of main termination units to test the termination impedance by separately activating the plurality of main termination units based on the plurality of pull-up control signals and the multiplicity of pull-down control signals.

Abstract: The invention is directed to a thick film getter composition comprising: (a) desiccant material; dispersed in (b) organic medium comprising (1) curable organic polymeric binder; (2) monomer; and (3) photoinitiator.

Abstract: Reducing a standby period of time for printing includes: registering at least one item of network print information in a host computer; detecting the network printer information registered in the host computer if a command for printing has been selected; transmitting a command for requesting the network printers to transmit information concerning the amount of standby print operations using detected network printer information; evaluating the received information concerning the amount of the standby print operations; detecting a network printer having the least amount of standby print operations and transmitting print data to the detected network printer.

Abstract: A device and method for configuring an UL-DPCCH. One or more UL-DPCCHs, especially a UL-DPCCH for supporting HSDPA, are constructed in code division multiplexing and transmitted according to the characteristics of control information. The UL-DPCCH of the present invention that delivers various kinds of control information can be configured flexibly and operate in compatibility with a conventional asynchronous mobile communication system.

Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.

Abstract: A Carbon NanoTube (CNT) structure includes a substrate, a CNT support layer, and a plurality of CNTs. The CNT support layer is stacked on the substrate and has pores therein. One end of each of the CNTs is attached to portions of the substrate exposed through the pores and each of the CNTs has its lateral sides supported by the CNT support layer. A method of vertically aligning CNTs includes: forming a first conductive substrate; stacking a CNT support layer having pores on the first conductive substrate; and attaching one end of the each of the CNTs to portions of the first conductive substrate exposed through the pores.

Abstract: An n-type semiconductor substrate 11 has a p-type well 12 in which are formed a charge transfer channel 13, a flowing diffusion region 14 made of an n-type impurity region, an n-type buried region 16 and a reset drain region 15. Transfer gates 51 and 52 of a horizontal CCD and an output gate 41 are formed on the surface of the charge transfer channel 13, with an insulation film 20 interposed; reset electrodes 31 and 32 are formed on the surface of the buried region 16, again with the insulation film 20 interposed. The floating diffusion region 14 is connected to a source follower circuit 6. The reset electrodes 31 and 32 are provided adjacent to each other in the channel direction of a reset gate section 3 and can be driven independently of each other.

Abstract: A mounting pad for a disk drive is provided. The mounting pad includes a sealing layer, which is formed on one surface of the disk drive so that a gap between a base and a cover of the disk drive can be sealed; an adhesive layer, which is formed on a surface of the electronic system facing the disk drive; and a vibration attenuation layer, which is interposed between the sealing layer and the adhesive layer to attenuate physical shocks and/or vibrations applied to the disk drive from the outside. Accordingly, it is possible to install the disk drive in the electronic system more firmly, attenuate physical shocks and vibrations applied to the disk drive from the outside, and seal a gap between the base and the cover of the disk drive.

Abstract: A magnetic memory device includes a plurality of first metal lines arranged in parallel on a substrate and including a plurality of magnetic domains with variable magnetization directions. A plurality of second metal lines is arranged on the substrate perpendicular to the first metal lines. The plurality of second metal lines each has a tunnel through which the plurality of first metal lines pass. First input units are connected to the plurality of first metal lines and supply a current to drag or move the plurality of magnetic domains. Second input units are connected to the plurality of second metal lines to supply a current for switching the magnetization directions of magnetic domains inside the tunnels. Sensing units are connected to the plurality of second metal lines for sensing an electromotive force caused by magnetic domain walls passing through the tunnels.

Abstract: An array substrate includes a transparent substrate, pixel electrodes, switching devices, a data line, a gate line and a light blocking pattern. The light blocking pattern corresponding to a storage electrode is disposed on the transparent substrate, and the light blocking pattern blocks a light leaked from a space between the pixel electrodes. The pixel electrodes are spaced apart from the light blocking pattern by a first distance. The data line is spaced apart from the light blocking pattern by a second distance, and the data line is disposed under a region between the pixel electrodes. The data line is electrically connected to the source electrode, and the data line has a first width. The gate line is electrically connected to the gate electrode to turn on/off the switching devices. Therefore, a black matrix is not required, thereby enhancing an aperture ratio.

Abstract: A non-volatile memory cell includes a semiconductor substrate having a fin-shaped active region extending therefrom. A tunnel dielectric layer is provided, which extends on opposing sidewalls and an upper surface of the fin-shaped active region. A floating gate electrode is provided on the tunnel dielectric layer. This floating gate electrode has at least a partial groove therein. An inter-gate dielectric layer is also provided. This inter-gate dielectric layer extends on the floating gate electrode and into the at least a partial groove. A control gate electrode is provided, which extends on the inter-gate dielectric layer and into the at least a partial groove.

Abstract: There is provided a DLL capable of controlling a duty rate of a clock by a fuse option or an EMRS input. The DLL includes a first clock buffer, a second clock buffer, a first delay line, a second delay line, a shift register, a first duty control unit, a second duty control unit, a first DLL driver, a second DLL driver, a delay model, a phase comparator, and a shift control unit. In the DLL, a first duty control unit and a second duty control unit control each duty rate of the output clocks of a first and a second delay lines respectively through the EMRS input or the fuse option. Therefore, it is possible to control the duty rate of DLL clocks through the EMRS input or the fuse option.

Abstract: A system, method, computer program, and article of manufacture for generating a golden circuit including datapath components for equivalence checking of synthesized revised circuit. The method includes generating a set of static, dynamic and derived candidates for the datapath component subcircuit, evaluating the similarity degree for each candidate in relation to the revised circuits and selecting one candidate for implementation in the golden circuit. As a result, the subcircuit of datapath component in the golden circuit is replaced with the subcircuit which is more similar to the revised circuit to improve the efficiency of the equivalence checking.