Abstract: The present invention relates to a compact for cosmetics comprising an upper case, a lower case rotatably coupled to the upper case and a refill case detachably received in the lower case, wherein the refill case comprises a case mainbody where contents for cosmetics are received; a case cover which opens and closes the case mainbody; and a mesh screen cover having a border rim part which is received in the case mainbody to be tightly received within a wall of the mainbody, and a high elasticity mesh screen which has a border area supported by the border rim part to extend inwardly so as to cover the contents for cosmetics from an outside. Accordingly, expanded space is provided for receiving contents for cosmetics, the contents for cosmetics is prevented from flowing out of the refill case by the high elasticity mesh screen covering the contents for cosmetics, and the contents for cosmetics is prevented from being directly exposed to the outside thus decreasing vaporization when the case is open.

Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.

Abstract: A display device includes: a display panel; a backlight unit disposed above the display panel and configured to provide light to the display panel; a mold frame disposed between the display panel and the backlight unit and including a sidewall portion, which is formed to define an opening, a support portion, which extends from the sidewall portion toward the opening and supports the display panel, and at least one coupling groove portion, which is formed on an inner side of the sidewall portion; and at least one protective member including a coupling protrusion portion, which is inserted into the coupling groove portion, and a contact portion, which is disposed between an inside of the sidewall portion and an outside of the display panel and is connected to the coupling protrusion portion.

Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.

Abstract: A nonvolatile memory device comprises a memory core comprising a plurality of variable resistance memory cells, an input/output (I/O) circuit configured to receive a first packet signal and a second packet signal in sequence, the first and second packet signals collectively comprising information for a memory access operation, and further configured to initiate a core access operation upon decoding the first packet signal and to selectively continue or discontinue the core access operation upon decoding the second packet signal, and a read circuit configured to perform part of the core access operation in response to the first packet signal before the second packet signal is decoded.

Abstract: The present invention relates to a dispenser for supplying a disposable paper product of a roll type such as a toilet paper, a hand towel and etc. The dispenser has a main body casing which accommodates the paper product and has a rotating shaft supporting the paper product to be rotatable and a discharging part for discharging the paper product, and a wet type cutting unit which is located at the discharging part to provide liquid to a part of the paper product that is to be cut. Liquid is provided to an area of the paper product to be cut, so that the paper product can be easily cut with a relatively small force.

Abstract: A nonvolatile memory device includes a buffer memory, a read circuit configured to read first data stored in the buffer memory in a first read operation, and a write circuit configured to write second data in the buffer memory in a first write operation, wherein the first write operation is performed when a first internal write command is generated during the first read operation.

Abstract: A web browsing method and apparatus for enhancing a user's convenience in web browsing is provided in a system that uses a multi-core processor. The web browsing method and apparatus is applicable in a system, such as a smart phone that has a low computing power or that has a storage device like a flash memory operating in a rapid manner. Optimized machine codes are stored in files and incremental optimization is achieved, so the JAVASCRIPT® program of the web application has a small compilation overhead and achieves fast execution.

Abstract: A nonvolatile memory device comprises a memory core comprising a plurality of variable resistance memory cells, an input/output (I/O) circuit configured to receive a first packet signal and a second packet signal in sequence, the first and second packet signals collectively comprising information for a memory access operation, and further configured to initiate a core access operation upon decoding the first packet signal and to selectively continue or discontinue the core access operation upon decoding the second packet signal, and a read circuit configured to perform part of the core access operation in response to the first packet signal before the second packet signal is decoded.

Abstract: A nonvolatile memory device includes a memory array having multiple nonvolatile memory cells, a first read circuit and a second read circuit. The first read circuit is configured to read first data from the memory array during a first read operation and to provide one or more protection signals indicating a victim period during the first read operation. The second read circuit is configured to read second data from the memory array during a second read operation and to provide one or more check signals indicating an aggressor period during the second read operation.

Abstract: The present invention provides a novel structure for sealing a cosmetic container using a double-injection molded rib on the container body sealing against a deformable hard-rubber ring on the container cover. The invention will maximize product reliability by improving the sealing structure of a make-up base or cosmetic container through providing a clear, air-tight effect since the sealing structure cannot be deformed, even in the case of long-term use. The invention provides uniform, airtight adhesion without unequal distribution of coupling intensity between internal sealing components when the container cover is closed. Further, the aesthetics of the container are increased because a closure clasp is not necessary, and it is possible to eliminate the problem of dried-out product created when the container is fitted with a closure clasp or similar device.

Abstract: Disclosed is a lead frame base plate for a light emitting device, the base plate including: one or more lead frame areas respectively including a plurality of lead frames repeated in a first direction, the lead frame areas being arranged in parallel to be spaced apart from each other in a second direction intersecting with the first direction; and two or more openings extended in the first direction at both sides of each lead frame area so that the plurality of lead frames may be divided through a single direction sawing process performed in the second direction.

Abstract: A nonvolatile memory device comprises a one-time-programmable (OTP) lock bit register. The nonvolatile memory device comprises a variable-resistance memory cell array comprising an OTP block that store data and a register that stores OTP lock state information indicating whether the data is changeable. The register comprises a variable memory cell. An initial value of the OTP lock state information is set to a program protection state.

Abstract: One embodiment includes a non-volatile memory cell array, and a read unit configured to disable read operation for the non-volatile memory cell array for a time period following writing of data in the non-volatile memory cell array.

Abstract: The present invention can magnify a sealing characteristic and prevent deformation of hard rubber by coupling a container body with a rib formed on an external cap and through double-injection molding by an elastomer having a different elastic restoring force from the hard rubber charged and hardened in an injection concave groove of a support body that accommodates an internal container, in order to maximize product reliability by improving a sealing structure of a make-up base container or a cosmetic container and providing a clear air-tight effect since the sealing structure cannot be transformed even in case of long-term use.

Abstract: A nonvolatile memory device includes global selection lines, local selection lines, a first selection circuit, and a second selection circuit. The local lines correspond respectively to the global selection lines. The first selection circuit is configured to connect to the global selection lines to select the global selection lines. The second selection circuit is connected between the global selection lines and the local selection lines and is configured to select the local selection lines. The first selection circuit is configured to select at least one global selection line, and the second selection circuit is configured to select the local selection lines corresponding to the selected global selection line while the at least one global selection line is continuously activated.

Abstract: A method for manufacturing a lateral double diffused metal oxide semiconductor (LDMOS) device includes forming an oxide layer on a semiconductor substrate, forming first and second trenches by partially etching the oxide layer and the semiconductor substrate, forming a small trench overlapping with the second trench so that the second trench has a stepped structure, and depositing one or more dielectric layers so that the first trench forms a device isolation layer defining a semiconductor device region and the second trench having a stepped structure forms a drain extension device isolation layer. The breakdown voltage of the LDMOS device may be improved while reducing the on-resistance, thereby improving the operational reliability of the device.

Abstract: In a method of discharging bit-lines for a non-volatile semiconductor memory device performing a read-while-write operation. The method include discharging a global write bit-line to a ground voltage based on a write command within a first period. The method also includes maintaining the discharged voltage of the global write bit-line in the ground voltage during a second period.

Abstract: In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.

Abstract: A web browsing method and apparatus for enhancing a user's convenience in web browsing is provided in a system that uses a multi-core processor. The web browsing method and apparatus is applicable in a system, such as a smart phone that has a low computing power or that has a storage device like a flash memory operating in a rapid manner. Optimized machine codes are stored in files and incremental optimization is achieved, so the JAVASCRIPT® program of the web application has a small compilation overhead and achieves fast execution.