Patents by Inventor Yong-Kwan Kim

Yong-Kwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12001242
    Abstract: An electronic device includes a display module, and a support plate disposed under the display module and comprising reinforced fibers having long axes arranged in parallel to a direction. The electronic device is divided into a folding area foldable with respect to a folding axis extending in the direction, and a non-folding area adjacent to the folding area.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: June 4, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyunjun Cho, Kyu Young Kim, Yong-Kwan Kim, Hansun Ryou, Yonghyuck Lee, Hongkwan Lee, Sohra Han
  • Publication number: 20240160246
    Abstract: An electronic device includes a display panel including a folding area and first and second non-folding areas spaced apart from each other with the folding area between the first and second non-folding areas, and a digitizer including a first non-folding portion overlapping the first non-folding area, a second non-folding portion overlapping the second non-folding area, and a folding portion overlapping the folding area and including holes. The digitizer includes first loop coils in a first direction and second loop coils in a second direction and insulated from and intersecting with the first loop coils. The second loop coils may include non-folding coils respectively in the first and second non-folding portions and folding coils, at least one of which is in the folding portion. The non-folding coils are driven in a first mode, and the folding coils are driven in a second mode.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: HYUNJAE NA, HIROTSUGU KISHIMOTO, YONG-KWAN KIM, SUNGGUK AN, SEOKWON JANG, CHUL HO JEONG
  • Publication number: 20240160329
    Abstract: An electronic apparatus includes a display panel and a digitizer disposed under the display panel and provided with a plurality of holes defined therethrough to overlap the folding region. The digitizer includes a first base layer, first loop coils including first first coils and second first coils, a second base layer disposed under the first base layer, second loop coils including first second coils and second second coils, and interposed between the first base layer and the second base layer, and bridge patterns. A first first line included in one bridge pattern is connected to a corresponding first first coil, and a second first line included in the bridge pattern is connected to the second first coil which receives a signal the same as a signal of the first first coil.
    Type: Application
    Filed: September 19, 2023
    Publication date: May 16, 2024
    Inventors: HYUNJAE NA, HIROTSUGU KISHIMOTO, YONG-KWAN KIM, SEOKWON JANG, CHUL HO JEONG
  • Publication number: 20240163355
    Abstract: An electronic device includes: a digitizer disposed under a display panel, where the digitizer includes an upper layer divided into a first non-foldable portion, a second non-foldable portion, and a foldable portion overlapping the foldable area, where a plurality of holes are defined in the foldable portion, and a lower layer including a first plate and a second plate spaced apart from each other along the first direction so as to define a space therebetween in an area overlapping the foldable portion, where the upper layer includes a base layer, first loop coils, second-first loop coils disposed in the first non-foldable portion, and second-second loop coils disposed in the second non-foldable portion, where the lower layer includes a third-first loop coil disposed in the first plate so as to overlap the foldable portion and a third-second loop coil disposed in the second plate so as to overlap the foldable portion.
    Type: Application
    Filed: September 28, 2023
    Publication date: May 16, 2024
    Inventors: SEOKWON JANG, HIROTSUGU KISHIMOTO, YONG-KWAN KIM, HYUNJAE NA, SUNGGUK AN, CHUL HO JEONG
  • Publication number: 20240152222
    Abstract: A display device includes a display module which includes a first non-folding area, a folding area, and a second non-folding area, and a digitizer which includes a first area overlapping the first non-folding area and a portion of the folding area, a second area overlapping the folding area, and a third area overlapping a portion of the folding area and the second non-folding area, where a plurality of holes is defined in the second area through the digitizer, and the digitizer includes a base layer, a plurality of first coils, a plurality of second coils, first signal lines which are connected to the plurality of first coils, overlap the first area, the second area, and the third area, and do not overlap the plurality of holes, and second signal lines connected to the plurality of second coils and overlapping the third area.
    Type: Application
    Filed: August 17, 2023
    Publication date: May 9, 2024
    Inventors: HIROTSUGU KISHIMOTO, YONG-KWAN KIM, HYUNJAE NA, SUNGGUK AN, SEOKWON JANG, SUNG-KI JUNG
  • Publication number: 20240152183
    Abstract: A display device includes: a display module having a first non-folding region, a folding region foldable with respect to a folding axis, and a second non-folding region sequentially arranged along a first direction; a lower plate under the display module and having a plurality of plate openings overlapping the folding region; and a digitizer film under the lower plate and having a first region overlapping the first non-folding region and a portion of the folding region, a second region overlapping the folding region, and a third region overlapping a portion of the folding region and the second non-folding region. The digitizer film has a plurality of holes passing therethrough in the second region and includes a plurality of coils not overlapping the second region.
    Type: Application
    Filed: August 25, 2023
    Publication date: May 9, 2024
    Inventors: HIROTSUGU KISHIMOTO, YONG-KWAN KIM, HYUNJAE NA, SUNGGUK AN, SEOKWON JANG
  • Publication number: 20240143097
    Abstract: A display device includes a display panel including a first non-folding area, a second non-folding area, and a folding area that are arranged along a first direction, the folding area being foldable along a folding line extending along a second direction intersecting the first direction, a panel lower member disposed below the display panel, and a digitizer disposed below the panel lower member and including a base layer and sensing coils. The base layer includes a folding portion including holes overlapping the folding area of the display panel and first and second non-folding portions disposed along the first direction. The folding portion is disposed between the first and second non-folding portions. The sensing coils are disposed on the base layer, and the base layer includes a matrix including a filler and an elastomer and weaving-shaped fiber lines disposed inside the matrix and alternately arranged with each other.
    Type: Application
    Filed: August 2, 2023
    Publication date: May 2, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Hirotsugu KISHIMOTO, Yong Kwan KIM, Hyun Jae NA, Seok Won JANG, Sung Guk AN, Chul Ho JEONG
  • Patent number: 11972703
    Abstract: A foldable display device includes a display module including a first non-folding portion, a second non-folding portion, and a first folding portion between the first non-folding portion and the second non-folding portion, a first support member on a lower surface of the display module, the first support member including a first support portion supporting the first non-folding portion, a second support portion supporting the second non-folding portion, and a first opening pattern overlapping the first folding portion, and including a glass material, and a second support member under the first support member and supporting the display module.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 30, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyunjun Cho, Kyu Young Kim, Yong-Kwan Kim, Hansun Ryou, Yonghyuck Lee, Hongkwan Lee, Sohra Han
  • Publication number: 20240085998
    Abstract: A display device includes: a display panel including a first non-folding region, a second non-folding region, and a folding region disposed between the first non-folding region and the second non-folding region; and a lower member disposed below the display panel. The lower member includes: a digitizer disposed below the display panel and including a base layer and a plurality of coils disposed on one surface of the base layer; and a functional layer disposed below the digitizer, where the functional layer contains MXene.
    Type: Application
    Filed: June 1, 2023
    Publication date: March 14, 2024
    Inventors: BYUNG-SEO YOON, YONG-KWAN KIM, SUNGGUK AN
  • Patent number: 11837545
    Abstract: A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: December 5, 2023
    Inventors: Jungwoo Song, Ye-Ro Lee, Kwangtae Hwang, Kwangmin Kim, Yong Kwan Kim, Jiyoung Kim
  • Patent number: 11812655
    Abstract: A display device includes a display panel having a front surface where images are displayed; a rear-side layer disposed on a rear surface of the display panel, including a plurality of conductive patterns and having first surface unevenness on a front surface thereof; and a support plate disposed between the display panel and the rear-side layer and having a flat surface on a front surface thereof. The support plate includes glass or ceramic.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: November 7, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun Jun Cho, Yong Kwan Kim, Yong Hyuck Lee, Soh Ra Han, Kyu Young Kim, Han Sun Ryou
  • Patent number: 11778807
    Abstract: Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jungwoo Song, Kwangmin Kim, Jun Ho Lee, Hyuckjin Kang, Yong Kwan Kim, Sangyeon Han, Seguen Park
  • Publication number: 20230247778
    Abstract: An electronic device includes a display layer and a support part disposed under the display layer. The support part includes a first support portion having first and second surfaces defined thereon, and a second support portion facing the second surface. The first support portion includes a first material, the first surface faces the display layer, and the first surface is closer to the display layer than the second surface is. The second support portion includes a second material different from the first material. The first material includes glass fiber reinforced plastic.
    Type: Application
    Filed: September 22, 2022
    Publication date: August 3, 2023
    Inventors: YONG-KWAN KIM, YONGHYUCK LEE, HONGKWAN LEE, HYUNJUN CHO, SOHRA HAN
  • Publication number: 20230201864
    Abstract: A stage includes a bottom portion, a plurality of support portions extending in a first direction and spaced apart from each other in a second direction crossing the first direction, a plurality of blocks coupled with the support portions, respectively, and a plurality of porous films covering upper surfaces of the blocks, respectively.
    Type: Application
    Filed: November 15, 2022
    Publication date: June 29, 2023
    Inventors: KYUNGEUN LEE, SUIN KIM, YONG-KWAN KIM, CHULHO YOON, SEUNGJUN LEE, JINNYOUNG HEO
  • Publication number: 20230201866
    Abstract: A window coating jig includes: a base part and a stage which includes a support part, a first sidewall part surrounding the support part and defining an outer wall, and a second sidewall part disposed between the support part and the first sidewall part, and protrudes from the base part, wherein a blow groove is defined between the first sidewall part and the second sidewall part, a suction groove is defined between the second sidewall part and the support part, the base part has a blow hole and a suction hole passing through the base part, the blow hole and the suction hole being defined therein, the blow hole overlaps the blow groove, the suction hole overlaps the suction groove, and the first sidewall part has a vent opening passing therethrough in a direction crossing the direction in which the blow hole extends, the vent opening being defined therein.
    Type: Application
    Filed: November 17, 2022
    Publication date: June 29, 2023
    Inventors: SEOYOUNG JANG, BOA KIM, YONG-KWAN KIM, Jiin YOON, KYUNGEUN LEE, JINNYOUNG HEO
  • Patent number: 11646225
    Abstract: According to some embodiments, a semiconductor device may include gate structures on a substrate; first and second impurity regions formed in the substrate and at both sides of each of the gate structures; conductive line structures provided to cross the gate structures and connected to the first impurity regions; and contact plugs connected to the second impurity regions, respectively. For each of the conductive line structures, the semiconductor device may include a first air spacer provided on a sidewall of the conductive line structure; a first material spacer provided between the conductive line structure and the first air spacer; and an insulating pattern provided on the air spacer. The insulating pattern may include a first portion and a second portion, and the second portion may have a depth greater than that of the first portion and defines a top surface of the air spacer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 9, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myeong-Dong Lee, Keunnam Kim, Dongryul Lee, Minseong Choi, Jimin Choi, Yong Kwan Kim, Changhyun Cho, Yoosang Hwang
  • Publication number: 20230127260
    Abstract: Disclosed are an image processing method and an apparatus for performing the same. An image processing method according to one embodiment comprises the steps of: acquiring information about sensing a user; and displaying a back-projection image obtained by back-projecting at least one object that is visible through a transparent flat plate onto the transparent flat plate on the basis of the information.
    Type: Application
    Filed: November 19, 2020
    Publication date: April 27, 2023
    Inventors: Seok Hyung BAE, Joon Hyub LEE, Sang Gyun AN, Yong Kwan KIM, Hyung Gi HAM
  • Publication number: 20220399346
    Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 15, 2022
    Inventors: JIN A KIM, SUN YOUNG LEE, YONG KWAN KIM, JI YOUNG KIM, CHANG HYUN CHO
  • Publication number: 20220335676
    Abstract: Disclosed are an interfacing method and an apparatus for three-dimensional (3D) sketch. According to an example embodiment, the interfacing method for sketching in a virtual space of three dimensions includes determining a surface including an area in which a first user input is received in the virtual space to be a region of interest, controlling a position of the region of interest in the virtual space based on a second user input on the region of interest, and generating at least one sketch line belonging to the region of interest based on a third user input.
    Type: Application
    Filed: September 14, 2021
    Publication date: October 20, 2022
    Inventors: Yong Kwan KIM, Sang Gyun AN, Kyu Hyoung HONG
  • Patent number: 11462547
    Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: October 4, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin A Kim, Sun Young Lee, Yong Kwan Kim, Ji Young Kim, Chang Hyun Cho