Patents by Inventor Yong-Kyu Lee

Yong-Kyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10453044
    Abstract: An open fare payment method for a fare payment terminal device which performs a fare transaction process, includes: receiving fare transaction information from a fare media, determining a network state between a device and a central system, and receiving an authorization result of the fare transaction information from the central system according to the network state such that the device authorizes the fare transaction information or authorizes the fare transaction information by itself independently based on authorization reference information in the fare payment terminal device.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: October 22, 2019
    Assignee: LG CNS CO., LTD.
    Inventors: Seung A Lim, Yong Kyu Lee
  • Patent number: 10453801
    Abstract: A magnetic random-access memory (MRAM) device and a semiconductor package include a magnetic shielding layer that may suppress at least one of magnetic orientation errors and deterioration of magnetic tunnel junction (MTJ) structures due to external magnetic fields. A semiconductor device includes: a MRAM chip including a MRAM; and a magnetic shielding layer including an upper shielding layer and a via shielding layer. The upper shielding layer is on a top surface of the MRAM chip, and the via shielding layer extends from the upper shielding layer and passes through the MRAM chip.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: October 22, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-young Seo, Yong-kyu Lee
  • Publication number: 20190247313
    Abstract: Therapeutic compositions are disclosed which contain a therapeutic agent and a bile acid or bile acid conjugate. The compositions can be absorbed via enterohepatic circulation. The compositions include a cationic moiety and an anionic polymer, which are coupled through electrostatic interactions. The therapeutic compositions can be used for the treatment of diseases or disorders.
    Type: Application
    Filed: March 19, 2019
    Publication date: August 15, 2019
    Inventors: You Han BAE, Yong-Kyu LEE, Md NURUNNABI, Hee Sook HWANG, Dongsub KWAG
  • Patent number: 10350169
    Abstract: Therapeutic compositions are disclosed which contain a therapeutic agent and a bile acid or bile acid conjugate. The compositions can be absorbed via enterohepatic circulation. The compositions include a cationic moiety and an anionic polymer, which are coupled through electrostatic interactions. The therapeutic compositions can be used for the treatment of diseases or disorders.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 16, 2019
    Assignee: UNIVERSITY OF UTAH RESEARCH FOUNDATION
    Inventors: You Han Bae, Yong-Kyu Lee, Md Nurunnabi, Hee Sook Hwang, Dongsub Kwag
  • Publication number: 20190111156
    Abstract: The present invention relates to a nanoparticle for oral gene delivery, which is a novel oral gene delivery system capable of regulating blood glucose levels in biological systems and insulin secretion in response to ingested meals. More specifically, the present invention relates to a nanoparticle for gene delivery, comprising: an ionic polymer conjugated with bile acid or a bile acid derivative; and a gene; and to a pharmaceutical composition comprising the same.
    Type: Application
    Filed: April 26, 2017
    Publication date: April 18, 2019
    Inventors: Yong-Kyu Lee, Dong Yun Lee, Sung Hun Kang, Revuri Vishnu
  • Publication number: 20180211996
    Abstract: A semiconductor apparatus includes a substrate, a first insulating layer on a logic region and a memory region of the substrate, a second insulating layer on the first insulating layer, a base insulating layer between the first insulating layer and second insulating layer over the logic region and the memory region, first interconnection structures passing the first insulating layer, second interconnection structures passing through the second insulating layer, a base interconnection structure passing through the base insulating layer over the logic region, and a variable resistance structure in the base insulating layer over the memory region. The variable resistance structure includes a lower electrode, a magnetoresistive device, and an upper electrode, which are sequentially stacked. The lower electrode and the upper electrode are electrically connected to one of the first interconnection structures and one of the second interconnection structures, respectively, over the memory region.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong-kyu LEE, Gwan-hyeob Koh, Hong-kook Min
  • Patent number: 9954030
    Abstract: A semiconductor apparatus includes a substrate, a first insulating layer on a logic region and a memory region of the substrate, a second insulating layer on the first insulating layer, a base insulating layer between the first insulating layer and second insulating layer over the logic region and the memory region, first interconnection structures passing the first insulating layer, second interconnection structures passing through the second insulating layer, a base interconnection structure passing through the base insulating layer over the logic region, and a variable resistance structure in the base insulating layer over the memory region. The variable resistance structure includes a lower electrode, a magnetoresistive device, and an upper electrode, which are sequentially stacked. The lower electrode and the upper electrode are electrically connected to one of the first interconnection structures and one of the second interconnection structures, respectively, over the memory region.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: April 24, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-kyu Lee, Gwan-hyeob Koh, Hong-kook Min
  • Patent number: 9928892
    Abstract: A resistive memory apparatus includes a memory cell array having a plurality of memory cells and a first ground switch. The plurality of memory cells are arranged in a plurality of rows and a plurality of columns, and each memory cell in a first column of the plurality of memory cells is connected between a first bitline and a first source line. The first ground switch is connected in parallel with the first source line, and the first ground switch is configured to selectively provide a first current path from the first bitline to ground through a selected memory cell in the first column of the plurality of memory cells and the first source line, the current path traversing only a portion of the first source line.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: March 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-young Seo, Yong-seok Chung, Gwan-hyeob Koh, Yong-kyu Lee
  • Publication number: 20170345475
    Abstract: A resistive-type memory device is disclosed. The resistive-type memory device includes a memory cell array and a control logic circuit. The control logic circuit accesses the memory cell array in response to a command and an address provided from an outside. The memory cell array includes at least a first group of resistive-type memory cells and a second group of resistive-type memory cells. Each of the first group of resistive-type memory cells has a first feature size and each of the second group of resistive-type memory cells has a second feature size that is different from the first feature size.
    Type: Application
    Filed: January 9, 2017
    Publication date: November 30, 2017
    Inventors: Choong-Jae LEE, Gwan-Hyeob KOH, Bo-Young SEO, Yong-Kyu LEE
  • Publication number: 20170296481
    Abstract: Therapeutic compositions are disclosed which contain a therapeutic agent and a bile acid or bile acid conjugate. The compositions can be absorbed via enterohepatic circulation. The compositions include a cationic moiety and an anionic polymer, which are coupled through electrostatic interactions. The therapeutic compositions can be used for the treatment of diseases or disorders.
    Type: Application
    Filed: October 30, 2015
    Publication date: October 19, 2017
    Inventors: You Han BAE, Yong-Kyu LEE, Md NURUNNABI, Hee Sook HWANG, Dongsub KWAG
  • Patent number: 9728252
    Abstract: A method for operating a memory device includes sensing a change in temperature of the memory device, adjusting a level of a reference current for a read operation, and reading data from memory cells of the memory device based on the adjusted level of the reference current. The level of the reference current is adjusted from a reference value to a first value when the temperature of the memory device increases and is adjusted from the reference value to a second value when the temperature of the memory device decreases. A difference between the reference value and the first value is different from a difference the reference value and the second value.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-kyu Lee, Yeong-taek Lee, Dae-seok Byeon, In-gyu Baek, Man Chang, Lijie Zhang, Hyun-kook Park
  • Patent number: 9691459
    Abstract: A semiconductor memory device includes a shorted variable resistor element in a memory cell. The semiconductor memory device includes main cells and reference cells each including a cell transistor and a variable resistor element. The variable resistor element of the reference cell is shorted by applying a breakdown voltage of a magnetic tunnel junction (MTJ) element, connection in parallel to a conductive via element, connection to a reference bit line at a node between the cell transistor and the variable resistor element, or replacement of the variable resistor element with the conductive via element. A sense amplifier increases a sensing margin of the main cell by detecting and amplifying a current flowing in a bit line of the main cell and a current flowing in the reference bit line to which a reference resistor is connected.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: June 27, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-young Seo, Suk-soo Pyo, Gwan-hyeob Koh, Yong-kyu Lee, Dae-shik Kim
  • Patent number: 9685227
    Abstract: A method of reading a memory device that includes a memory cell that stores data of at least two bits includes determining whether a cell resistance level is no greater than a threshold resistance level. If the cell resistance level is smaller than or equal to the threshold resistance level, then the data is read based on a first factor that is inversely proportional to the cell resistance level. If the cell resistance level is greater than the threshold resistance level, then the data is read based on a second factor that is proportional to the cell resistance level.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: June 20, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Kyu Lee, Yeong-Taek Lee, Dae-Seok Byeon, Hyun-Kook Park, Hyo-Jin Kwon
  • Patent number: 9669103
    Abstract: Disclosed are a metal-nanoparticle-based liver-specific nucleic acid delivery system, a method of manufacturing the same, and a liver disease treatment composition containing the same. The liver-specific nucleic acid delivery system is coated with a bile acid-glycol chitosan polymer, so that it provides excellent liver-tissue specificity and high absorbance through digestive canals. Since the nucleic acid of the nucleic acid delivery system is coated with the bile acid-glycol chitosan polymer, it can be protected from decomposition of enzymes and the like inside a living organism. The liver-specific nucleic acid delivery system can be developed as an oral-administrating liver-disease treatment.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: June 6, 2017
    Assignees: KOREA NATIONAL UNIVERSITY OF TRANSPORTATION INDUSTRY-ACADEMIC COOPERATION FOUNDATION, THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Yong Kyu Lee, Sung Hoon Kang, Sang Joon Lee, In Kyu Park, Kwang Jae Cho, Mohammed Nurunnabi
  • Patent number: 9659645
    Abstract: A method of writing data in a resistive memory device having a memory cell array divided into first and second tiles includes; performing a first simultaneous write operation by performing a set write operation performed on resistive memory cells of the first tile while simultaneously performing a reset write operation on resistive memory cells of the second tile in response to the write command, and performing a second simultaneous write operation by performing a reset write operation on resistive memory cells of the first tile while simultaneously performing a set write operation on resistive memory cells of the second tile in response to the write command.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Kook Park, Yeong-Taek Lee, Dae-Seok Byeon, Yong-Kyu Lee, Hyo-Jin Kwon
  • Patent number: 9646685
    Abstract: An operating method for a resistive memory device includes; applying a bias control voltage to a memory cell array of the resistive memory device, measuring leakage current that occurs in the memory cell array in response to the applied bias control voltage to generate a measuring result, generating a control signal based on the measuring result, and adjusting a level of the bias control voltage in response to the control signal.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: May 9, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Kook Park, Yeong-Taek Lee, Dae-Seok Byeon, Yong-Kyu Lee, Hyo-Jin Kwon
  • Patent number: 9646687
    Abstract: Provided are a resistive memory device and an operating method for the resistive memory device. The operating method includes detecting a write cycle, determining whether or not to perform a recovery operation by comparing the detected write cycle with a first reference value, and upon determining to perform the recovery operation, performing the recovery operation on target memory cells of the memory cell array.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: May 9, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jin Kwon, Yeong-Taek Lee, Dae-Seok Byeon, Yong-Kyu Lee, Hyun-Kook Park
  • Publication number: 20170065724
    Abstract: Disclosed are a metal-nanoparticle-based liver-specific nucleic acid delivery system, a method of manufacturing the same, and a liver disease treatment composition containing the same. The liver-specific nucleic acid delivery system is coated with a bile acid-glycol chitosan polymer, so that it provides excellent liver-tissue specificity and high absorbance through digestive canals. Since the nucleic acid of the nucleic acid delivery system is coated with the bile acid-glycol chitosan polymer, it can be protected from decomposition of enzymes and the like inside a living organism. The liver-specific nucleic acid delivery system can be developed as an oral-administrating liver-disease treatment.
    Type: Application
    Filed: March 18, 2016
    Publication date: March 9, 2017
    Inventors: Yong Kyu LEE, Sung Hoon KANG, Sang Joon LEE, In Kyu PARK, Kwang Jae CHO, Mohammed Nurunnabi
  • Publication number: 20170069827
    Abstract: A semiconductor apparatus includes a substrate, a first insulating layer on a logic region and a memory region of the substrate, a second insulating layer on the first insulating layer, a base insulating layer between the first insulating layer and second insulating layer over the logic region and the memory region, first interconnection structures passing the first insulating layer, second interconnection structures passing through the second insulating layer, a base interconnection structure passing through the base insulating layer over the logic region, and a variable resistance structure in the base insulating layer over the memory region. The variable resistance structure includes a lower electrode, a magnetoresistive device, and an upper electrode, which are sequentially stacked. The lower electrode and the upper electrode are electrically connected to one of the first interconnection structures and one of the second interconnection structures, respectively, over the memory region.
    Type: Application
    Filed: April 18, 2016
    Publication date: March 9, 2017
    Inventors: Yong-Kyu LEE, Gwan-hyeob KOH, Hong-kook MIN
  • Publication number: 20170062032
    Abstract: A semiconductor memory device includes a shorted variable resistor element in a memory cell. The semiconductor memory device includes main cells and reference cells each including a cell transistor and a variable resistor element. The variable resistor element of the reference cell is shorted by applying a breakdown voltage of a magnetic tunnel junction (MTJ) element, connection in parallel to a conductive via element, connection to a reference bit line at a node between the cell transistor and the variable resistor element, or replacement of the variable resistor element with the conductive via element. A sense amplifier increases a sensing margin of the main cell by detecting and amplifying a current flowing in a bit line of the main cell and a current flowing in the reference bit line to which a reference resistor is connected.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 2, 2017
    Inventors: Bo-young Seo, Suk-soo Pyo, Gwan-hyeob Koh, Yong-kyu Lee, Dae-shik kim