Abstract: This disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The semiconductor device may include a substrate; a first fin on the substrate for forming a first electronic component; a first gate structure on a portion of the first fin including a first gate dielectric layer on a portion of the first fin and a first gate on the first gate dielectric layer; and a first source region and a first drain region that each at one of two sides of the first gate structure and at least partially located in the first fin, where the first gate dielectric layer comprises a first region abutting against the first drain region, a second region abutting against the first source region, and a third region between the first region and the second region, and wherein thickness of the first region is greater than that of the third region.

Abstract: A system and method are disclosed for provisioning IP features in a system-on-chip. A plurality of identical chips are fabricated, each of which is capable of have a number of features enabled or disabled. As a default, all features are disabled. A production process is later carried out, in which the chip is installed in a greater device. During this process, the manufacturer requests a license the IP owner for enablement of various features. Using secure communications, a license is granted identifying the features to be enabled, and a volume of units permitted to be manufactured. The license information is encrypted using a key already known to the chip, and sent to the manufacturer. The chip receives the license information during provisioning, extracts relevant provisioning information using the key, and a secure processing system provisions the relevant features. Log information is generated to allow the IP owner to verify license compliance.

Abstract: A switching power converter is disclosed that communicates a thermal alarm to a mobile device over a data channel in a data cable for charging the mobile device.

Abstract: A hybrid cluster environment with a public cloud cluster having nodes storing data and a plurality of private clusters is provided, wherein each of the plurality of private clusters has nodes storing data. Registration data that indicates a customer identifier, a new private cluster, and a file transfer server is received. The new private cluster is added to the plurality of private clusters in the hybrid cluster environment. Input to design a job to process data in the hybrid cluster environment is received. It is determined that the job is to be deployed to the new private cluster. The job is deployed to the new private cluster using the file transfer server, wherein the job is executed at the new private cluster. Job status information and one or more job logs are received with the file transfer server.

Abstract: Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate having an N-type logic region including a first and a second N-type threshold voltage region, a P-type logic region including a first and a second P-type threshold voltage region, a pull-up transistor region and an adjacent pull-down transistor region; forming a gate dielectric layer; forming a first work function layer on the gate dielectric layer; removing portions of the first work function layer; forming a second work function layer on remaining first work function layer and exposed portions of the gate dielectric layer; removing a portion of the second work function layer; forming an N-type work function layer on remaining second work function layer and exposed portion of the gate dielectric layer in the second N-type threshold voltage region; and forming a gate electrode layer on the N-type work function layer.

Abstract: A device for providing downlink channel access for non-operator devices includes at least one processor that is configured to establish a local connection with an operator device that is serviced by a network operator. The at least one processor is configured to provide, to the operator device over the local connection, a request to establish a connection to a network, the request comprising a destination address. The at least one processor is configured to receive, from the operator device over the local connection, control information for reception of a downlink channel provisioned by the network operator for the operator device. The at least one processor is configured to receive downlink data associated with the destination address on the downlink channel.

Abstract: A housing assembly includes: a support including a peripheral side wall and a lug, the peripheral side wall defining a first accommodating space configured to accommodate a dual-camera assembly, and the lug being connected to an outer peripheral side of the peripheral side wall away from the first accommodating space; and a middle frame having a second accommodating space and a groove in communication with the second accommodating space, the support being accommodated in the second accommodating space, and the lug being fitted with the groove. The present disclosure further provides a dual-camera module and a mobile terminal.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate structure having PMOS and NMOS regions. The PMOS region includes a first region, a first gate structure on the first region, and first source and drain regions on opposite sides of the first gate structure. The NMOS region includes a second region and a second gate structure on the second region. The method also includes introducing a p-type dopant into the first source and drain regions, performing a first annealing, forming second source and drain regions on opposite sides of the second gate structure, introducing an n-type dopant into the second source and drain regions, and performing a second annealing. The method satisfies thermal budget requirements of forming PMOS and NMOS devices, thereby enabling a better diffusion of the p-type dopant into the source and drain regions of the PMOS device without affecting the performance of the NMOS device.

Abstract: Disclosed herein are novel hole transporting materials comprising polycyclic heteroaromatic hydrocarbon compounds that are easy to synthesize and inexpensive. The hole transporting materials of the present disclosure have high hole mobility and thus do not require any doping. The hole transporting materials of the present disclosure also have matching frontier orbitals when used in devices with the perovskite and cathodes, facilitating hole migration across perovskite/hole transporting layers and hole transporting layer/cathode interfaces. The hole transporting materials of the present disclosure can further be hydrophobic with no moisture attracting atoms. The hole transporting materials can be used to form dense and uniform films on perovskite, and combined with hydrophobicity, form an excellent moisture barrier for the perovskite. With the present disclosure compound as the hole transporting layer in a perovskite solar cell, highly stable and highly efficient and inexpensive solar cells can be achieved.

Abstract: A stator core includes an end portion, a first pole arm, and a second pole arm. The first pole arm includes two first connecting arms extending from the end portion and spaced from each other, and two first pole claws respectively formed at ends of the first connecting arms. The first pole claws are spaced from each other with an opening formed there between. The second pole arm includes two second connecting arms axially stacked to the two first connecting arms respectively and two second pole claws respectively formed at distal ends of the two second connecting arms. The two second connecting arms are connected with each other.

Abstract: A method is provided for fabricating an LDMOS transistor. The method includes providing a base substrate. The method also includes forming a first well area doped with a first well ion in the base substrate. In addition, the method includes forming a second well area doped with a second well ion in the base substrate, where the second well area includes a first region adjacent to the first well area. Moreover, the method includes forming a first ion doping region doped with first ions in the first well area and the first region, where a type of the first ions is the same as a type of the first well ion and opposite to a type of the second well ion. Further, the method includes forming a gate structure on part of the first well area and part of the first region.

Abstract: A fin field-effect transistor (fin-FET) includes a substrate having a plurality of discrete fin structures thereon; a chemical oxide layer on at least a sidewall of a fin structure; a doped layer containing doping ions on the chemical oxide layer; and a doped region in the fin structure containing doping ions diffused from the doping ions in the doped layer.

Abstract: A mechanism is provided for applying matching data transformation information based on a user's editing of data within a document. User input identifying inputs provided by a user while editing a document within an application executing on the data processing system is received. A matching algorithm is executed based on user input to identify one or more candidate transformation operations within a transformation operation data structure that matches the user input. Responsive to failing to identify any candidate transformation operations, an indication is provided that no candidate transformation operations are identifiable. Responsive to one or more candidate transformation operations being identified, a list of transformation operations is provided that includes the one or more candidate transformation operations to the user via the data processing system.

Abstract: The present invention provides a channel state information feedback method and device. The method includes: selecting, by a communication node, N information groups from configured M information groups; where N and M are positive integers, and N is less than or equal to M; processing, by the communication node, the selected N information groups in a preset manner to obtain index information of the N information groups and parameter information of the preset manner, wherein the index information comprises group indices of the N information groups or index of information in the N information groups; and feeding back, by the communication node, the index information and the parameter information.

Abstract: A mechanism is provided for applying matching data transformation information based on a user's editing of data within a document. User input identifying inputs provided by a user while editing a document within an application executing on the data processing system is received. A matching algorithm is executed based on user input to identify one or more candidate transformation operations within a transformation operation data structure that matches the user input. Responsive to failing to identify any candidate transformation operations, an indication is provided that no candidate transformation operations are identifiable. Responsive to one or more candidate transformation operations being identified, a list of transformation operations is provided that includes the one or more candidate transformation operations to the user via the data processing system.

Abstract: A semiconductor device includes a base substrate including an NMOS region and a PMOS region. The PMOS region includes a first P-type region and a second P-type region. The semiconductor device also includes an interlayer dielectric layer, a gate structure formed through the interlayer dielectric layer and including an N-type region gate structure formed in the NMOS region, a first gate structure formed in the first P-type region and connected to the N-type region gate structure, and a second gate structure formed in the second P-type region and connected to the first gate structure. The direction from the N-type region gate structure to the second gate structure is an extending direction of the gate structure, and along a direction perpendicular to the extending direction of the gate structure, the width of the first gate structure is larger than the width of the second gate structure.

Abstract: Certain aspects of the present disclosure relate to methods and apparatus for providing beam switch latency using communications systems operating according to new radio (NR) technologies. For example, the method generally includes determining a latency associated with a beam switch from a source antenna array module to a target antenna array module when the target module is in a low power mode; and signaling a base station to use the determined latency after sending a command for the beam switch.

Abstract: A method of manufacturing a semiconductor device includes providing a substrate having first and second semiconductor fins, forming an insulating layer on the substrate having first and second recesses exposing a portion of the respective first and second semiconductor fins, forming a gate dielectric layer on the first and second recesses and the exposed portions of the first and second semiconductor fins, forming a first work function adjustment layer on the gate dielectric layer, forming a functional layer on the first function adjustment layer, and forming first and second gates on portions of the functional layer of the respective first and second semiconductor fins. The opening area of the first recess is larger than the opening area of the second recess. The thickness of the functional layer on the first semiconductor fin is greater than the thickness of the functional layer on the second semiconductor fin.

Abstract: A mechanism is provided for applying matching data transformation information based on a user's editing of data within a document. User input identifying inputs provided by a user while editing a document within an application executing on the data processing system is received. A matching algorithm is executed based on user input to identify one or more candidate transformation operations within a transformation operation data structure that matches the user input. Responsive to failing to identify any candidate transformation operations, an indication is provided that no candidate transformation operations are identifiable. Responsive to one or more candidate transformation operations being identified, a list of transformation operations is provided that includes the one or more candidate transformation operations to the user via the data processing system.