Patents by Inventor Yong Li

Yong Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10811414
    Abstract: Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a base substrate including a plurality of fins on a semiconductor substrate; forming a gate layer across the fins; forming a P-type doped epitaxial layer in the fins at both sides of the gate layer in a PMOS region of the semiconductor substrate; forming an N-region mask layer on top and sidewall surfaces of the fins in the NMOS region and covering the P-type doped epitaxial layer; forming an N-region trench; forming an N-type doped epitaxial layer by filling the N-region trench; forming an interlayer dielectric layer over the semiconductor substrate; forming a contact opening to expose the P-type doped epitaxial layer and the N-type doped epitaxial layer; and performing an N-type dopant segregated Schottky (DSS) doping process on a portion of the N-type doped epitaxial layer exposed by the contact opening.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 20, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, SMIC New Technology Research and Development (Shanghai) Corporation
    Inventor: Yong Li
  • Patent number: 10811513
    Abstract: A vertical tunneling field effect transistor is provided and includes: a semiconductor substrate; a first doped layer on the semiconductor substrate; vertical nanowires on the first doped layer; a second doped layer on a top of each vertical nanowire; an interlayer dielectric layer on the first doped layer, including a cavity between the adjacent vertical nanowires through the interlayer dielectric layer and exposing sidewalls of the adjacent vertical nanowires; a high-K gate dielectric layer in sidewalls and a bottom of each cavity; and a gate electrode layer on the high-K gate dielectric layer to fill each cavity.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: October 20, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Yong Li
  • Publication number: 20200322447
    Abstract: This application provides a cache decision method and apparatus. The method includes: receiving, by a policy control function PCF, first cache information sent by at least one local analytic function LAF, where the first cache information includes a base station identifier, identifiers of first N1 pieces of application information that are accessed for a maximum quantity of times, and content corresponding to the identifiers of the N1 pieces of application information, and N1 is a positive integer; and determining, by the PCF, local cache content based on the first cache information and a capacity of a local cache. In this way, a cache hit rate can be effectively improved, transmission bandwidth and data transmission overheads are greatly reduced, and users' experience of using the network is improved.
    Type: Application
    Filed: June 24, 2020
    Publication date: October 8, 2020
    Inventors: Huan YAN, Yong LI, Haiyang SUN
  • Patent number: 10797177
    Abstract: A method for manufacturing a semiconductor device includes providing a substrate structure having PMOS and NMOS regions. The PMOS region includes a first region, a first gate structure on the first region, and first source and drain regions on opposite sides of the first gate structure. The NMOS region includes a second region and a second gate structure on the second region. The method also includes introducing a p-type dopant into the first source and drain regions, performing a first annealing, forming second source and drain regions on opposite sides of the second gate structure, introducing an n-type dopant into the second source and drain regions, and performing a second annealing. The method satisfies thermal budget requirements of forming PMOS and NMOS devices, thereby enabling a better diffusion of the p-type dopant into the source and drain regions of the PMOS device without affecting the performance of the NMOS device.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: October 6, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Yong Li
  • Patent number: 10789311
    Abstract: A method and a device for selecting data content to be pushed to a terminal are disclosed. In some embodiments, the method includes: acquiring a user identifier, and acquiring a characteristic value, corresponding to the user identifier, in a preset user attribute type; acquiring data content, and searching for a decision tree object corresponding to the data content; locating a leaf node corresponding to the user identifier in the decision tree object based on the characteristic value, corresponding to the user identifier, in the preset user attribute type; and acquiring the number of clicks and the number of pushes stored in the located leaf node, generating a selection reference value based on the number of clicks and the number of pushes, and selecting, based on the selection reference value, data content to be pushed to a terminal corresponding to the user identifier.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: September 29, 2020
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Lei Jiang, Yong Li, Lei Xiao, Dapeng Liu, Shubin Zhang, Chuanjiang Luo, Yajuan Song
  • Patent number: 10790206
    Abstract: Testing structures, and their fabrication methods and testing methods are provided. An exemplary testing structure includes a base substrate containing a well region; a first doped epitaxial region in the well region and having a doping type same as a doping type of the well region; a dielectric layer on the base substrate and covering the well region and the first doped epitaxial region; a first contact plug passing through the dielectric layer and electrically connected with the first well region; and a second contact plug and a third contact plug. The second contact plug and the third contact plug pass through the dielectric layer and electrically connected with the first doped epitaxial region. The second contact plug is independent from the third contact plug and between the first contact plug and the third contact plug.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: September 29, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Yong Li
  • Publication number: 20200304191
    Abstract: The present invention provides an information processing method, comprising: generating signaling comprising configuration information of channel state information process (CSI process); and sending the signaling comprising the configuration information of the CSI process. The present invention resolves the problem in the related art of being unable to use one CSI-RS resource overhead to meet the transmission requirements of multiple CSI-RSs having different port numbers, thereby achieving the technical effect of reducing resource overheads. The present invention also provides an information processing device and a storage medium.
    Type: Application
    Filed: March 7, 2017
    Publication date: September 24, 2020
    Inventors: Yong LI, Yijian CHEN, YuNgok LI, Zhaohua LU, Huahua XIAO, Yuxin WANG, Hao WU, Jianxing CAI
  • Publication number: 20200290969
    Abstract: The present invention relates to fused piperidinyl bicyclic, meta-substituted piperidinyl and their related compounds that modulate activities of mammalian C5a receptor by directly binding to the C5a receptor. The invention also relates to pharmaceutical compositions containing such compounds and their use in the treatment of a disease or a disorder involving pathogenic activation of C5a receptors.
    Type: Application
    Filed: February 7, 2020
    Publication date: September 17, 2020
    Applicant: InflaRx GmbH
    Inventors: YONG LI, RENFENG GUO, NIELS CHRISTOPH RIEDEMANN
  • Publication number: 20200290962
    Abstract: The present invention is directed to a process for preparing a compound of formula I-11 through multiple-step reactions:
    Type: Application
    Filed: February 20, 2020
    Publication date: September 17, 2020
    Inventors: John Y.L. CHUNG, Kevin CAMPOS, Edward CLEATOR, Robert F. DUNN, Andrew GIBSON, R. Scott HOERRNER, Stephen KEEN, Dave LIEBERMAN, Zhuqing LIU, Joseph LYNCH, Kevin M. MALONEY, Feng XU, Nobuyoshi YASUDA, Naoki YOSHIKAWA, Yong-Li ZHONG
  • Patent number: 10774350
    Abstract: The present application relates to a method for fermentative production of oxidized coenzyme Q10 and high-content oxidized coenzyme Q10 prepared therefrom. For the method for fermentative production of oxidized coenzyme Q10, in a fermentation process of a production strain, the oxidation-reduction potential (ORP) of a fermentation broth is controlled to be ?50 to 300 Mv, and preferably the oxidation-reduction potential (ORP) of the fermentation broth is controlled to be 50 to 200 mV. By controlling the ORP of the fermentation broth, the method for fermentative production of oxidized coenzyme Q10 enables the oxidized coenzyme Q10 content in the coenzyme Q10 produced by microorganisms to reach 96% or more, and the product is substantially composed of a single component, which makes post-treatment more convenient.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: September 15, 2020
    Assignees: ZHEJIANG NHU COMPANY LTD., ZHEJIANG UNIVERSITY, HEILONGJIANG NHU BIOTECHNOLOGY COMPANY LTD., SHANGYU NHU BIOLOGICAL CHEMICAL CO., LTD.
    Inventors: Shenfeng Yuan, Hongwei Yu, Zhaofeng Chen, Yongqiang Zhu, Yi Min, Yong Li, Baishan Hu, Guisheng Qiu, Kai Yu
  • Publication number: 20200285765
    Abstract: The present invention provides a system 100 for storing encrypted data. The system 100 comprises a server 101 and a plurality of clients 102. A first client 102a of the plurality of clients 102 is configured to send to the server 101 a first reference value 103 calculated from data to be encrypted and stored. The server 101 is configured to determine a group 104 of second clients 102b from the plurality of clients 102, the second clients 102b having each sent to the server 101 data with a second reference value equal to the first reference value 103. The group 104 of second clients 102b is configured to perform a passive key exchange protocol 105 with the first client 102a, and the server 101 is configured to determine, based on a result of the passive key exchange protocol 105, whether the data is to be stored in full or as deduplicated data.
    Type: Application
    Filed: May 22, 2020
    Publication date: September 10, 2020
    Inventor: Yong LI
  • Publication number: 20200287738
    Abstract: Embodiments of this application disclose a data processing method for avoiding a packet loss and for improving user experience. The method in the embodiments includes: sending, by a cable modem termination system CMTS, a dynamic bonding change (DBC) request to a cable modem (CM), where the DBC request is used to request the CM to change a modulation profile group corresponding to the downstream channel from a first profile group to a second profile group. The first profile group is a profile group currently supported by the CM, and at least one target profile in the second profile group is not in the first profile group. The method further includes sending, by the CMTS, a first downstream data packet to the CM by using any profile in the first profile group, and sending a second downstream data packet to the CM by using the target profile.
    Type: Application
    Filed: May 26, 2020
    Publication date: September 10, 2020
    Inventors: Biao CHENG, Hexian LIU, Jin XU, Yong LI
  • Patent number: 10770909
    Abstract: A switching power converter is provided with an overvoltage protection circuit that monitors the differential data signal voltages in a data interface such as a USB data interface powering a load device to detect soft short conditions.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: September 8, 2020
    Assignee: DIALOG SEMICONDUCTOR INC.
    Inventors: Jianming Yao, Yong Li, Dickson Wong
  • Patent number: 10769300
    Abstract: A hybrid cluster environment with a public cloud cluster having nodes storing data and a plurality of private clusters is provided, wherein each of the plurality of private clusters has nodes storing data. Registration data that indicates a customer identifier, a new private cluster, and a file transfer server is received. The new private cluster is added to the plurality of private clusters in the hybrid cluster environment. Input to design a job to process data in the hybrid cluster environment is received. It is determined that the job is to be deployed to the new private cluster. The job is deployed to the new private cluster using the file transfer server, wherein the job is executed at the new private cluster. Job status information and one or more job logs are received with the file transfer server.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: September 8, 2020
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Greene, Yong Li, Ryan Pham, Xiaoyan Pu, Yeh-Heng Sheng
  • Publication number: 20200281005
    Abstract: Dynamic User Equipment (UE) beam switching for millimeter wave (mmWave) measurements in asynchronous networks is discussed in which a UE configured with a plurality of UE beams receives timing information of detected cells in an asynchronous network, and calculates, based on the timing information, a maximum offset for the detected cells indicating a timing difference between a pair of cells of the detected cells that is larger than a timing difference between any other pair of the detected cells. A UE beam switch from a UE beam to another UE beam of the plurality of beams is scheduled based on the maximum offset, which includes using the maximum offset to determine how often the UE beam switch can be performed. Other aspects and features are also claimed and described.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Inventors: Ting Kong, Chun-Hao Hsu, Yongle Wu, Yong Li, Jun Zhu, Raghu Narayan Challa
  • Patent number: 10762234
    Abstract: A hybrid cluster environment with a public cloud cluster having nodes storing data and a plurality of private clusters is provided, wherein each of the plurality of private clusters has nodes storing data. Registration data that indicates a customer identifier, a new private cluster, and a file transfer server is received. The new private cluster is added to the plurality of private clusters in the hybrid cluster environment. Input to design a job to process data in the hybrid cluster environment is received. It is determined that the job is to be deployed to the new private cluster. The job is deployed to the new private cluster using the file transfer server, wherein the job is executed at the new private cluster. Job status information and one or more job logs are received with the file transfer server.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: September 1, 2020
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Greene, Yong Li, Ryan Pham, Xiaoyan Pu, Yeh-Heng Sheng
  • Patent number: 10764932
    Abstract: Methods, systems, and devices for wireless communications are described. One method may include receiving a beam switch message prior to initiating a physical random access channel (PRACH) procedure, monitoring for a response from a base station using a candidate beam during a random access response window, identifying a beam switch event occurring within the random access response window based on beam switch timing information indicated in the beam switch message, and performing a beam switch procedure based on an absence of a response from the base station during a portion of the random access response window and prior to the beam switch event.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: September 1, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Sumeeth Nagaraja, Tao Luo, Yong Li
  • Patent number: 10755935
    Abstract: A semiconductor device and fabrication method are provided. The method includes providing a first dielectric layer with a first groove on a base substrate. A first gate electrode is formed in the first groove, with a top surface lower than the first dielectric layer. A first protective layer is formed on a portion of the top surface of the first gate electrode, with a first oxygen ionic concentration. A compensating protective layer is formed on a remaining portion of the top surface of the first gate electrode exposed by the first protective layer, with a second oxygen ionic concentration. A second dielectric layer is formed on the first protective layer, on the compensating protective layer, and on the first dielectric layer, with a third oxygen ionic concentration. The first oxygen ionic concentration and second oxygen ionic concentration are smaller than the third oxygen ionic concentration.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: August 25, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Yong Li
  • Publication number: 20200261375
    Abstract: Disclosed is the use of (+)-2-borneol in the preparation of a drug for promoting the upregulation of the expression of sphingosine kinase-1 and/or BDNF (a brain-derived neurotrophic factor). Herein, (+)-2-borneol can be used to prepare a drug for promoting the upregulation of the expression of the sphingosine kinase-1 and/or the brain-derived neurotrophic factor. The drug can induce astrocyte spreading and migration, oligodendrocyte differentiation and survival, and neurite growth and nerve regeneration, and can promote the upregulation of the expression of the brain-derived neurotrophic factor, promote the survival of neurons and the growth of axons, inhibit the expansion of the infarct volume, and achieve the effect of repairing damage at the site of an immediate injury while preventing further expansion of the infarct area to completely treat brain damage, so that the long-term therapeutic effect thereof is significantly improved.
    Type: Application
    Filed: June 7, 2017
    Publication date: August 20, 2020
    Inventors: Yunsen LI, Shiping DENG, Yong LI, Chuanliang JIANG, Yunhui YU
  • Publication number: 20200266201
    Abstract: A semiconductor structure and a static random access memory are provided. The semiconductor structure includes a base substrate. The base substrate includes a substrate and a plurality of discrete fins on the substrate. The substrate includes a pass gate transistor region. The semiconductor structure further includes a gate structure, across a length portion of each fin, covering top and sidewall surfaces of each fin, and on each fin, and pass gate doped regions in the fin on both sides of the gate structure in the pass gate transistor region. At least one of the pass gate doped regions on one side of the gate structure is a non-epitaxial layer doped region in the fin.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 20, 2020
    Inventor: Yong LI