Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer. The first gate spacer includes an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes a fluorine concentration that decreases from the inner surface and the outer surface towards a center of the first gate spacer. The structure further includes a second gate spacer disposed on the outer surface of the first gate spacer, and the second gate spacer includes a fluorine concentration that decreases from an outer surface towards an inner surface.

Abstract: In a method for connection between a first electronic device and a second electronic device using a Universal Serial Bus (USB) system of the first electronic device, the first electronic device enables a first connection mode. The first electronic device allocates Internet Protocol (IP) addresses to the first electronic device and the second electronic device and the first electronic device disables transmitting data received using the USB system to a mobile communications system of the first electronic device.

Abstract: A device includes a substrate and a dielectric layer on the substrate. The device also includes a light sensitive component in the dielectric layer and a trench having a first portion disposed in the substrate and a second portion disposed in the dielectric layer. The trench is adjacent the light sensitive component and includes an adhesion layer in the first portion and the second portion, an optical isolation layer on the adhesion layer, and a first fill material in the first portion and a second fill material in the second portion. The first fill material is characterized by a first coefficient of thermal expansion (CTE) that matches a CTE of the substrate and the second fill material is characterized by a second CTE that matches a CTE of the dielectric layer.

Abstract: An electro-optical device is fabricated on a semiconductor-on-insulator (SOI) substrate. The electro-optical device comprises a silicon dioxide layer, and an active layer having ferroelectric properties on the silicon dioxide layer. The silicon dioxide layer includes a first silicon dioxide layer of the SOI substrate and a second silicon dioxide layer converted from a silicon layer of the SOI substrate. The active layer includes a buffer layer epitaxially grown on the silicon layer of the SOI substrate and a ferroelectric layer epitaxially grown on the buffer layer. The electro-optical device further comprises one or more additional layers over the active layer, and first and second contacts to the active layer through at least one of the one or more additional layers. Methods of fabricating the electro-optical device are also described herein.

Abstract: Embodiments of a photovoltaic device are provided herein. The photovoltaic device can include a layer stack and an absorber layer disposed on the layer stack. The absorber layer can include a first region and a second region. Each of the first region of the absorber layer and the second region of the absorber layer can include a compound comprising cadmium, selenium, and tellurium. An atomic concentration of selenium can vary across the absorber layer. The first region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. The second region of the absorber layer can have a thickness between 100 nanometers to 3000 nanometers. A ratio of an average atomic concentration of selenium in the first region of the absorber layer to an average atomic concentration of selenium in the second region of the absorber layer can be greater than 10.

Abstract: A near-optimal Karhunen-Loeve basis expansion modeling (KL-BEM) orthogonal time frequency space (OTFS) receiver with superimposed pilots has been proposed for high-mobility communications with Doppler spread channel. First, an initial KL-BEM channel estimation is conducted by superimposed pilots, followed by the removal of superimposed pilots from the received OTFS signal and equalisation by message passing (MP) algorithm. After that, the detected data symbols are utilized as pseudo pilots along with the superimposed pilots to refine both KL-BEM channel estimation and equalisation in an iterative manner. Simulation results confirm the superior performance of the proposed KL-BEM OTFS receiver over the prior art in terms of the mean-square-error (MSE) of channel estimation and bit error rate (BER). It also has a close BER performance to the BER lower bound obtained by assuming perfect channel estimation. It contributes to high spectral efficiency and fast convergence performance.

Abstract: An interferon (IFN)-anti-PD-L1 fusion protein, a pharmaceutical composition and a kit containing the same for treating tumors are disclosed. The fusion protein of the present invention can simultaneously target PD-L1 and IFN receptors, and the activation of IFN signals in a tumor microenvironment (TME) can enhance the PD-1/PD-L1 therapy against tumors by inducing stronger T cell activation. The anti-PD-L1 antibody can be used to specifically deliver immunomodulatory molecules to tumor tissues, and the fusion protein results in the generation of multiple feedforward responses, which can increase the targeting effect, reduce the toxicity, and enhance the response to IFN therapy, thereby maximizing the anti-tumor effect.

Abstract: In some embodiments a method comprises depositing a first silicon nitride layer on a top surface of a semiconductor wafer and forming one or more first gaps in the first silicon nitride layer. The one or more first gaps can relieve stress formed in the first silicon nitride layer. A first fill material is deposited on the first silicon nitride layer and the first silicon nitride layer is planarized. A second silicon nitride layer is deposited across the first silicon nitride layer and one or more second gaps are formed in the second silicon nitride layer. The one or more second gaps can relieve stress formed in the second silicon nitride layer. A second fill material is deposited across the second silicon nitride layer and the second silicon nitride layer is planarized.

Abstract: An integrated circuit (IC) chip with polish stop layers and a method of fabricating the IC chip are disclosed. The method includes forming a first IC chip having a device region and a peripheral region. Forming the first IC chip includes forming a device layer on a substrate, forming an interconnect structure on the device layer, depositing a first dielectric layer on a first portion of the interconnect structure in the peripheral region, depositing a second dielectric layer on the first dielectric layer and on a second portion of the interconnect structure in the device region, and performing a polishing process on the second dielectric layer to substantially coplanarize a top surface of the second dielectric layer with a top surface of the first dielectric layer. The method further includes performing a bonding process on the second dielectric layer to bond a second IC chip to the first IC chip.

Abstract: An integrated circuit die with two material layers having metal nano-particles and the method of forming the same are provided. The integrated circuit die includes a device layer comprising a first transistor, a first interconnect structure on a first side of the device layer, a first material layer on the first interconnect structure, wherein the first material layer comprises first metal nano-particles, and a second material layer bonded to the first material layer, wherein the second material layer comprises second metal nano-particles, and wherein the first material layer and the second material layer share an interface.

Abstract: An optical device includes a substrate, a dielectric layer on the substrate, a waveguide within the dielectric layer, a light sensitive component (e.g., a photodetector) in the dielectric layer and coupled to the waveguide, and a plurality of light isolation structures in at least one of the substrate or the dielectric layer and configured to prevent stray light from reaching the light sensitive component. In some embodiments, a light isolation structure in the plurality of light isolation structures includes two opposing sidewalls and a filling material between the two opposing sidewalls. The two opposing sidewalls include an optical isolation layer. The filling material is characterized by a coefficient of thermal expansion (CTE) matching a CTE of at least one of the substrate or the dielectric layer.

Abstract: An electro-optical device is fabricated on a semiconductor-on-insulator (SOI) substrate. The electro-optical device comprises a silicon dioxide layer, and an active layer having ferroelectric properties on the silicon dioxide layer. The silicon dioxide layer includes a first silicon dioxide layer of the SOI substrate and a second silicon dioxide layer converted from a silicon layer of the SOI substrate. The active layer includes a buffer layer epitaxially grown on the silicon layer of the SOI substrate and a ferroelectric layer epitaxially grown on the buffer layer. The electro-optical device further comprises one or more additional layers over the active layer, and first and second contacts to the active layer through at least one of the one or more additional layers. Methods of fabricating the electro-optical device are also described herein.

Abstract: An operating device is provided for a human-powered vehicle. The operating device includes a base, an operating member, a hydraulic unit and an intermediate member. The operating member is pivotally mounted to the base about a first pivot axis. The hydraulic unit is operated by the operating member to move a piston in a cylinder bore. The intermediate member is movably coupled to the operating member to move the piston from an initial position to an actuated position in response to operation of the operating member. The piston is closer to a distal end of the base where the piston is at an initial position than where the piston is at an actuated position. The cylinder bore is at least partly closer to the distal end than the first pivot axis. The intermediate member is at least partly closer to the distal end than the first pivot axis.

Abstract: A massager includes a massager main body, a driving source, a vibrating piece, and a vibrating assembly. The massager main body includes an installing portion and a massage portion connected to each other. The installing portion defines an installing cavity. The massage portion defines an accommodating cavity. The driving source is installed in the installing cavity. A first end of the vibrating piece is connected to the driving source and is driven to vibrate. A second end of the vibrating piece extends out of the installing cavity and is located on one side of the massage portion. The vibrating assembly is installed in the accommodating cavity and enables the massage portion to vibrate. The massage portion and the vibrating piece extend into a human body cavity and massage the human body cavity. A length of the vibrating piece is less than a length of the massage portion.

Abstract: Provided is a method of forming a semiconductor structure including: bonding a device wafer onto a carrier wafer; forming a support structure between an edge of the device wafer and an edge of the carrier wafer, wherein the support structure surrounds a device layer of the device wafer along a closed path; removing a substrate and a portion of a bonding dielectric layer of the device wafer from a backside of the device wafer to expose the support structures while the support structure is in place; and removing the support structure through an acid etchant.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes a first nitride-containing layer on a side of a carrier substrate, first semiconductor devices thermally coupled to the first nitride-containing layer, a first interconnect structure physically and electrically coupled to first sides of the first semiconductor devices, and a first metal-containing dielectric layer bonding the first nitride-containing layer to the first interconnect structure. A thermal conductivity of the first nitride-containing layer is greater than a thermal conductivity of the first metal-containing dielectric layer.

Abstract: An electric flusher configured to clean a private part of a human body is provided. The electric flusher includes a base, a flushing head, and a driving assembly. The base defines a mounting space therein. The flushing head is disposed on a top portion of the base. The driving assembly is mounted in the mounting space. The driving assembly is connected to the flushing head, so that the flushing head swings or rotates in a first direction. Alternatively, the electric flusher includes the base for holding, the flushing head disposed on the top portion of the base, and an FPC germicidal lamp mounted on an outer wall of the flushing head. The electric flusher is able to comprehensively clean the private part of the human body and effectively remove dirt and bacteria.