Patents by Inventor Yong Lim

Yong Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230201273
    Abstract: A novel Deinococcus radiodurans strain, an exopolysaccharide derived therefrom and a composition comprising the same are provided. In detail, a Deinococcus radiodurans BRD125 strain characterized in being deposited with accession number KCTC 13955BP, an exopolysaccharide derived therefrom and a composition comprising the same, and a method of extracting a Deinococcus radiodurans-derived exopolysaccharide are provided.
    Type: Application
    Filed: March 29, 2021
    Publication date: June 29, 2023
    Inventors: Ho-Seong SEO, Hae-Ran PARK, Sang-Yong LIM, Jong-Hyun JUNG, Chan-Yu BAEK, Ji-Hee LEE, Dong-Ho KIM, Min-Kyu KIM, Eui-Baek BYUN, Ki-Bum AHN, Ha-Yeon SONG, Hyun-Jung JI
  • Patent number: 11637034
    Abstract: An apparatus for manufacturing a display device and a method for manufacturing a display device are provided. According to an exemplary embodiment of the present disclosure, an apparatus for manufacturing a display device includes: a pressing pad including a body portion and a vision hole penetrating the body portion; a vision camera above the vision hole; and a suction picker near the pressing pad.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 25, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Sik Kim, Yong Lim Kim, Kyo Sung Lee, Seung Kuk Lee
  • Publication number: 20230116739
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a chamber comprising a support, the support configured to have mounted thereon a substrate; at least one channel disposed in the chamber and into which a conductive fluid or a non-conductive fluid is configured to be injected; and a control unit. The control unit includes a first pump and a second pump configured to respectively supply the conductive fluid and the non-conductive fluid to the at least one channel; and a first valve configured to receive the conductive fluid and the non-conductive fluid from the first pump and the second pump, respectively, and control proportions at which the conductive fluid and the non-conductive fluid are injected into the at least one channel.
    Type: Application
    Filed: July 1, 2022
    Publication date: April 13, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Hwi CHO, Sung-Yeol KIM, Mee Hyun LIM, Sung Yong LIM, Seong Ha JEONG, Woong Jin CHEON
  • Publication number: 20230099482
    Abstract: Disclosed are a flexible transparent electrode structure, a method for preparing the same, and an organic optoelectronic device using the same. The flexible transparent electrode structure includes: a flexible substrate; a thin film laminate of a triple-layer structure formed on both sides of the flexible substrate; and a transparent electrode formed on the thin film laminate of a triple-layer structure provided on one side of the flexible substrate, wherein the thin film laminate of a triple-layer structure includes a SiNx thin film, a SiOxNy thin film and a SiOx thin film formed sequentially on the flexible substrate. The flexible transparent electrode structure has superior light transmittance, water permeation resistance and oxygen permeation resistance, which can improve the electrical properties of an organic optoelectronic device.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 30, 2023
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Won-Kook CHOI, Keun Yong LIM
  • Patent number: 11616518
    Abstract: The present invention relates to an electronic device and, more particularly, to an electronic device and a method for transmitting and receiving signals.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 28, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Lim Go, Tae-Sik Yun, Sung-Chul Park
  • Publication number: 20230090656
    Abstract: A memory device includes a memory block, peripheral circuit, and control logic. The memory block includes a plurality of pages coupled to a plurality of word lines, respectively. The peripheral circuit is configured to perform a program loop including a program pulse operation of applying a program voltage to a selected word line, and a verify operation of applying at least one verify voltage corresponding to the program voltage to the selected word line and applying a verify pass voltage to unselected word lines. The control logic is configured to increase a level of the verify pass voltage applied to at least one unselected word line among the unselected word lines whenever the peripheral circuit performs the next program loop when threshold voltages of memory cells included in a page coupled to the selected word line are greater than a reference level.
    Type: Application
    Filed: February 11, 2022
    Publication date: March 23, 2023
    Applicant: SK hynix Inc.
    Inventor: Sung Yong LIM
  • Patent number: 11611315
    Abstract: A noise filtering circuit including: an amplifier which receives a reference bias through a first input terminal, generates an amplified output voltage and outputs the amplified output voltage through an output terminal, and receives an output voltage generated on the basis of the amplified output voltage through a second input terminal; a resistance component connected between the output terminal of the amplifier and the second input terminal; and a capacitor connected to the resistance component.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Mi Lee, Yong Lim, Chilun Lo
  • Publication number: 20230058110
    Abstract: A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a floating gate, and a gate. The substrate includes a source region and a drain region, and a channel region between the source region and the drain region. The floating gate is over the channel region. The floating gate includes a first conductive layer and a second conductive layer underlying the first conductive layer. The gate is adjacent to the floating gate.
    Type: Application
    Filed: August 18, 2021
    Publication date: February 23, 2023
    Inventors: KHEE YONG LIM, KIAN MING TAN
  • Publication number: 20230025506
    Abstract: The present invention provides a chimeric antigen receptor and natural killer cells expressing the same, and particularly, a chimeric antigen receptor (CAR) which includes an intracellular signaling domain including the whole or a portion of an OX40 ligand (CD252), thereby having excellent effects of increasing anticancer activity of immune cells, and immune cells expressing the same.
    Type: Application
    Filed: June 21, 2022
    Publication date: January 26, 2023
    Inventors: Yu Kyeong Hwang, Sung Yoo Cho, Sung Yong Won, Ho Yong Lim, Jung Hyun Her, Mi Young Jung, Hyun Ah Kim, Su Hyun Gwon, Eun Sol Lee, Han Sol Kim
  • Patent number: 11541109
    Abstract: The present invention relates to a method of preparing a live attenuated vaccine by irradiation and a live attenuated vaccine composition prepared by the same, and more particularly, a method of preparing a live attenuated vaccine by irradiation including irradiating a pathogenic microorganism with a dose of 0.5 to 2 kGy of radiation per single radiation six to fifteen times; and a live attenuated vaccine composition including a pathogenic microorganism attenuated to not be revertant to a wild type by generation of at least one mutation of nucleotide insertion and nucleotide deletion by irradiation.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: January 3, 2023
    Assignee: Korea Atomic Energy Research Institute
    Inventors: Ho-Seong Seo, Sang-Yong Lim, Jong-Hyun Jung
  • Publication number: 20220407538
    Abstract: An analog-to-digital converter of successive approximation register (SAR) type includes a comparator, a SAR logic circuit, and a capacitor digital-to-analog converter. The capacitor digital-to-analog converter includes a plurality of drivers. Each driver includes a capacitor and a split inverter. A first capacitor node of the capacitor is connected to one of comparison input terminals. The split inverter includes a pull-up unit connected to a first reference voltage and a pull-down unit connected to a second reference voltage. The split inverter drives a second capacitor node of the capacitor by selectively turning on one of the pull-up unit and the pull-down unit. A first one of the pull-up unit and the pull-down unit includes a full transistor, and a second one of the pull-up unit and the pull-down unit includes a first split transistor and a second split transistor. A short current is reduced using the split inverter.
    Type: Application
    Filed: March 28, 2022
    Publication date: December 22, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jaehoon LEE, Yong LIM, Seunghyun OH
  • Patent number: 11522097
    Abstract: A diode device may be provided, including a semiconductor substrate including a well region arranged therein, a first doped region and a second doped region arranged within the well region, a first contact region arranged within the first doped region, and an isolation structure arranged within the first doped region, where an oxide layer may line a surface of the isolation structure. The first doped region and the first contact region may have a first conductivity type, and the well region and the second doped region may have a second conductivity type different from the first conductivity type. A doping concentration of the first contact region may be higher than a doping concentration of the first doped region, and a part of the first doped region may be arranged between the first contact region and the well region.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 6, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Khee Yong Lim, Kiok Boone Elgin Quek, Sandipta Roy
  • Publication number: 20220375533
    Abstract: A memory device includes a memory block, a peripheral circuit, and control logic. The memory block includes memory cells. The peripheral circuit performs a program operation including a plurality of program loops. Each of the plurality of program loops includes a program pulse application operation and a verify operation. The control logic controls the peripheral circuit to store cell status information and apply a program limit voltage. The control logic sets a verify pass reference and applies the program limit voltage determined based on the cell status information.
    Type: Application
    Filed: October 28, 2021
    Publication date: November 24, 2022
    Applicant: SK hynix Inc.
    Inventors: Sung Yong LIM, Jae Il TAK
  • Patent number: 11509298
    Abstract: A comparator configured to calibrate an offset according to a control signal, including an input circuit configured to receive a first input signal and a second input signal, and to generate a first internal signal corresponding to the first input signal and a second internal signal corresponding to the second input signal; a differential amplification circuit configured to consume a supply current flowing from a positive voltage node having a positive supply voltage to a negative voltage node having a negative supply voltage, and to generate an output signal by amplifying a difference between the first internal signal and the second internal signal; and a current valve configured to adjust at least a portion of the supply current based on the control signal.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: November 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jaehoon Lee, Yong Lim, Wan Kim, Barosaim Sung, Seunghyun Oh
  • Patent number: 11500495
    Abstract: A touch display device according to one embodiment of the present disclosure includes a first drive integrated circuit configured to output a source signal and receives a touch sensing signal, and a second drive integrated circuit configured to output the source signal, wherein the first drive integrated circuit outputs the source signal in a display mode and receives the touch sensing signal in a touch sensing mode, the second drive integrated circuit outputs the source signal in the display mode, and the first drive integrated circuit and the second drive integrated circuit have the same resistance value in the display mode.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: November 15, 2022
    Assignee: LX SEMICON CO., LTD.
    Inventor: Hun Yong Lim
  • Patent number: 11462622
    Abstract: According to various embodiments, a memory cell may include a substrate of a first conductivity type, the substrate having first and second regions of a second conductivity type spaced apart and defining a channel region therebetween. The memory cell may further include a word line arranged over a portion of the channel region nearer to the first region, an erase gate arranged over the second region, a floating gate arranged over another portion of the channel region nearer to the second region and between the word line and the erase gate, and a coupling gate arranged over a top end of the floating gate. The floating gate includes the top end, a bottom end, a first side extending from the top end to the bottom end and facing the erase gate, and a second side extending from the top end to the bottom end and facing the word line.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: October 4, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Kian Ming Tan, Khee Yong Lim, Kiok Boone Elgin Quek
  • Publication number: 20220302936
    Abstract: The present invention relates to an electronic device and, more particularly, to an electronic device and a method for transmitting and receiving signals.
    Type: Application
    Filed: May 26, 2022
    Publication date: September 22, 2022
    Inventors: Yong-Lim GO, Tae-Sik YUN, Sung-Chul PARK
  • Patent number: 11444168
    Abstract: A transistor device may be provided, including a substrate; a buffer layer arranged over the substrate; a source terminal, a drain terminal, and a gate terminal arranged over the buffer layer; a barrier layer arranged over the buffer layer; and a passivation layer arranged over the barrier layer. The gate terminal may be arranged laterally between the source terminal and the drain terminal, the barrier layer may include a recess laterally between the gate terminal and the drain terminal, a part of the gate terminal may be arranged over the passivation layer and the passivation layer may extend into the recess of the barrier layer.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: September 13, 2022
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Jiacheng Lei, James Jerry Joseph, Khee Yong Lim, Lulu Peng, Lawrence Selvaraj Susai
  • Publication number: 20220239310
    Abstract: An analog-to-digital converting circuit for converting an analog signal into a digital signal includes a plurality of reference voltage generators each generating a reference voltage, a plurality of reference voltage decoupling capacitors respectively corresponding to the reference voltage generators, and an analog-to-digital converter generating a comparison voltage based on the reference voltage and generating the digital signal corresponding to the analog signal based on a result of comparing the comparison voltage with the analog signal. At least one different combination of the reference voltage generators and the reference voltage decoupling capacitors is connected to the analog-to-digital converter in each of a plurality of conversion periods.
    Type: Application
    Filed: December 29, 2021
    Publication date: July 28, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong LIM, Jaehoon LEE
  • Publication number: 20220222774
    Abstract: Disclosed herein are an apparatus and method for 360-degree video stitching. The apparatus for 360-degree video stitching includes memory for storing at least one program, and a processor for executing the program, wherein the program is configured to stitch features of multiple input images based on at least one parameter included in a 360-degree stitching function description template, and then creating a single 360-degree video, the 360-degree stitching function description template includes a configuration parameter that is an array of function parameters, the configuration parameter includes a stitching parameter, a camera parameter, a feature parameter, and a projection parameter, the feature parameter includes a method for extracting respective features from multiple input images, and the projection parameter includes a projection type that is a kind of a projection plane onto which the multiple input images are projected.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 14, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gi-Mun UM, Seong-Yong LIM, Hee-Kyung LEE