Patents by Inventor Yong Sung Eom

Yong Sung Eom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210402525
    Abstract: Provided is a wire for electric bonding, which includes a solder wire and a composition for bonding adjacent to the solder wire, the solder wire is wet when reaches to a melting point as heat is transferred, the composition for bonding includes an epoxy resin, a reducing agent, and a curing agent, the reducing agent removes a metal oxide formed on a surface of the solder wire, and the epoxy resin is cured by chemically reacting with the reducing agent and the curing agent at a curing temperature.
    Type: Application
    Filed: June 30, 2021
    Publication date: December 30, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: GWANG-MUN CHOI, Yong Sung EOM, KWANG-SEONG CHOI, Jiho JOO, CHANMI LEE, Ki Seok JANG
  • Publication number: 20210358885
    Abstract: Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.
    Type: Application
    Filed: July 28, 2021
    Publication date: November 18, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong CHOI, Yong Sung EOM, KeonSoo JANG, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20210320236
    Abstract: Provided is a method for transferring and bonding devices. The method includes applying an adhesive layer to a carrier, arranging a plurality of devices, attaching the arranged devices to the carrier, applying a polymer film to a substrate, aligning the carrier to which the plurality of devices are attached with the substrate, bonding the plurality of devices to the substrate by radiating laser, and releasing the carrier from the substrate to which the plurality of devices are bonded.
    Type: Application
    Filed: April 12, 2021
    Publication date: October 14, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jiho JOO, Yong Sung EOM, GWANG-MUN CHOI, KWANG-SEONG CHOI, CHANMI LEE, Ki Seok JANG
  • Patent number: 11107790
    Abstract: A laser bonding method includes forming a bonding part including an adhesive layer and a conductive particle disposed within the adhesive layer on a substrate; aligning a bonding target by disposing the bonding target on a surface of the bonding part opposite the substrate; disposing a pressing part on a surface of the bonding target that is opposite to the bonding part and pressing the bonding target onto the bonding part through the pressing part; heating the bonding target by irradiating at least the pressing part with a laser and conducting heat from the pressing part to the bonding target and from the bonding target to the bonding part; and bonding together the bonding part and the bonding target by the heat conducted from the bonding target to the bonding part so that the conductive particle electrically connects the substrate and the bonding target. The pressing part may be removed.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: August 31, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong Choi, Yong Sung Eom, KeonSoo Jang, Seok-Hwan Moon, Hyun-cheol Bae
  • Publication number: 20210252620
    Abstract: The present disclosure relates to a transfer and bonding method using a laser. As a plurality of devices or packages are simultaneously transferred onto a substrate from a transfer tape by irradiating a top surface of the transfer tape with a first laser, and the plurality of transferred devices or packages are simultaneously bonded to pads of a substrate by irradiating a top surface of the devices or packages with a second laser, a speed of a transfer and bonding process may be extremely maximized.
    Type: Application
    Filed: February 18, 2021
    Publication date: August 19, 2021
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: KWANG-SEONG CHOI, Yong Sung EOM, Jiho JOO, Seok-Hwan MOON, Ho-Gyeong YUN, Ki Seok JANG, GWANG-MUN CHOI
  • Publication number: 20200266078
    Abstract: Provided is a method for manufacturing a semiconductor package, the method including providing a semiconductor chip on a substrate, providing a bonding member between the substrate and the semiconductor chip, and bonding the semiconductor chip on the substrate by irradiating of a laser on the substrate. Here, the bonding member may include a thermosetting resin, a curing agent, and a laser absorbing agent.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 20, 2020
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung EOM, KWANG-SEONG CHOI, Ki Seok JANG, Seok-Hwan MOON, Jiho JOO
  • Patent number: 10636761
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: April 28, 2020
    Assignee: Electronics and Telecommunications Reearch Institute
    Inventors: Kwang-Seong Choi, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, Ieeseul Jeong, Wagno Alves Braganca Junior
  • Publication number: 20200075535
    Abstract: Provides is a laser bonding method. The method includes forming a bonding part on a substrate; aligning a bonding target on the bonding part and bonding the bonding part and the bonding target. The bonding includes heating the bonding part using a laser. The bonding part formed on the substrate includes an adhesive layer and a conductive particle located in the adhesive layer.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 5, 2020
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong CHOI, Yong Sung EOM, KeonSoo JANG, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190287870
    Abstract: The inventive concept relates to a filling composition for a semiconductor package. The filling composition for a semiconductor package may include a resin, a curing agent, and an insulating filler. The insulating filler may include a first filler body part, a second filler body part, a polymer chain coupled to the first filler body part and the second filler body part, and supramolecules coupled to the polymer chain.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 19, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: KeonSoo JANG, Yong Sung EOM, KWANG-SEONG CHOI, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190211231
    Abstract: Provided are an adhesive film, and a method of fabricating a semiconductor package using the same. The adhesive film includes a thermoplastic resin containing a hydroxyl group, a thermosetting resin, and an anhydride.
    Type: Application
    Filed: December 14, 2018
    Publication date: July 11, 2019
    Inventors: KeonSoo JANG, Yong Sung EOM, Kwang-Seong CHOI, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190067235
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Application
    Filed: August 28, 2018
    Publication date: February 28, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong CHOI, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, leeseul Jeong, Wagno Alves Braganca Junior
  • Patent number: 9980393
    Abstract: A pattern-forming method for forming a conductive circuit pattern, the pattern-forming method including the steps of: preparing a pattern-forming composition composed of: Cu powder; solder particles for electrically coupling the Cu powder; a polymer resin; a deforming agent that is selected from among acrylate oligomer, polyglycols, glycerides, polypropylene glycol, dimethyl silicon, simethinecone, tributyl phosphare, and polymethylsiloxane, and that increases bonding force between the Cu powder and the solder particles; a curing agent; and a reductant; forming a circuit pattern by printing the pattern-forming composition on a substrate; heating the circuit pattern at a temperature effective to cure the pattern-forming composition and provide the conductive circuit pattern; and electrolytically plating a metal layer onto the conductive circuit pattern. A circuit pattern having superior conductivity is formed at low cost.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: May 22, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung Eom, Kwang-Seong Choi, Hyun-cheol Bae, Jung Hyun Noh, Jong Tae Moon
  • Patent number: 9853010
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: December 26, 2017
    Assignee: ELECTGRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong Choi, Hyun-cheol Bae, Yong Sung Eom, Jin Ho Lee, Haksun Lee
  • Publication number: 20170141071
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.
    Type: Application
    Filed: December 3, 2015
    Publication date: May 18, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong CHOI, Hyun-cheol BAE, Yong Sung EOM, Jin Ho LEE, Haksun LEE
  • Patent number: 9538666
    Abstract: Provided is a bonding structure of an electronic equipment including first electrodes extended in a first direction and arranged in a second direction on a stretchable display panel having stretchability, second electrodes extended in a first direction and arranged in a second direction on a substrate and facing the first electrodes, and solder bonding parts interposed between the first electrodes and the second electrodes, facing each other in the second direction, and constituting a plurality of rows in the first direction.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: January 3, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong Choi, Hyun-cheol Bae, Haksun Lee, Yong Sung Eom
  • Publication number: 20160358892
    Abstract: Provided is a method for manufacturing a semiconductor package, which includes providing a first substrate, providing, over the first substrate, a second substrate including an active region in which a semiconductor element is disposed and a periphery region surrounding the active region, providing an adhesive membrane between the first and second substrates, and mounting the second substrate on the first substrate, wherein the mounting of the second substrate includes aligning the second substrate on the first substrate by using an alignment member protruding from the periphery region of the second substrate.
    Type: Application
    Filed: June 2, 2016
    Publication date: December 8, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Haksun LEE, KWANG-SEONG CHOI, Hyun-cheol BAE, Yong Sung EOM
  • Patent number: 9490198
    Abstract: Provided is a transmitter and receiver package including an interposer substrate including a top surface, a bottom surface facing the top surface, and a through-via, semiconductor devices mounted on the top surface of the interposer substrate, an exothermic element mounted on the bottom surface of the interposer substrate, and a heat dissipation member disposed on the bottom surface of the interposer substrate, the heat dissipation member being configured to cover the exothermic element.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Yong Sung Eom
  • Patent number: 9462736
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: October 4, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
  • Publication number: 20160094258
    Abstract: Provided are a transceiver module and a communication apparatus including the same. The transceiver module includes a lower substrate, a thermoelectric device on the lower substrate, and an upper substrate which is disposed on the thermoelectric device and on which high frequency devices cooled by the thermoelectric device are mounted. The upper substrate includes a ceramic printed circuit board (PCB).
    Type: Application
    Filed: September 17, 2015
    Publication date: March 31, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun-cheol BAE, Yong Sung EOM, Haksun LEE, KWANG-SEONG CHOI
  • Publication number: 20150364445
    Abstract: Provided is a stack module package including: a first substrate where a first device is mounted, and a second substrate where a second device is mounted. The second substrate has a greater thickness than the first substrate, and the second device has a greater thickness than the first device. The first and second devices are vertically connected to each other.
    Type: Application
    Filed: April 13, 2015
    Publication date: December 17, 2015
    Inventors: Kwang Seong CHOI, Hyun Cheol BAE, Yong Sung EOM, Haksun LEE