Patents by Inventor Yong Tae An

Yong Tae An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220278053
    Abstract: A technical idea of the present disclosure provides a semiconductor package, as a semiconductor package mounted on a circuit board, including: a body portion including a semiconductor chip, and a first surface and a second surface opposite to each other; and a structure including n insulating layers stacked on at least one of the first surface and the second surface of the body portion, wherein the semiconductor package has a predetermined target coefficient of thermal expansion (CTE), and the n insulating layers and the body portion have a thickness and a CTE satisfying a condition that an effective CTE of the semiconductor package becomes equal to the predetermined target CTE.
    Type: Application
    Filed: March 24, 2020
    Publication date: September 1, 2022
    Applicant: NEPES CO., LTD.
    Inventors: Ju Hyun NAM, Jun Kyu LEE, Yong Tae KWON, Su Yun KIM, Dong Hoon OH
  • Patent number: 11430519
    Abstract: A switching architecture provides input voltage signals from input voltage lines to a plurality of global word lines connected to word lines of a memory array in a memory device. The switching architecture includes a first switching block receiving a first set of positive voltages used to bias unselected word lines and being connected to a first output line providing a first output bias voltage, and a second switching block receiving a second set of positive voltages and a third set of negative voltages used to bias selected word lines and being connected to a second output line providing a second output bias voltage. A plurality of final switches are input connected to the first and second output lines and are output connected to a respective global word line.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: August 30, 2022
    Assignee: SK hynix Inc.
    Inventors: Marco Passerini, Giulio Maria Iadicicco, Yong Tae Kim, Moon Soo Sung, Dario Melchionni, Miriam Sangalli
  • Publication number: 20220261311
    Abstract: Provided herein is a PCIe interface device. The PCIe interface device may include a NOP DLLP generator configured to generate a No Operation (NOP) data link layer packet (DLLP) including event information representing an event in response to the occurrence of the event and a transmitter configured to transmit the NOP DLLP to an external device through a link including a plurality of lanes.
    Type: Application
    Filed: July 20, 2021
    Publication date: August 18, 2022
    Inventors: Yong Tae JEON, Gil Bong PARK, Dong Jin SEONG
  • Publication number: 20220241818
    Abstract: The present invention relates to a flat-plate focusing ultrasonic transducer and an acoustic lens composed of an annular array piezoelectric element and methods of manufacturing and designing thereof, more particularly to a flat-plate focusing ultrasonic transducer composed of an annular array piezoelectric element, wherein the annular array piezoelectric element has a plurality of concentric regions which is concentrically arranged in a concentric circle shape with respect to a center point, the concentric region has ring shaped sound insulation regions and piezoelectric regions which are alternatively formed in a direction from the center point to a radius direction, so as to focus a sound wave near a focal point, wherein the piezoelectric regions are composed of a piezoelectric ring that is composed of a piezoelectric material and thus excites a sound wave, the concentric region is in a shape of a flat-plate of which both sides are flat and which has a constant thickness, and each radius of the plurality o
    Type: Application
    Filed: May 20, 2021
    Publication date: August 4, 2022
    Inventors: Yong Tae KIM, Kyung Min BAIK, Sung Mok KIM, Hyung Jin LEE, Il DOH
  • Publication number: 20220241813
    Abstract: A slot die coating apparatus according to one embodiment of the present disclosure includes: a slot die containing a first die block and a second die block, and a sensor unit for measuring the flow rate of an electrode active material slurry which is discharged through a discharge port formed by the coupling of the first die block and the second die block, wherein the sensor unit is formed inside the first die block, and the sensor unit is connected to the discharge port via an energy dissipation part and an energy absorption part.
    Type: Application
    Filed: March 18, 2021
    Publication date: August 4, 2022
    Applicant: LG Energy Solution, Ltd.
    Inventors: Chan Woo Park, Kwan Hong Bae, Yong Tae Lee
  • Publication number: 20220210400
    Abstract: The present invention relates to a power and video redundancy system for a display system of a smartboard. More particularly, the present invention relates to a power and video redundancy system applied to a smartboard display system which minimizes the user's inconvenience due to the failure or damage of components and enables the manager to repair or change the parts without the user being aware of the loss or damage.
    Type: Application
    Filed: August 19, 2021
    Publication date: June 30, 2022
    Inventors: Yong Tae KIM, Yong Seog KIM
  • Patent number: 11364487
    Abstract: The present invention relates to a catalyst for oxygen-free direct conversion of methane and a method of converting methane using the same, and more particularly to a catalyst for oxygen-free direct conversion of methane, in which the properties of the catalyst are optimized by adjusting the free space between catalyst particles packed in a reactor, thereby maximizing the catalytic reaction rate without precise control of reaction conditions for oxygen-free direct conversion of methane, minimizing coke formation and exhibiting stable catalytic performance even upon long-term operation, and to a method of converting methane using the same.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: June 21, 2022
    Assignee: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY
    Inventors: Yong Tae Kim, Seok Ki Kim, Hyun Woo Kim, Sung Woo Lee, Seung Ju Han
  • Publication number: 20220172596
    Abstract: A wearable device for providing disaster information includes a communicator configured to receive, from a user terminal, a disaster information code obtained by coding a type of a disaster and a degree of risk of the disaster, a symbol and image generator configured to generate a symbol and an image corresponding to the disaster information code received through the communicator, and a display displaying the symbol and the image generated by the symbol and image generator.
    Type: Application
    Filed: November 19, 2021
    Publication date: June 2, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seung Hee OH, Woo Sug JUNG, Yong Tae LEE
  • Patent number: 11347634
    Abstract: A memory system includes a nonvolatile memory apparatus, and a write-same manager configured to perform a write-same operation on the nonvolatile memory apparatus, wherein the write-same manager merges a first write-same operation and a second write-same operation by comparing first operation information of the first write-same operation and second operation information of the second write-same operation.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: May 31, 2022
    Assignee: SK hynix Inc.
    Inventors: Soong Sun Shin, Yong Tae Kim
  • Publication number: 20220165648
    Abstract: Disclosed is a semiconductor package including a semiconductor chip having a first surface adjacent to an active layer and a second surface opposite to the first surface; a conductive stud disposed on the first surface of the semiconductor chip and connected to the active layer; an adhesive layer disposed on the second surface of the semiconductor chip; a conductive post disposed outside the semiconductor chip; a first redistribution structure, which is on the first surface of the semiconductor chip and includes a first redistribution insulation layer supporting the conductive stud and the conductive post; a second redistribution structure, which is on the second surface of the semiconductor chip and includes a second redistribution insulation layer disposed on the adhesive layer; and a first molding layer disposed on the first redistribution structure and surrounding the semiconductor chip, the adhesive layer, the conductive stud, and the conductive post.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 26, 2022
    Applicants: NEPES CO., LTD., NEPES LAWEH CORPORATION
    Inventors: Byung Cheol KIM, Yong Tae KWON, Hyo Gi JO, Dong Hoon OH, Jae Cheon LEE, Hyung Jin SHIN, Mary Maye Melgo Galimba
  • Publication number: 20220163751
    Abstract: The present embodiment relates to a heating device comprising: a substrate; a connection terminal electrically connected to the substrate; and a heating member electrically connected to the connection terminal, wherein the connection terminal includes a first region including an inner portion and an outer portion, a third region electrically connected to the substrate, and a second region disposed between the first region and the third region, and the heating member is disposed between the inner portion and the outer portion of the connection terminal.
    Type: Application
    Filed: March 26, 2020
    Publication date: May 26, 2022
    Inventors: Yong Tae PARK, Beom Suk YU, Min Woo LEE, Sun Min HWANG
  • Publication number: 20220148993
    Abstract: Provided is a semiconductor package including a first semiconductor chip having a bottom surface adjacent to a first active layer and an top surface opposite to the bottom surface; a first adhesive layer disposed on the top surface of the first semiconductor chip; a first conductive stud disposed on the bottom surface of the first semiconductor chip and electrically connected to the first active layer; a first conductive post disposed outside the first semiconductor chip; a redistribution structure disposed under the first semiconductor chip and including a redistribution pattern connected to the first conductive stud and the first conductive post and a redistribution insulation layer surrounding the redistribution pattern; and a molding layer surrounding the first semiconductor chip, the first adhesive layer, the first conductive stud, and the first conductive post on the redistribution structure.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 12, 2022
    Applicants: NEPES CO., LTD., NEPES LAWEH CORPORATION
    Inventors: Byung Cheol KIM, Yong Tae KWON, Hyo Gi JO, Dong Hoon OH, Jae Cheon LEE, Hyung Jin SHIN, Mary Maye Melgo Galimba
  • Publication number: 20220141328
    Abstract: The present invention relates to an emergency reporting system and method for the socially disadvantaged. The emergency reporting system for the socially disadvantaged according to the present invention includes a user terminal configured to receive an emergency report input in a preset manner according to environment information set by the socially disadvantaged, generate an emergency report message, and transmit the emergency report message, and a server configured to receive the emergency report message and transmit a dispatch notification signal.
    Type: Application
    Filed: November 2, 2021
    Publication date: May 5, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Myung Sun BAEK, Won Joo PARK, Seung Hi KIM, Yong Jin KIM, Young Soo PARK, Jun Seong BANG, Sang Yun LEE, Yong Tae LEE, Eui Suk JUNG
  • Publication number: 20220121520
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 21, 2022
    Inventors: Nam Oh HWANG, Yong-Tae KIM, Soong-Sun SHIN, Duck-Hoi KOO
  • Patent number: 11303785
    Abstract: An embodiment of a camera module may comprise: a lens part; a front body receiving the lens part; a rear body coupled to the front body; a substrate part received inside the rear body and comprising a plurality of printed circuit boards; a cable electrically connected to the substrate part; a connector part connecting the cable with the substrate part; and a first shielding part, made of a conductive material and disposed at a rear side of the connector part, for shielding electromagnetic noise generated from the substrate part or the outside.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: April 12, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Yong Tae Park, Beom Suk Yu
  • Publication number: 20220077867
    Abstract: An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.
    Type: Application
    Filed: June 3, 2021
    Publication date: March 10, 2022
    Applicants: Samsung Electronics Co., Ltd., Sogang University Research & Business Development Foundation
    Inventors: Tai Ji AN, Jun Sang PARK, Gil Cho AHN, Seung Hoon LEE, Yong Tae KIM, Kee Ho RYU, Seung Hoon LEE, Je Min JEON
  • Publication number: 20220060018
    Abstract: An improved EMS (Energy Management System) of ESS (Energy Storage System)—connected photovoltaic power system is provided, where the economic efficiency of the microgrid power transaction is maximized by minimizing the amount paid to the power system as a result of optimal operation as to the energy supply and demand in the process of transacting power surplus/shortage with the power system, the responsiveness to passive resource energy forecasting of supply and demand is improved by resolving the uncertainty of solar power generation forecasting and load forecasting, the deterioration of the available storage capacity of ESS is minimized, and contribution to solving the nation's power supply shortage is made by the operation based on the detailed identification of energy storage status of ESS.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 24, 2022
    Inventors: Sooyoung Jung, Yong Tae Yoon, Miran Jung, Jun Ho Huh
  • Publication number: 20220043068
    Abstract: The present invention relates to a method and an apparatus for diagnosing low voltage of a secondary battery cell. The method for diagnosing low voltage of a secondary battery cell according to an embodiment of the present invention includes pre-aging a battery cell, charging the battery cell according to a preset charging condition, measuring a parameter for determining low voltage failure of the battery cell, comparing the measured parameter with a reference parameter, and performing formation when the battery cell is determined to be normal.
    Type: Application
    Filed: October 4, 2019
    Publication date: February 10, 2022
    Applicant: LG CHEM, LTD.
    Inventors: Yong Tae LEE, Myung Hoon KO, Jee Ho KIM, Gyung Soo KANG
  • Patent number: 11237908
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: February 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Nam Oh Hwang, Yong-Tae Kim, Soong-Sun Shin, Duck-Hoi Koo
  • Patent number: 11234731
    Abstract: An access sheath is provided. The access sheath comprises: an outer sheath extending in one direction and having a cavity formed along a longitudinal axis of the outer sheath; and an inner sheath arranged in the cavity of the outer sheath, and having a plurality of balloons configured to expand, wherein the outer sheath includes: an outer body formed of a first material; and an elastic connection part formed of a second material which is more flexible than the first material of the outer body, and wherein a diameter of the outer sheath increases by the elastic connection part which expands according to an expansion of the balloons.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: February 1, 2022
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jung Ki Jo, Tae Ho Lim, Sung Yul Park, Hae Young Park, Yong Tae Kim, Hong Sang Moon, Hong Yong Choi, Seung Wook Lee, Yoon Je Lee