Patents by Inventor Yong Tae An

Yong Tae An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220027113
    Abstract: The present invention relates to an apparatus and method for controlling automatic color calibration of a video wall by smoothly displaying an entire video on the video wall and improving user visibility. The automatic color calibration apparatus comprises a control unit configured to output the number of the plurality of video boards constituting the video wall to the display unit and store the number in a storage unit according to operation signals from the user input unit, and perform automatic color calibration for the plurality of video boards.
    Type: Application
    Filed: July 21, 2021
    Publication date: January 27, 2022
    Inventors: Yong Tae KIM, Yong Seog KIM
  • Publication number: 20210398869
    Abstract: A semiconductor package includes an upper structure including a semiconductor chip and a first molding layer for molding the semiconductor chip, a lower structure provided on the upper structure, the lower structure including a conductive post and a second molding layer for molding the conductive post, and a redistribution structure provided between the upper structure and the lower structure, the redistribution structure including a wiring pattern for electrically connecting a pad of the semiconductor chip to the conductive post, in which a thermal expansion coefficient of the second molding layer is different from a thermal expansion coefficient of the first molding layer.
    Type: Application
    Filed: October 17, 2019
    Publication date: December 23, 2021
    Applicant: NEPES CO., LTD.
    Inventors: Su Yun KIM, Dong Hoon OH, Yong Tae KWON, Jun Kyu LEE, Kyeong Rok SHIN, Yong Woon YEO
  • Publication number: 20210394317
    Abstract: A method of operating a fastening apparatus includes: a fastening apparatus preparing step of preparing a fastening apparatus including n fastening tools; a first workpiece disposing step of disposing a first workpiece having m fastening holes at one side of the fastening apparatus; a first fastening tool disposing step of disposing each of the n fastening tools above any one of the m fastening holes; and a first storage step of storing, in a control unit, positions of the n fastening tools in the first fastening tool disposing step, in which m is larger than n, and a plurality of first fastening tool disposing steps and a plurality of first storage steps are alternately performed.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 23, 2021
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION
    Inventors: Jun Hyeok BAE, Do Kyoung JI, Se Hoon HAM, Dong Ho KWAK, Yong Tae KIM
  • Publication number: 20210391615
    Abstract: A secondary battery according to the present invention comprises: an electrode assembly in which a first electrode, a separator, and a second electrode are alternately stacked and wound together; a can provided with an accommodation part that accommodates the electrode assembly therein, the can comprising a first can and a second can, which have cylindrical shapes opened in a direction facing each other; and an insulator configured to insulate an overlapping portion between the first can and the second can. The first can forms a first electrode terminal that directly contacts an end of the first electrode, and the second can forms a second electrode terminal that directly contacts an end of the second electrode.
    Type: Application
    Filed: October 1, 2019
    Publication date: December 16, 2021
    Applicant: LG Chem, Ltd.
    Inventors: Ki Youn Kim, Jee Ho Kim, Myung Hoon Ko, Jung Il Park, Yong Tae Lee, Gyung Soo Kang
  • Publication number: 20210391973
    Abstract: Interface devices and systems that include interface devices are disclosed. In some implementations, a device includes a transceiver configured to transmit and receive data, a lane margining controller in communication with the transceiver and configured to control the transceiver to transmit, through a margin command, to an external device, a request for requesting a state of an elastic buffer of the external device, and control the transceiver to receive the state of the elastic buffer of from the external device, and a port setting controller adjust a clock frequency range of a spread spectrum clocking scheme based on the state of the elastic buffer.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 16, 2021
    Inventors: Yong Tae JEON, Dae Sik PARK, Jae Young JANG, Byung Cheol KANG, Seung Duk CHO
  • Patent number: 11200237
    Abstract: Some embodiments are associated with an analytics cloud environment. A user interface may facilitate generation of an advanced formulas planning script by a user. The advanced formulas planning script may be stored, for example, in a planning script data store. An analytic data cube may contain a multidimensional dataset usable for analysis via queries. A conversion platform may receive the advanced formulas planning script and automatically create a structured query language stored procedure based on the advanced formulas planning script. The conversion platform may then execute the structured query language stored procedure on the analytic data cube to calculate a result comprising a base cell and at least one cell has a different point of view associated with the analytic data cube as compared to a calculation source. The calculated result man then be provided to the user.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: December 14, 2021
    Assignee: SAP SE
    Inventors: Yong-Tae Lim, Seok taek Lim, Hongchul Kim, Sang Mook Choi, Jungsoo Seo
  • Publication number: 20210376392
    Abstract: A secondary battery comprises an electrode assembly including a first electrode, a separator, and a second electrode alternately stacked and wound about a central axis. A first non-coating portion that is not coated with an electrode active material protrudes farther than the separator in a first direction along the central axis and a second non-coating portion that is not coated with the electrode active material protrudes farther than the separator in a second, opposite direction along the central axis. The first non-coating portion contacts a first connection part disposed on an end of a first can of the battery, and the second non-coating portion contacts a second connection part disposed on an end of a second can. At least one of the first connection part or the second connection part comprises a protrusion having a shape protruding towards the electrode assembly.
    Type: Application
    Filed: October 1, 2019
    Publication date: December 2, 2021
    Applicant: LG Chem, Ltd.
    Inventors: Jung Il Park, Jee Ho Kim, Yong Tae Lee, Myung Hoon Ko, Ki Youn Kim, Gyung Soo Kang
  • Publication number: 20210366458
    Abstract: The present invention relates to an ultra-thin acoustic lens for subwavelength focusing in a megasonic range and a design method thereof. More particularly, the present invention relates to a super-oscillatory planar ultra-thin acoustic lens for subwavelength focusing in the megasonic range, which includes a plurality of concentric regions arranged in a concentric shape with reference to the center point, wherein the concentric regions include a plurality acoustic insulation region for insulating incident acoustic waves, and a plurality of transmission regions for transmitting acoustic waves, the acoustic insulation regions and the transmission regions being formed alternatively in a radial direction from the center point so as to focus incident acoustic wave energy onto a subwavelength region.
    Type: Application
    Filed: May 30, 2018
    Publication date: November 25, 2021
    Applicant: Korea Research Institute of Standard and Science
    Inventors: Jae-yub Hyun, Yong-tae Kim, Il Doh, Bong-young Ahn, Kyung-min Baik, Se-hwa Kim
  • Publication number: 20210346871
    Abstract: The present disclosure relates to a catalyst for direct nonoxidative conversion of methane and a method of preparing the same, and more particularly to a method of preparing a catalyst for direct nonoxidative conversion of methane, in which a catalyst optimized for the direct conversion reaction of methane can be easily prepared without precise control of the reaction conditions for direct conversion of methane, thereby simultaneously maximizing the catalytic reaction rate and minimizing coke formation, and exhibiting stable catalytic performance even after long-term operation, and to a catalyst for direct nonoxidative conversion of methane prepared using the above method.
    Type: Application
    Filed: September 24, 2019
    Publication date: November 11, 2021
    Inventors: Yong Tae KIM, Sung Woo LEE, Seung Ju HAN, Seok Ki KIM, Hyun Woo KIM
  • Publication number: 20210347749
    Abstract: The present invention relates to a novel p62 ligand compound, a stereoisomer, hydrate, solvate or prodrug thereof, and a pharmaceutical or food composition for preventing or treating proteinopathies comprising the same as an active ingredient. The p62 ligand compound according to the present invention can be usefully used as a pharmaceutical composition for the prevention, amelioration or treatment of various proteinopathies by activating autophagy in cells and thus selectively eliminating in vivo proteins, organelles and aggregates.
    Type: Application
    Filed: July 24, 2019
    Publication date: November 11, 2021
    Applicant: PROTECH Co., Ltd.
    Inventors: Yong Tae Kwon, Chang Hoon Ji, Srinivasrao GANIPISETTI, Hee Yeon KIM, Su Ran Mun, Chan Hoon Jung, Eui Jung Jung, Ki Woon Sung
  • Patent number: 11169871
    Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks and a controller for controlling the nonvolatile memory device. A plurality of management blocks includes first and second management blocks managed by the controller. The second management block stores start data and then stores integrity data. The first management block stores a storage location of the second management block. An integrity checker checks integrity of data associated with the first and second management blocks.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: November 9, 2021
    Assignee: SK hynix Inc.
    Inventors: Jang Hwan Jun, Duck Hoi Koo, Soong Sun Shin, Yong Tae Kim, Yong Chul Kim, Cheon Ok Jeong
  • Publication number: 20210344087
    Abstract: A secondary battery comprises an electrode assembly, a can, and an insulator. The electrode assembly includes a first electrode, a separator, and a second electrode alternately stacked and wound. The can has an accommodation part accommodating the electrode assembly therein, and the can comprises a first can and a second can having cylindrical shapes open in a direction facing each other. The insulator insulates an overlapping portion between the first can and the second can. The first can is electrically connected to the first electrode, and the second can is electrically connected to the second electrode. The insulator has a short-circuit induction through-part defined by a through-hole or a cutoff line, such that a short circuit occurs between the first can and the second can through the short-circuit induction through-part when it is deformed in shape as heat or a pressure is applied to contract or expand the insulator.
    Type: Application
    Filed: October 4, 2019
    Publication date: November 4, 2021
    Applicant: LG Chem, Ltd.
    Inventors: Gyung Soo Kang, Jee Ho Kim, Yong Tae Lee, Myung Hoon Ko, Jung Il Park, Ki Youn Kim
  • Publication number: 20210343656
    Abstract: A semiconductor package includes a semiconductor chip including a chip pad, a first insulating layer provided on the semiconductor chip and including a first via hole, a first wiring pattern provided on the first insulating layer and connected to the chip pad through the first via hole of the first insulating layer, a second insulating layer provided on the first insulating layer and the first wiring pattern and including a second via hole, and a second wiring pattern provided on the second insulating layer and connected to the first wiring pattern through the second via hole of the second insulating layer, wherein the first insulating layer includes a first upper surface in contact with the second insulating layer and a first lower surface opposite to the first upper surface, and the first upper surface of the first insulating layer has surface roughness greater that the first lower surface of the first insulating layer.
    Type: Application
    Filed: September 26, 2019
    Publication date: November 4, 2021
    Applicant: Nepes Co., Ltd.
    Inventors: Yong Tae KWON, Jun Kyu Lee, Dong Hoon OH, Su Yun KIM, Kyeong Rok SHIN
  • Patent number: 11158668
    Abstract: Disclosed in an embodiment is a display device comprising a panel substrate and a plurality of semiconductor devices disposed on the panel substrate, wherein the panel substrate includes first and second regions disposed in a first direction, the plurality of semiconductor devices include a plurality of first semiconductor devices disposed in the first region and a plurality of second semiconductor devices disposed in the second region, the wavelength deviation between the first semiconductor device disposed at the edge of the first region and the second semiconductor device disposed at the edge of the second region is within 2 nm, and the wavelength pattern of the plurality of first semiconductor devices in the first direction is the same as the wavelength pattern of the plurality of second semiconductor devices in the first direction.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 26, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sang Youl Lee, Chung Song Kim, Yong Tae Moon, Ji Hyung Moon, Sun Woo Park, Hyeon Min Cho
  • Publication number: 20210299253
    Abstract: The present invention relates to a novel AUTOTAC chimeric compound in which a new p62 ligand and a target-binding ligand are connected by a linker, a stereoisomer, hydrate, solvate or prodrug thereof, and a pharmaceutical or food composition for the prevention or treatment of diseases by degrading the target protein including the same as an active ingredient. They can target specific proteins to adjust their concentrations, and can also deliver drugs and other small molecule compounds to lysosomes. The AUTOTAC chimeric compound according to the present invention can be usefully used as a pharmaceutical composition for the prevention, amelioration or treatment of various diseases by selectively eliminating specific proteins.
    Type: Application
    Filed: July 24, 2019
    Publication date: September 30, 2021
    Applicant: PROTECH Co., Ltd.
    Inventors: Yong Tae Kwon, Chang Hoon Ji, Srinivasrao GANIPISETTI, Hee Yeon KIM, Su Ran Mun, Chan Hoon Jung, Eui Jung Jung, Ki Woon Sung
  • Publication number: 20210303456
    Abstract: A memory system includes a nonvolatile memory apparatus, and a write-same manager configured to perform a write-same operation on the nonvolatile memory apparatus, wherein the write-same manager merges a first write-same operation and a second write-same operation by comparing first operation information of the first write-same operation and second operation information of the second write-same operation.
    Type: Application
    Filed: August 4, 2020
    Publication date: September 30, 2021
    Inventors: Soong Sun SHIN, Yong Tae KIM
  • Publication number: 20210292813
    Abstract: According to an exemplary embodiment of the present application, provided is a nucleic acid complex pair, which includes a first nucleic acid complex including a first determinant and a second tag; and a second nucleic acid complex including a second determinant and a second tag, wherein the first determinant includes a forward primer for first target DNA, the second determinant includes a reverse primer for the first target DNA, the first tag includes a base sequence complementary to the base sequence of the second tag, and the second tag includes a base sequence complementary to the base sequence of the first tag.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 23, 2021
    Inventors: Yong Tae Kim, Jun Hye Moon
  • Publication number: 20210288005
    Abstract: A semiconductor package includes a semiconductor chip having at least one chip pad disposed on one surface thereof; a wiring pattern disposed on top of the semiconductor chip and having at least a portion thereof in contact with the chip pad to be electrically connected to the chip pad; and a solder bump disposed on outer surface of the wiring pattern to be electrically connected to the chip pad through the wiring pattern.
    Type: Application
    Filed: February 19, 2021
    Publication date: September 16, 2021
    Applicant: Nepes CO., LTD.
    Inventors: Hyun Sik KIM, Seung Hwan SHIN, Yong Tae KWON, Dong Hoon SEO, Hee Cheol KIM, Dong Soo LEE
  • Publication number: 20210287747
    Abstract: A switching architecture provides input voltage signals from input voltage lines to a plurality of global word lines connected to word lines of a memory array in a memory device. The switching architecture includes a first switching block receiving a first set of positive voltages used to bias unselected word lines and being connected to a first output line providing a first output bias voltage, and a second switching block receiving a second set of positive voltages and a third set of negative voltages used to bias selected word lines and being connected to a second output line providing a second output bias voltage. A plurality of final switches are input connected to the first and second output lines and are output connected to a respective global word line.
    Type: Application
    Filed: March 9, 2021
    Publication date: September 16, 2021
    Applicant: SK hynix Inc.
    Inventors: Marco Passerini, Giulio Maria Iadicicco, Yong Tae KIM, Moon Soo SUNG, Dario Melchionni, Miriam Sangalli
  • Publication number: 20210279455
    Abstract: Provided are an object tracking system and an object tracking method.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 9, 2021
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sungwon BYON, Eun Jung KWON, Hyunho PARK, Won-Jae SHIN, Dong Man JANG, Eui Suk JUNG, Yong Tae LEE