Abstract: The invention, in part, provides a method of (and corresponding apparatus for) receiving (and similarly transmitting) data signals over data lines. Such a method of receiving comprises: organizing said data lines into groups, each group having N input data signals and M reference signals, wherein N is a non-zero, positive integer; associating M reference signals on M reference lines with each group of N input data lines, wherein M is a non-zero, positive integer and N>M; and receiving data on said data lines and reference signals on said reference lines; and determining, for each group, data values on said data lines according to differences between signal parameters on said N data lines and signal parameters on said M reference lines, respectively.

Abstract: A current mode comparator for a semiconductor device is disclosed. The current mode comparator may include a logic circuit coupled to a voltage sensing node, a first cascode coupled to the voltage sensing node and a first power node, and a second cascode coupled to the voltage sensing node and a second power node. The logic circuit may convert a voltage of the voltage sensing node to an output signal.

Abstract: A digital/analog converting driver and a digital/analog converting method, in which the digital/analog converting driver converts digital data having M+N (M and N are integers) bits into an analog voltage and includes a first converting unit, a second converting unit, and an analog voltage outputting unit. The first converting unit converts successive M bits of the digital data into a first voltage. The second converting unit converts successive N bits of the digital data into a second voltage. The analog voltage outputting unit adds the first voltage and the second voltage and outputs the added voltage as the analog voltage. The output range of the first voltage is different from that of the second voltage.

Abstract: A digital to analog converter (DAC) converting digital data into a corresponding analog voltage is disclosed.

Abstract: A pseudo differential current mode receiver includes a regulated cascode buffer for buffering a received data current to generate a buffered data current with cascode-reduced input impedance and cascode-increased output impedance. In addition, a signal converter generates an output signal indicating a difference between the buffered data current and a reference current. The reference current may also be received and buffered by a regulated cascode buffer with cascode-reduced input impedance and cascode-increased output impedance.

Abstract: Embodiments of methods and apparatus for receiving data are disclosed. More particularly, methods of receiving a current mode signal, which can improve a signal to noise ratio (SNR) according to a change in a power supply voltage, and current mode comparators and semiconductor devices that use the methods are provided. A method of receiving a current mode signal includes receiving a reference current signal and a data current signal through a channel and generating a sensing voltage based on a difference between the reference current signal and the data current signal, varying a transconductance to reduce an input resistance of the current mode comparator in inverse proportion to an increase in a power supply voltage supplied to the current mode comparator, and converting the sensing voltage into a CMOS level output signal using the current mode comparator.

Abstract: Embodiments of the invention provide a digital-to-analog converter (DAC) that is configured to process upper data bits, a control data bit, and a lower data bit using two decoders and a control logic. The resulting DAC provides high resolution output using a minimum circuit area. Embodiments of the invention also provide a sample and hold circuit for a DAC that reduces the effects of parasitic capacitance at the input of an operational amplifier (OP-AMP).

Abstract: A digital to analog converter (DAC) converting digital data into a corresponding analog voltage is disclosed.

Abstract: Provided are a receiver and a transceiver for multi-level current-mode signaling, which together may reduce the number of bus lines and increase a data bandwidth. A transmitter transmits one reference current and a multi-level data current. On the basis of the reference current signal received from the transmitter, a receiver generates plural internal reference currents for determining the multi-level data current received from the transmitter, and converting the received multi-level data current into a data voltage having the desired level corresponding to the data that was transmitted.

Abstract: A regulated cascode amplifier includes a main cascode amplifier and a feed-back amplifier. The main cascode amplifier has an input transistor coupled in a stack with an output transistor at an input control node. The feed-back amplifier including a plurality of transistors with gates of the transistors being coupled together to the input control node and with drains of the transistors being coupled together at a gate of the output transistor. The transistors of the feed-back amplifier are biased from connections to the main cascode amplifier for smaller chip area.

Abstract: A device for controlling the level of a transmission signal according to the channel loading is provided. The device may include a plurality of semiconductor devices and a controller to control the plurality of semiconductor devices. The controller may control the level of a signal to be transmitted to each of the plurality of semiconductor devices according to the channel loading on each semiconductor device.

Abstract: A source driving circuit for a display device may include a first latch configured to store first video data corresponding to a first horizontal line and a second latch configured to store second video data corresponding to a second horizontal line following the first horizontal line. The first and second latches may alternately store video data of different horizontal lines. The source driving circuit may further include a digital-to-analog converter (DAC) configured to convert the stored first and second video data into analog signals, a first sample-and-hold circuit configured to sample and store an output signal of the DAC, a second sample-and-hold circuit configured to sample and store an output signal of the first sample-and-hold circuit, and an output switch configured to provide an output signal of the second sample-and-hold circuits to the display panel.

Abstract: A current mode comparator for a semiconductor device is disclosed. The current mode comparator may include a logic circuit coupled to a voltage sensing node, a first cascode coupled to the voltage sensing node and a first power node, and a second cascode coupled to the voltage sensing node and a second power node. The logic circuit may convert a voltage of the voltage sensing node to an output signal.

Abstract: Provided is a current-mode semiconductor integrated circuit device that operates in a voltage mode during a test mode. The current-mode semiconductor integrated circuit device includes a first transmitting converter, a first receiving converter, a second transmitting converter, and a second receiving converter. During the test mode, one of a first signal path and a second signal path is selected according to the location of the chip. In the first signal path, the first transmitting converter, the first receiving converter, and the second transmitting converter operate. In the second signal path, the second transmitting converter, the second receiving converter, and the first transmitting converter operate. Each of the first and second transmitting converters receives a test voltage signal and converts it into a current signal. Each of the first and second receiving converters generates a reference voltage signal, compares it with the test voltage signal, and outputs the comparing result.

Abstract: A liquid crystal display (LCD) source driving circuit having a reduced circuit footprint. A plurality of the LCD source driving circuits are typically disposed along a side of an LCD panel and drives the LCD panel in response to digital image signals, such as color signals R, G, B, and control signals received from a control circuit. Also, the LCD source driving circuit includes a plurality of latch circuits, a plurality of level shifters, a plurality of Positive voltage digital-to-analog decoders, a plurality of Negative voltage digital-to-analog decoders, a plurality of multiplexor (MUX) circuits, and a plurality of amplifiers. Thus, the LCD source driving circuit is capable of selectively latching digital image signals using the latch circuits with MUX circuit functions, thereby reducing the circuit footprint of source vertical channels within the LCD source driving circuit.

Abstract: A current mode transmitter includes a first sink current path, through which a current flows from an output port according to a first bias voltage, a charge error canceller, which supplies a current from a high power supply voltage to a current control port in response to an input signal and counteracts a variation of a second bias voltage in response to an inverted input signal, which has an opposite polarity to that of the input signal, and the second bias voltage, and a second sink current path, which sinks current supplied from the output port in response to the second bias voltage and the inverted input signal, the second sink current path being controlled by the current control port. The input signal and the inverted input signal are complementary.

Abstract: A thin film transistor liquid crystal display (TFT-LCD) source driver for implementing a self burn-in test and a self burn-in test method are provided. The TFT-LCD source driver includes a self burn-in signal generator that generates a self burn-in signal and a burn-in load signal, a burn-in data generator that generates a burn-in data signal and a burn-in polarity control signal in response to the self burn-in signal and a clock signal. The TFT-LCD source driver also includes first and second switching units. The first switching unit transmits the burn-in load signal as an internal load signal, transmits the burn-in data signal as an internal digital data signal, and transmits the burn-in polarity control signal as an internal polarity control signal, in response to activation of the self burn-in signal. The second switching unit transmits outputs of output drivers to all channels of the TFT-LCD source driver in response to the internal load signal.

Abstract: Provided are a delay locked loop (DLL) using an oscillator and a counter and a clock synchronizing method. The DLL converts cycle information of an input clock signal into digital information using the oscillator and the counter and generates output clock signals from the input clock signal using the digital information after a predetermined delay time elapses. The output clock signals each have a duty cycle of 50%.

Abstract: Provided are a receiver and a transceiver for multi-level current-mode signaling, which together may reduce the number of bus lines and increase a data bandwidth. A transmitter transmits one reference current and a multi-level data current. On the basis of the reference current signal received from the transmitter, a receiver generates plural internal reference currents for determining the multi-level data current received from the transmitter, and converting the received multi-level data current into a data voltage having the desired level corresponding to the data that was transmitted.

Abstract: A source driver of a display panel includes a channel state signal generator, first switches, and second switches. The channel state signal generator generates first and second channel state signals that are each activated for a respective time period depending on adjustable state length data. The first switches are opened for uncoupling channel output signals from source lines of the display panel when the first channel state signal is activated. The second switches are closed for coupling together the source lines of the display panel for charge sharing when the second channel state signal is activated.