Abstract: After the surface of a Si substrate 1 has been pretreated, an SiGeC layer 2 is formed on the Si substrate 1 using an ultrahigh vacuum chemical vapor deposition (UHV-CVD) apparatus. During this process step, the growth temperature of the SiGeC layer 2 is set at 490° C. or less and Si2H6, GeH4 and SiH3CH3 are used as Si, Ge and C sources, respectively, whereby the SiGeC layer 2 with good crystallinity can be formed.

Abstract: A heterojunction bipolar transistor is fabricated by stacking a Si collector layer, a SiGeC base layer and a Si emitter layer in this order. By making the amount of a lattice strain in the SiGeC base layer on the Si collector layer 1.0% or less, the band gap can be narrower than the band gap of the conventional practical SiGe (the Ge content is about 10%), and good crystalline can be maintained after a heat treatment. As a result, a narrow band gap base with no practical inconvenience can be realized.

Abstract: In the method for fabricating a semiconductor device of the present invention, a collector layer of a first conductivity type is formed in a region of a semiconductor substrate sandwiched by device isolation. A collector opening is formed through a first insulating layer deposited on the semiconductor substrate so that the range of the collector opening covers the collector layer and part of the device isolation. A semiconductor layer of a second conductivity type as an external base is formed on a portion of the semiconductor substrate located inside the collector opening, while junction leak prevention layers of the same conductivity type as the external base are formed in the semiconductor substrate. Thus, the active region is narrower than the collector opening reducing the transistor area, while minimizing junction leak.

Abstract: A Si1−xGex/Si1−yCy short-period superlattice which functions as a single SiGeC layer is formed by alternately growing Si1−xGex layers (0<x<1) and Si1−yCy layers (0<y<1) each having a thickness corresponding to several atomic layers which is small enough to prevent discrete quantization levels from being generated. This provides a SiGeC mixed crystal which is free from Ge—C bonds and has good crystalline quality and thermal stability. The Si1−xGex/Si1−yCy short-period superlattice is fabricated by a method in which Si1−xGex layers and Si1−yCy layers are epitaxially grown alternately, or a method in which a Si/Si1−xGex short-period superlattice is first formed and then C ions are implanted into the superlattice followed by annealing for allowing implanted C ions to migrate to Si layers.

Abstract: In a bipolar transistor block, a base layer (20a) of SiGe single crystals and an emitter layer (26) of almost 100% of Si single crystals are stacked in this order over a collector diffused layer (9). Over both edges of the base layer (20a), a base undercoat insulating film (5a) and base extended electrodes (22) made of polysilicon are provided. The base layer (20a) has a peripheral portion with a thickness equal to that of the base undercoat insulating film (5a) and a center portion thicker than the peripheral portion. The base undercoat insulating film (5a) and gate insulating films (5b and 5c) for a CMOS block are made of the same oxide film. A stress resulting from a difference in thermal expansion coefficient between the SiGe layer as the base layer and the base undercoat insulating film 5a can be reduced, and a highly reliable BiCMOS device is realized.