Abstract: Provided is a thermal insulation laminate having both of an excellent thermal insulation property and high visible light transmittance, and further having a provided antifouling property and an excellent scratch resistance. A thermal insulation laminate includes a photocatalytic layer (4); a transparent thermal insulation layer (10) having two transparent base plates (1, 1) and composite materials including a fiber assembly (2) and inorganic particles (3) therebetween; and an adhesive layer (5); the photocatalytic layer (4) is an outermost layer of one side thereof, and the adhesive layer (5) is an outermost layer of other side. A hard coat layer may be sandwiched in either at least one of between the photocatalytic layer (4) and the transparent thermal insulation layer (10), and between the transparent thermal insulation layer (10) and the adhesive layer (5).

Abstract: Disclosed is a composite substrate, which is provided with an inorganic insulating sintered substrate, which has a heat conductivity of 5 W/m·K or more, and a volume resistivity of 1×108 ?·cm or more, and a single crystal semiconductor film, or a composite substrate, which is provided with the inorganic insulating sintered substrate, a single crystal semiconductor film, and a thin layer configured of at least one kind of material selected from among an oxide, a nitride, and an oxynitride, said thin layer being provided between the inorganic insulating sintered substrate and the single crystal semiconductor film. According to the present invention, a low-cost composite substrate with suppressed metal impurity contamination can be provided using an inorganic insulating sintered body, which is opaque to visible light, and which has excellent heat conductivity, and furthermore, a small loss in a high frequency region.

Abstract: The present invention relates to a method for producing a nanocarbon film using a hybrid substrate with which a nanocarbon film free from defects can be produced at low cost. This method is characterized in forming an ion implantation region by implanting ion into a single crystal silicon carbide substrate from a surface thereof and after bonding together the surface of the silicon carbide substrate implanted with ion and a surface of a base substrate, releasing the silicon carbide substrate at the ion implanted region to produce a hybrid substrate in which a thin film that includes the single crystal silicon carbide is transferred onto the base substrate, and then heating the hybrid substrate to sublime silicon atoms from the thin film that includes the single crystal silicon carbide so as to obtain the nanocarbon film.

Abstract: A hybrid substrate has an SOI structure having a good silicon active layer, without defects such as partial separation of the silicon active layer is obtained without trimming the outer periphery of the substrate. An SOI substrate is obtained by sequentially laminating a first silicon oxide film and a silicon active layer in this order on a silicon substrate. A terrace portion that does not have the silicon active layer is formed in the outer peripheral portion of the silicon substrate surface. A second silicon oxide film is formed on the silicon active layer surface of the SOI substrate The bonding surfaces of the SOI substrate and a supporting substrate that has a thermal expansion coefficient different from that of the SOI substrate is subjected to an activation treatment. The SOI substrate and the supporting substrate are bonded with the second silicon oxide film being interposed therebetween.

Abstract: Provided is a beta-type zeolite which has a high catalytic activity and is not easily deactivated. The beta-type zeolite of the invention has a substantially octahedral shape, has a Si/Al ratio of 5 or more, and is a proton-type zeolite. The Si/Al ratio is preferably 40 or more. This beta-type zeolite is preferably obtained by transforming a raw material beta-type zeolite synthesized without using a structure directing agent into an ammonium-type zeolite through ion exchange, then, exposing the beta-type zeolite to water vapor, and subjecting the exposed beta-type zeolite to an acid treatment.

Abstract: The present invention relates to a method for producing a nanocarbon film using a hybrid substrate with which a nanocarbon film free from defects can be produced at low cost. This method is characterized in forming an ion implantation region by implanting ion into a single crystal silicon carbide substrate from a surface thereof and after bonding together the surface of the silicon carbide substrate implanted with ion and a surface of a base substrate, releasing the silicon carbide substrate at the ion implanted region to produce a hybrid substrate in which a thin film that includes the single crystal silicon carbide is transferred onto the base substrate, and then heating the hybrid substrate to sublime silicon atoms from the thin film that includes the single crystal silicon carbide so as to obtain the nanocarbon film.

Abstract: An inductor array chip includes a magnetic laminated body and a plurality of inductors. The magnetic laminated body includes a plurality of stacked magnetic layers. The plurality of inductors are arranged inside the magnetic laminated body. The inductance of a first inductor differs from the inductance of a second inductor. The inductors include a plurality of coil-shaped conductors and via-hole conductors. The plurality of coil-shaped conductors are arranged between the magnetic layers. The via-hole conductors electrically connect the plurality of coil-shaped conductors. The inductors include a plurality of inductors in which the section sizes of the coil-shaped conductors differ from one another.

Abstract: A method for producing hybrid substrates which can be incorporated into a semiconductor production line involves: forming an ion-injection region (3) by injecting ions from the surface of a silicon substrate (1); adhering the ion-injection surface of the silicon substrate and the surface of a sapphire substrate (4) to one another directly or with an insulating film (2) interposed therebetween; and then obtaining a hybrid substrate (8) having a silicon thin-film (semiconductor layer; 6) on the sapphire substrate (4), by detaching the silicon substrate (1) in the ion-injection region (3). This method is characterized in that the adhering to the silicon substrate (1) occurs after the sapphire substrate (4) is heat-treated in advance in a reducing atmosphere.

Abstract: A method for producing SOS substrates which can be incorporated into a semiconductor production line, and is capable of producing SOS substrates which have few defects and no variation in defects, and in a highly reproducible manner, or in other words, a method for producing SOS substrates by: forming an ion-injection region (3) by injecting ions from the surface of a silicon substrate (1); adhering the ion-injection surface of the silicon substrate (1) and the surface of a sapphire substrate (4) to one another directly or with an insulating film (2) interposed therebetween; and then obtaining an SOS substrate (8) having a silicon layer (6) on the sapphire substrate (4), by detaching the silicon substrate in the ion-injection region (3). This method is characterized in that the orientation of the sapphire substrate (4) is a C-plane having an off-angle of 1 degree or less.

Abstract: There is disclosed a method for manufacturing an SOI wafer comprising: a step of implanting at least one of a hydrogen ion and a rare gas ion into a donor wafer to form an ion implanted layer; a step of bonding an ion implanted surface of the donor wafer to a handle wafer; a step of delaminating the donor wafer at the ion implanted layer to reduce a film thickness of the donor wafer, thereby providing an SOI layer; and a step of etching the SOI layer to reduce a thickness of the SOI layer, wherein the etching step includes: a stage of performing rough etching as wet etching; a stage of measuring a film thickness distribution of the SOI layer after the rough etching; and a stage of performing precise etching as dry etching based on the measured film thickness distribution of the SOI layer. There can be provided A method for manufacturing an SOI wafer having high film thickness uniformity of an SOI layer with excellent productivity.

Abstract: The present invention relates to a heat dissipation substrate, which is a composite substrate composed of two layers, and which is characterized in that a surface layer (first layer) (1) is configured of single crystal silicon and a handle substrate (second layer) (2) is configured of a material that has a higher thermal conductivity than the first layer. A heat dissipation substrate of the present invention has high heat dissipation properties.

Abstract: Disclosed is a composite substrate, which is provided with an inorganic insulating sintered substrate, which has a heat conductivity of 5 W/m·K or more, and a volume resistivity of 1×108 ?·cm or more, and a single crystal semiconductor film, or a composite substrate, which is provided with the inorganic insulating sintered substrate, a single crystal semiconductor film, and a thin layer configured of at least one kind of material selected from among an oxide, a nitride, and an oxynitride, said thin layer being provided between the inorganic insulating sintered substrate and the single crystal semiconductor film. According to the present invention, a low-cost composite substrate with suppressed metal impurity contamination can be provided using an inorganic insulating sintered body, which is opaque to visible light, and which has excellent heat conductivity, and furthermore, a small loss in a high frequency region.

Abstract: Provided is a beta-type zeolite which has a high catalytic activity and is not easily deactivated. The beta-type zeolite of the invention has a substantially octahedral shape, has a Si/Al ratio of 5 or more, and is a proton-type zeolite. The Si/Al ratio is preferably 40 or more. This beta-type zeolite is preferably obtained by transforming a raw material beta-type zeolite synthesized without using a structure directing agent into an ammonium-type zeolite through ion exchange, then, exposing the beta-type zeolite to water vapor, and subjecting the exposed beta-type zeolite to an acid treatment.

Abstract: The present invention relates to a corrosion-resistant multilayer ceramic member consisting at least of: a ceramic support substrate; an electrode layer formed on the ceramic support substrate; a power-supply member connected to the electrode layer; an insulating protection layer formed on the ceramic support substrate to cover the electrode layer; and a ceramic protection substrate of which at least a part is provided on the insulating protection layer. Thereby, there is provided a long-life corrosion-resistant multilayer ceramic member excellent in corrosion resistance even when exposed to a corrosive gas.

Abstract: A method of manufacturing a laminated wafer is provided by forming a silicon film layer on a surface of an insulating substrate comprising the steps in the following order of: applying a surface activation treatment to both a surface of a silicon wafer or a silicon wafer to which an oxide film is layered and a surface of the insulating substrate followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer at a temperature of 200° C. to 350° C., and thinning the silicon wafer by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: A method of manufacturing a laminated substrate is provided. The method includes: forming an oxide film on at least a surface of a first substrate having a hardness of equal to or more than 150 GPa in Young's modulus, and then smoothing the oxide film; implanting hydrogen ions or rare gas ions, or mixed gas ions thereof from a surface of a second substrate to form an ion-implanted layer inside the substrate, laminating the first substrate and the second substrate through at least the oxide film, and then detaching the second substrate in the ion-implanted layer to form a laminated substrate; heat-treating the laminated substrate and diffusing outwardly the oxide film.

Abstract: Provided is a thermal insulation laminate having both of an excellent thermal insulation property and high visible light transmittance, and further having a provided antifouling property and an excellent scratch resistance. A thermal insulation laminate includes a photocatalytic layer (4); a transparent thermal insulation layer (10) having two transparent base plates (1, 1) and composite materials including a fiber assembly (2) and inorganic particles (3) therebetween; and an adhesive layer (5); the photocatalytic layer (4) is an outermost layer of one side thereof, and the adhesive layer (5) is an outermost layer of other side. A hard coat layer may be sandwiched in either at least one of between the photocatalytic layer (4) and the transparent thermal insulation layer (10), and between the transparent thermal insulation layer (10) and the adhesive layer (5).

Abstract: In a manufacturing method for manufacturing a silicon on insulator (SOI) wafer, an ion injection layer is formed within the wafer, by injecting a hydrogen ion or a rare gas ion from a surface of the single crystal silicon wafer, the ion injection surface of the single crystal silicon wafer and/or a surface of the transparent insulation substrate is processed using plasma and/or ozone, the ion injection surface of the single crystal silicon wafer is bonded to the surface of the transparent insulation substrate, by bringing them into close contact with each other at room temperature, with the processed surface(s) as bonding surface(s), and an SOI layer is formed on the transparent insulation substrate, by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer.

Abstract: A method for revitalizing worn and fatigued silicon carbide powder thermally reacted it continuously with a mixture of silicon oxide powder and/or carbon powder and a boron and carbon-containing additive in a non-oxidizing atmosphere at a temperature higher than 1850 degrees C. but lower than 2400 degrees C.

Abstract: An inductor array chip includes a magnetic laminated body and a plurality of inductors. The magnetic laminated body includes a plurality of stacked magnetic layers. The plurality of inductors are arranged inside the magnetic laminated body. The inductance of a first inductor differs from the inductance of a second inductor. The inductors include a plurality of coil-shaped conductors and via-hole conductors. The plurality of coil-shaped conductors are arranged between the magnetic layers. The via-hole conductors electrically connect the plurality of coil-shaped conductors. The inductors include a plurality of inductors in which the section sizes of the coil-shaped conductors differ from one another.