Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: A method of manufacturing a laminated wafer is provided by forming a silicon film layer on a surface of an insulating substrate comprising the steps in the following order of: applying a surface activation treatment to both a surface of a silicon wafer or a silicon wafer to which an oxide film is layered and a surface of the insulating substrate followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer at a temperature of 200° C. to 350° C., and thinning the silicon wafer by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: To provide a method of manufacturing a laminated wafer by which a strong coupling is achieved between wafers made of different materials having a large difference in thermal expansion coefficient without lowering a maximum heat treatment temperature as well as in which cracks or chips of the wafer does not occur. A method of manufacturing a laminated wafer 7 by forming a silicon film layer on a surface 4 of an insulating substrate 3 comprising the steps in the following order of: applying a surface activation treatment to both a surface 2 of a silicon wafer 1 or a silicon wafer 1 to which an oxide film is layered and a surface 4 of the insulating substrate 3 followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer 5 at a temperature of 200° C. to 350° C., and thinning the silicon wafer 1 by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: A pellicle for lithography according to the present invention comprises a pellicle film (10) of single crystal silicon, and the pellicle film (10) is supported by a support member (20) including an outer frame portion (20a) and a porous portion (mesh structure) (20b) that occupies an inner area surrounded by the outer frame portion (20a). In order to prevent oxidation of surfaces of the pellicle film 10, anti-oxidizing films 30a and 30b are provided to cover portions where the single crystal silicon film is exposed to the outside. The support member (20) can be obtained by processing a handle substrate of an SOI substrate, and the pellicle film (10) of single crystal silicon can be obtained from an SOI layer of the SOI substrate. Since the pellicle film (10) is tightly coupled to the support member (20), sufficient mechanical strength can be assured.

Abstract: A method for easily manufacturing a transparent SOI substrate having: a main surface with a silicon film formed thereon; and a rough main surface located on a side opposite to a side where the silicon film is formed. A method for manufacturing transparent SOI substrate, having a silicon film formed on a first main surface of the transparent insulating substrate, while a second main surface of the transparent insulating substrate, an opposite to the first main surface, is roughened. The method includes at least the steps of: roughening the first main surface with an RMS surface roughness lower than 0.7 nm and the second main surface with an RMS surface roughness higher than the surface roughness of the first main surface to prepare the transparent insulating substrate; and forming the silicon film on the first main surface of the transparent insulating substrate.

Abstract: Provided is a method for manufacturing an SOI wafer, which is capable of: efficiently removing an ion-implanted defect layer existing in an ion implanted layer in the vicinity of a peeled surface peeled by an ion implantation peeling method; ensuring the in-plane uniformity of a substrate; and also achieving cost reduction and higher throughput. The method for manufacturing an SOI wafer includes at least the steps of: bonding a silicon wafer with or without an oxide film onto a handle wafer to prepare a bonded substrate, wherein the silicon wafer has an ion implanted layer formed by implanting hydrogen ions and/or rare gas ions into the silicon wafer; peeling the silicon wafer along the ion implanted layer, thereby transferring the silicon wafer onto the handle wafer to produce a post-peeling SOI wafer; immersing the post-peeling SOI wafer in an aqueous ammonia-hydrogen peroxide solution; and performing a heat treatment at a temperature of 900° C.

Abstract: It is an object of the present invention to provide a photomask unit suitable for forming a microscopic pattern of 32 nm or smaller on a photoresist film using the EUV exposure technique and being able to reliably prevent the flatness of a photomask from being lowered. The photomask unit 1 according to the present invention includes a pellicle membrane 6, a pellicle frame 7 onto one surface of which a region of the pellicle membrane 6 in the vicinity of side portions of the pellicle membrane 6 is fixed, a photomask 2 and a stage 3 onto one surface of which the photomask 2 and the pellicle frame 7 are fixed, and the pellicle frame 7 is fixed onto the stage 3 at a region outside of a region of the stage 3 onto which the photomask 2 is fixed.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: Provided is a method for manufacturing a bonded wafer with a good thin film over the entire substrate surface, especially in the vicinity of the lamination terminal point. The method for manufacturing a bonded wafer comprises at least the following steps of: forming an ion-implanted region by implanting a hydrogen ion or a rare gas ion, or the both types of ions from a surface of a first substrate which is a semiconductor substrate; subjecting at least one of an ion-implanted surface of the first substrate and a surface of a second substrate to be attached to a surface activation treatment; laminating the ion-implanted surface of the first substrate and the surface of the second substrate in an atmosphere with a humidity of 30% or less and/or a moisture content of 6 g/m3 or less; and a splitting the first substrate at the ion-implanted region so as to reduce thickness of the first substrate, thereby manufacturing a bonded wafer with a thin film on the second substrate.

Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

Abstract: There is disclosed a method for manufacturing an SOI wafer comprising at least: implanting a hydrogen ion, a rare gas ion, or both the ions into a donor wafer formed of a silicon wafer or a silicon wafer having an oxide film formed on a surface thereof from a surface of the donor wafer, thereby forming an ion implanted layer; performing a plasma activation treatment with respect to at least one of an ion implanted surface of the donor wafer and a surface of a handle wafer, the surface of the handle wafer is to be bonded to the ion implanted surface; closely bonding these surfaces to each other; mechanically delaminating the donor wafer at the ion implanted layer as a boundary and thereby reducing a film thickness thereof to provide an SOI layer, and performing a heat treatment at 600 to 1000° C.; and polishing a surface of the SOI layer for 10 to 50 nm based on chemical mechanical polishing.

Abstract: A plasma treatment or an ozone treatment is applied to the respective bonding surfaces of the single-crystal Si substrate in which the ion-implanted layer has been formed and the quartz substrate, and the substrates are bonded together. Then, a force of impact is applied to the bonded substrate to peel off a silicon thin film from the bulk portion of single-crystal silicon along the hydrogen ion-implanted layer, thereby obtaining an SOI substrate having an SOI layer on the quartz substrate. A concave portion, such as a hole or a micro-flow passage, is formed on a surface of the quartz substrate of the SOI substrate thus obtained, so that processes required for a DNA chip or a microfluidic chip are applied. A silicon semiconductor element for the analysis/evaluation of a sample attached/held to this concave portion is formed in the SOI layer.

Abstract: Hydrogen ions are implanted to a surface (main surface) of the single crystal Si substrate 10 at a dosage of 1.5×1017 atoms/cm2 or higher to form the hydrogen ion implanted layer (ion-implanted damage layer) 11. As a result of the hydrogen ion implantation, the hydrogen ion implanted boundary 12 is formed. The single crystal Si substrate 10 and the low melting glass substrate 20 are bonded together. The bonded substrate is heated at relatively low temperature, 120° C. or higher and 250° C. or lower (below a melting point of the support substrate). Further, an external shock is applied to delaminate the Si crystal film along the hydrogen ion implanted boundary 12 of the single crystal Si substrate 10 out of the heat-treated bonded substrate. Then, the surface of the resultant silicon thin film 13 is polished to remove a damaged portion, so that a semiconductor substrate can be fabricated.

Abstract: Ion injection is performed to a single crystal silicon wafer to form an ion injection layer, with the ion injection surface of the single crystal silicon wafer and/or the surface of the transparent insulation substrate are/is processed using plasma and/or ozone. The ion injection surface of the single crystal silicon wafer and the surface of the transparent insulation substrate are bonded to each other by bringing them into close contact with each other at room temperature. A silicon on insulator (SOI) wafer is obtained by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer, to form an SOI layer on the transparent insulation substrate, and thermal processing for flattening the SOI layer surface is performed to the SOI wafer, under an atmosphere of an inert gas, a hydrogen gas, and a mixture gas of them.

Abstract: A method for producing a single crystal silicon solar cell including the steps of: implanting ions into a single crystal silicon substrate; conducting a surface activating treatment for at least one of: the ion implanting surface of the single crystal silicon substrate, and a surface of the transparent insulator substrate; bonding the ion implanting surface of the single crystal silicon substrate and the transparent insulator substrate to each other, such that the surface(s) subjected to the surface activating treatment is/are used as a bonding surface(s); applying an impact to the ion implanted layer; and forming a plurality of diffusion regions having a second conductivity type at the delaminated surface side of the single crystal silicon layer, such that a plurality of first conductivity-type regions and second conductivity-type regions are present at the delaminated surface of the single crystal silicon layer.

Abstract: A method for producing a single crystal silicon solar cell including the steps of: implanting ions into a single crystal silicon substrate through an ion implanting surface thereof; closely contacting the single crystal silicon substrate and a transparent insulator substrate with each other via a transparent adhesive while using the ion implanting surface as a bonding surface; curing the transparent adhesive; applying an impact to the ion implanted layer to mechanically delaminate the single crystal silicon substrate; forming a plurality of diffusion regions having a second conductivity type at the delaminated surface side of the single crystal silicon layer, such that a plurality of first conductivity-type regions and second conductivity-type regions are present at the delaminated surface of the single crystal silicon layer; forming pluralities of individual electrodes on the pluralities of first and second conductivity-type regions, respectively; and forming collector electrodes for the individual electrode