Abstract: An imaging device includes a pixel and a voltage generation circuit. The pixel is configured to operate based on a power source voltage and a reference voltage that is lower than the power source voltage and is higher than or equal to a ground voltage. The voltage generation circuit is configured to generate a predetermined positive voltage that is higher than the reference voltage and is lower than the power source voltage. A transfer transistor of the pixel is formed on a well. The predetermined positive voltage is applied to the well. The transfer transistor is configured to operate based on the power source voltage and the reference voltage.

Abstract: A booster apparatus includes a voltage conversion control circuit configured to generate second power supply voltage, based on the ground voltage, first power supply voltage, and a driving clock signal. The voltage conversion control circuit includes: a booster circuit configured to generate the second power supply voltage based on an input booster clock signal; a clock buffer configured to generate the booster clock signal and output the generated booster clock signal to the booster circuit; and a voltage comparator that includes: a first voltage generation circuit configured to generate a first signal with a first voltage level; a second voltage generation circuit configured to generate a second signal with a second voltage level; and a comparator configured to compare the first voltage level and the second voltage level and control input of the driving clock signal to be supplied to the clock buffer based on a comparison result.

Abstract: An AD conversion device includes a comparison circuit, an upper-level DA conversion circuit, a level shift circuit, a lower-level DA conversion circuit, and a correction device. The comparison circuit includes a first terminal and a second terminal. The comparison circuit is configured to compare a first voltage level of a signal input to the first terminal with a second voltage level of a signal input to the second terminal. The upper-level DA conversion circuit includes a plurality of capacitance elements electrically connected to the second terminal. Capacitive values of the plurality of capacitance elements are weighted by binary numbers. The level shift circuit includes one or more capacitance elements electrically connected to the second terminal. The lower-level DA conversion circuit includes a plurality of capacitance elements electrically connected to the second terminal.

Abstract: A voltage generation circuit includes a booster circuit, a control buffer circuit, and a driving buffer circuit. The booster circuit includes a capacitance element and a transistor. The booster circuit generates a higher first voltage than the power source voltage, and the control buffer circuit controls the transistor by using a third voltage that is lower than the first voltage and is higher than a ground voltage. Alternatively, the booster circuit generates a lower second voltage than the ground voltage, and the control buffer circuit controls the transistor by using a fourth voltage that is higher than the second voltage and is lower than or equal to the ground voltage.

Abstract: In an imaging system, a differential signal transmission circuit is configured to output a first signal to a first signal line in an image output period and is configured to output a second signal to a second signal line in the image output period. The first signal and the second signal are included in a differential signal. A signal output circuit is configured to output a second clock signal to the first signal line in a blanking period different from the image output period and is configured to output a second control signal to the second signal line in the blanking period. In a PLL, connection between a charge pump and a loop filter is controlled on the basis of the second control signal output to the second signal line.

Abstract: An imaging device includes a voltage generation circuit and an output circuit. The voltage generation circuit includes a first capacitance element including a fifth terminal. The voltage generation circuit is configured to provide the fifth terminal with a first voltage in accordance with a power source voltage so as to store an electric charge in the first capacitance element. The voltage generation circuit is configured to increase a voltage of the fifth terminal by a second voltage in accordance with the power source voltage so as to generate a control voltage having a greater absolute value than an absolute value of the power source voltage. The output circuit is configured to output the control voltage to at least one of a gate terminal of a reset transistor of a pixel and a gate terminal of a transfer transistor of the pixel.

Abstract: In an AD conversion circuit, a comparator is configured to compare a first voltage of a first input terminal with a second voltage of a second input terminal. A reset circuit is configured to reset a voltage of the first input terminal of the comparator and a voltage of the second input terminal of the comparator when a second analog signal is input to the first input terminal of the comparator. A first signal generation circuit is configured to generate the second analog signal having a third voltage higher or lower than a voltage of a first analog signal. The first analog signal is input to the first input terminal of the comparator after the voltage of the first input terminal of the comparator and the voltage of the second input terminal of the comparator are reset.

Abstract: An endoscope system includes an imaging element, a voltage-current conversion circuit, a first coaxial cable, and an impedance conversion circuit. The imaging element generates a first voltage. The voltage-current conversion circuit is disposed inside or outside the imaging element and converts the first voltage into a first current. The first coaxial cable has a first conductor and a second conductor. The second conductor is disposed outside the first conductor. The first current is transmitted through the first conductor. The first current transmitted through the first conductor is input to the impedance conversion circuit. The impedance conversion circuit outputs a second current according to the first current. A second voltage according to the first current is input to the second conductor.

Abstract: An AD conversion device includes a comparison circuit, an upper-level DA conversion circuit, a level shift circuit, a lower-level DA conversion circuit, and a correction device. The comparison circuit includes a first terminal and a second terminal. The comparison circuit is configured to compare a first voltage level of a signal input to the first terminal with a second voltage level of a signal input to the second terminal. The upper-level DA conversion circuit includes a plurality of capacitance elements electrically connected to the second terminal. Capacitive values of the plurality of capacitance elements are weighted by binary numbers. The level shift circuit includes one or more capacitance elements electrically connected to the second terminal. The lower-level DA conversion circuit includes a plurality of capacitance elements electrically connected to the second terminal.

Abstract: A booster apparatus includes a voltage conversion control circuit configured to generate second power supply voltage, based on the ground voltage, first power supply voltage, and a driving clock signal. The voltage conversion control circuit includes: a booster circuit configured to generate the second power supply voltage based on an input booster clock signal; a clock buffer configured to generate the booster clock signal and output the generated booster clock signal to the booster circuit; and a voltage comparator that includes: a first voltage generation circuit configured to generate a first signal with a first voltage level; a second voltage generation circuit configured to generate a second signal with a second voltage level; and a comparator configured to compare the first voltage level and the second voltage level and control input of the driving clock signal to be supplied to the clock buffer based on a comparison result.

Abstract: An AD conversion circuit includes a comparison circuit, a first DA conversion circuit including a plurality of resistance elements, and a first voltage output circuit. A comparator of the comparison circuit outputs a signal that represents a result of comparing a first voltage of a first input terminal with a second voltage of a second input terminal. A first combined resistance value of the first DA conversion circuit and the first voltage output circuit seen from a second terminal of the first capacitance element is a first value when the first capacitance element holds a first signal. The first combined resistance value is a second value when the comparator compares the first voltage with the second voltage. The first value is less than the second value.

Abstract: In an imaging system, a differential signal transmission circuit is configured to output a first signal to a first signal line in an image output period and is configured to output a second signal to a second signal line in the image output period. The first signal and the second signal are included in a differential signal. A signal output circuit is configured to output a second clock signal to the first signal line in a blanking period different from the image output period and is configured to output a second control signal to the second signal line in the blanking period. In a PLL, connection between a charge pump and a loop filter is controlled on the basis of the second control signal output to the second signal line.

Abstract: In an AD conversion circuit, a comparator is configured to compare a first voltage of a first input terminal with a second voltage of a second input terminal. A reset circuit is configured to reset a voltage of the first input terminal of the comparator and a voltage of the second input terminal of the comparator when a second analog signal is input to the first input terminal of the comparator. A first signal generation circuit is configured to generate the second analog signal having a third voltage higher or lower than a voltage of a first analog signal. The first analog signal is input to the first input terminal of the comparator after the voltage of the first input terminal of the comparator and the voltage of the second input terminal of the comparator are reset.

Abstract: An AD conversion circuit includes a comparison circuit, a first DA conversion circuit including a plurality of resistance elements, and a first voltage output circuit. A comparator of the comparison circuit outputs a signal that represents a result of comparing a first voltage of a first input terminal with a second voltage of a second input terminal, A first combined resistance value of the first DA conversion circuit and the first voltage output circuit seen from a second terminal of the first capacitance element is a first value when the first capacitance element holds a first signal. The first combined resistance value is a second value when the comparator compares the first voltage with the second voltage. The first value is less than the second value.

Abstract: An imaging device includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a plurality of pixels. Each pixel block includes all of the pixels disposed in one or more columns in an array of the plurality of pixels. The second substrate includes a plurality of AD conversion circuits configured to convert a pixel signal read from two or more pixels belonging to the pixel block corresponding to the AD conversion circuit to a digital signal. For all combinations of two pixel blocks adjacent to each other in the first substrate, two AD conversion circuits corresponding to the adjacent two pixel blocks are adjacent to each other in the second substrate.

Abstract: A signal transmission circuit includes an impedance conversion circuit and a current-voltage conversion circuit. A first current is input to the impedance conversion circuit. The impedance conversion circuit outputs a second current according to the first current. The current-voltage conversion circuit converts the second current output from the impedance conversion circuit into a voltage. The impedance conversion circuit includes a first current source and a current output circuit. The first current source generates a reference current. The current output circuit outputs the second current according to the difference between the first current and the reference current or the sum of the first current and the reference current.

Abstract: An imaging device includes a plurality of pixels, a reference current generation circuit, a differential current generation circuit, a reference voltage generation circuit, a conversion circuit, and an output circuit. The differential current generation circuit generates a differential current according to a difference between a pixel current and a reference current. The conversion circuit converts the differential current into an output voltage on the basis of a first reference voltage. A second reference voltage is higher than the tint reference voltage when the output voltage at the time of resetting of the pixels is higher than the output voltage at the time of exposure of the pixels. The second reference voltage is lower than the first reference voltage when the output voltage at the time of resetting of the pixels is lower than the output voltage at the time of exposure of the pixels.

Abstract: An analog-to digital (AD) conversion circuit includes a digital-to-analog (DA) conversion circuit, an arithmetic circuit, and a comparison circuit. The DA conversion circuit generates a first reference current signal. The arithmetic circuit is electrically connected to the DA conversion circuit and generates a comparison current signal by adding the first reference current signal to a first current signal generated in accordance with a first voltage signal or subtracting the first reference current signal from the first current signal. The comparison circuit is electrically connected to the arithmetic circuit and outputs digital data based on a result of comparing a second current signal according to a second voltage signal with the comparison current signal.

Abstract: An encoding circuit includes a clock generating unit having a delay circuit in which n (n is a power of 2) delay units are connected together a latch unit configured to latch the plurality of delayed signals; and an encoding unit configured to encode state of each of the plurality of delayed signals, wherein the encoding unit encodes the state of each of the plurality of delayed signals by performing: a first operation of determining a position at which logic states of two or more delayed signals in a signal group change from High to Low, a second operation of determining a position at which logic states of two or more delayed signals in the signal group change from Low to High, and a third operation of determining that logic states of two or more signals including at least one delayed signal in the signal group are predetermined states.

Abstract: An imaging device includes an imaging unit, a reference signal generation unit, m (m is an integer of 3 or more) number of column delay units, and a plurality of column AD conversion units. The plurality of column delay units is arranged so as to correspond to two or more and less than m of the column AD conversion units. Each of the plurality of column delay units includes a first delay circuit. The first delay circuit generates a plurality of first delay clocks. The column AD conversion unit includes a comparison unit, a latch unit, and a counter unit. The comparison unit compares a pixel signal with a reference signal, and outputs a control signal corresponding to a comparison result. The latch unit includes a plurality of latch circuits that latches the plurality of first delay clocks on the basis of a state change of the control signal.