Patents by Inventor Yoshiyuki Kondo

Yoshiyuki Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9224850
    Abstract: In one embodiment, a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich a gate electrode, a diffusion layer of the second conductivity type coming in contact with the first and second element isolation insulator films and having an upper surface in a position deeper than lower surfaces of the first and second main terminal regions, a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer. The second well region has a impurity concentration higher than that of the first well region.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: December 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masakazu Goto, Shigeru Kawanaka, Akira Hokazono, Tatsuya Ohguro, Yoshiyuki Kondo
  • Patent number: 9059235
    Abstract: In one embodiment, a semiconductor device includes a substrate including a trench, and a gate electrode disposed at a position adjacent to the trench on the substrate, the gate electrode having a first side surface located on an opposite side of the trench, and a second side surface located on the same side as the trench. The device further includes a first sidewall insulator disposed on the first side surface, and a second sidewall insulator disposed on the second side surface and a side surface of the trench. The device further includes a source region of a first conductivity type disposed in the substrate on the same side as the first sidewall insulator with respect to the first side surface, and a drain region of a second conductivity type disposed in the substrate on the same side as the second sidewall insulator with respect to the second side surface.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 16, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki Kondo, Shigeru Kawanaka
  • Patent number: 9048267
    Abstract: A semiconductor device according to the present embodiment includes a semiconductor layer. A gate dielectric film is provided on a surface of the semiconductor layer. A gate electrode is provided on the semiconductor layer via the gate dielectric film. A drain layer of a first conductivity type is provided in a part of the semiconductor layer on a side of a first end of the gate electrode. A source layer of a second conductivity type is provided in a part of the semiconductor layer on a side of a second end of the gate electrode and below the gate electrode. The source layer has a substantially uniform impurity concentration at the part of the semiconductor layer below the gate electrode. Voltages of a same polarity are applied to the gate electrode and the drain layer.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: June 2, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki Kondo, Masakazu Goto, Shigeru Kawanaka, Toshitaka Miyata
  • Publication number: 20150129960
    Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate, and first and second transistors of first and second conductivity types on the substrate. The first transistor includes a first gate electrode on the substrate, a first source region of the second conductivity type and a first drain region of the first conductivity type disposed to sandwich the first gate electrode, and a first channel region of the first or second conductivity type disposed between the first source region and the first drain region. The second transistor includes a second gate electrode on the substrate, a second source region of the first conductivity type and a second drain region of the second conductivity type disposed to sandwich the second gate electrode, and a second channel region disposed between the second source region and the second drain region and having the same conductivity type as the first channel region.
    Type: Application
    Filed: February 12, 2014
    Publication date: May 14, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira HOKAZONO, Masakazu GOTO, Yoshiyuki KONDO
  • Publication number: 20150129925
    Abstract: A semiconductor device includes a semiconductor layer opposing to a bottom surface and a side surface of a gate electrode. An insulation film is provided between the bottom surface of the gate electrode and the semiconductor layer and between the side surface of the gate electrode and the semiconductor layer. A first conduction-type drain layer is provided in the semiconductor layer on a side of an end part of one of the bottom surface and the side surface of the gate electrode. A second conduction-type source layer is provided in the semiconductor layer opposing to the other one of the bottom surface and the side surface of the gate electrode. A second conduction-type extension layer is provided in the semiconductor layer opposing to a corner part between the side surface and the bottom surface of the gate electrode and has a lower impurity concentration than that of the source layer.
    Type: Application
    Filed: February 4, 2014
    Publication date: May 14, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki KONDO, Masakazu GOTO
  • Publication number: 20150076553
    Abstract: A semiconductor device according to the present embodiment includes a semiconductor layer. A gate dielectric film is provided on a surface of the semiconductor layer. A gate electrode is provided on the semiconductor layer via the gate dielectric film. A drain layer of a first conductivity type is provided in a part of the semiconductor layer on a side of a first end of the gate electrode. A source layer of a second conductivity type is provided in a part of the semiconductor layer on a side of a second end of the gate electrode and below the gate electrode. The source layer has a substantially uniform impurity concentration at the part of the semiconductor layer below the gate electrode. Voltages of a same polarity are applied to the gate electrode and the drain layer.
    Type: Application
    Filed: December 31, 2013
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiyuki KONDO, Masakazu GOTO, Shigeru KAWANAKA, Toshitaka MIYATA
  • Publication number: 20150040003
    Abstract: A first receiving operation receives specific position information from a first communication. A first determination operation determines whether block position information corresponding to the specific position indicated by the received specific position information is included in first block information stored in a storage device. A setting operation sets a magnification factor of a target block image in response to a case in which it is determined that the block position information corresponding to the specific position is included in the first block information. A processing operation processes the target block image based on the set magnification factor. A display operation displays the processed target block image on the display.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Dzulkhiflee Bin Hamzah Muhammed, Yoshiyuki Kondo
  • Publication number: 20150015661
    Abstract: There is provided a conference system which performs a remote conference by communicating conference data between a transmission terminal and a reception terminal. The transmission terminal receives input of the conference data including audio data, selects a real time mode of sequentially performing transmission of the input audio data and a package mode of performing transmission of the input audio data for each input of a predetermined unit amount, records the input audio data in the predetermined unit amount to generate audio record data when the package mode is selected, and transmits the input audio data to the reception terminal when the real time mode is selected and transmits the audio record data to the reception terminal when the package mode is selected. The reception terminal outputs the received input audio data preferentially over the received audio record data.
    Type: Application
    Filed: September 29, 2014
    Publication date: January 15, 2015
    Inventor: Yoshiyuki Kondo
  • Patent number: 8881690
    Abstract: A steam generator having a heat transfer tube group formed of a plurality of U-shaped heat transfer tubes; an annular channel formed to cover the circumference of the heat transfer tube group; the annular channel having an opening that communicates with the heat transfer tube group; a water supply unit disposed at an upper portion of the annular channel and supplies water to a descending-side portion; a steam/water separator disposed above the heat transfer tube group; and an air bubble removing member for removing air bubbles provided in the annular channel.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: November 11, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Yoshiyuki Kondo, Koichi Tanimoto, Toshiyuki Mizutani, Kengo Shimamura, Ryoichi Kawakami
  • Publication number: 20140291736
    Abstract: In one embodiment, a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich a gate electrode, a diffusion layer of the second conductivity type coming in contact with the first and second element isolation insulator films and having an upper surface in a position deeper than lower surfaces of the first and second main terminal regions, a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer. The second well region has a impurity concentration higher than that of the first well region.
    Type: Application
    Filed: August 1, 2013
    Publication date: October 2, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masakazu GOTO, Shigeru KAWANAKA, Akira HOKAZONO, Tatsuya OHGURO, Yoshiyuki KONDO
  • Patent number: 8841191
    Abstract: In one embodiment, a semiconductor device includes a substrate, a gate insulator on the substrate, and a gate electrode on the gate insulator. The device further includes a source diffusion layer of a first conductivity type and a drain diffusion layer of a second conductivity type disposed on a surface of the substrate so as to sandwich the gate electrode. The device further includes a junction forming region disposed between the source diffusion layer and the drain diffusion layer so as to contact the source diffusion layer. The junction forming region includes a source extension layer of the first conductivity type, a pocket layer of the second conductivity type above the source extension layer, and a diffusion suppressing layer disposed between the source extension layer and the pocket layer and containing carbon so as to suppress diffusion of impurities between the source extension layer and the pocket layer.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: September 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Hokazono, Yoshiyuki Kondo, Toshitaka Miyata
  • Patent number: 8841728
    Abstract: In one embodiment, a semiconductor device includes a first diffusion layer of a first conductivity type and a second diffusion layer of a second conductivity type that are provided in a semiconductor layer at a distance, the second conductivity type being an opposite conductivity type of the first conductivity type, a first insulating film and a second insulating film that are provided on the semiconductor layer between the first diffusion layer and the second diffusion layer at a distance, a gate electrode provided on the first insulating film, and a threshold regulating electrode provided on the second insulating film.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: September 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Kondo, Akira Hokazono
  • Publication number: 20140225170
    Abstract: In one embodiment, a semiconductor device includes a first diffusion layer of a first conductivity type and a second diffusion layer of a second conductivity type that are provided in a semiconductor layer at a distance, the second conductivity type being an opposite conductivity type of the first conductivity type, a first insulating film and a second insulating film that are provided on the semiconductor layer between the first diffusion layer and the second diffusion layer at a distance, a gate electrode provided on the first insulating film, and a threshold regulating electrode provided on the second insulating film.
    Type: Application
    Filed: June 17, 2013
    Publication date: August 14, 2014
    Inventors: Yoshiyuki KONDO, Akira HOKAZONO
  • Publication number: 20140209863
    Abstract: In one embodiment, a semiconductor device includes a first diffusion layer of a first conductive type and a second diffusion layer of a second conductive type which is a reverse conductive type of the first conductive type, the first conductive type first diffusion layer and the second conductive type diffusion layer being spaced apart and provided in a semiconductor layer, a pocket region of the second conductive type which is provided on a surface portion of the semiconductor layer adjacently to the first diffusion layer, and a first extension region of the first conductive type which is provided in the semiconductor layer to cover at least a portion of the pocket region. A second diffusion layer side end portion of the first extension region is positioned closer to a second diffusion layer side than a second diffusion layer side end portion of the pocket region.
    Type: Application
    Filed: June 17, 2013
    Publication date: July 31, 2014
    Inventors: Yoshiyuki KONDO, Akira HOKAZONO
  • Patent number: 8741014
    Abstract: In a multi-stage steam-water separation device and a steam-water separator, a first swirl vane (6) which causes a gas-liquid two-phase flow to rise while swirling is provided in a first riser (5) of a first steam-water separator (2), and a second swirl vane (12) which causes the gas-liquid two-phase flow which has passed through the first swirl vane (6) to rise while swirling at a speed higher than that provided by the first swirl vane (6), is provided in a second riser (11).
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: June 3, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Yoshiyuki Kondo, Jiro Kasahara, Kengo Shimamura, Kenji Nishida
  • Patent number: 8707801
    Abstract: In a two-phase flow exciting force evaluation method of the present invention, the surface of one of a plurality of tube bodies (3) is at least partially formed from a conductive material, displacement or stress of the tube body (3) is measured in a state of being vibrated by a shaking device (4), and a void fraction of a two-phase flow (F) flowing in the vicinity of the tube body (3) is measured based on the potential difference between an electric potential at a predetermined position on the surface of the tube body (3), and a reference electric potential.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: April 29, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Yoshiyuki Kondo, Kenji Nishida
  • Publication number: 20140054657
    Abstract: In one embodiment, a semiconductor device includes a substrate, a gate insulator on the substrate, and a gate electrode on the gate insulator. The device further includes a source diffusion layer of a first conductivity type and a drain diffusion layer of a second conductivity type disposed on a surface of the substrate so as to sandwich the gate electrode. The device further includes a junction forming region disposed between the source diffusion layer and the drain diffusion layer so as to contact the source diffusion layer. The junction forming region includes a source extension layer of the first conductivity type, a pocket layer of the second conductivity type above the source extension layer, and a diffusion suppressing layer disposed between the source extension layer and the pocket layer and containing carbon so as to suppress diffusion of impurities between the source extension layer and the pocket layer.
    Type: Application
    Filed: February 13, 2013
    Publication date: February 27, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira HOKAZONO, Yoshiyuki KONDO, Toshitaka MIYATA
  • Publication number: 20130333866
    Abstract: There is provided a large-sized reboiler that can achieve space saving and reduction in plant cost. Specifically, there is provided a large-sized reboiler comprising a vessel of which a liquid is supplied from a lower part and a vaporized gas is discharged from an upper part; and a heat transfer tube group arranged in such a manner that a void penetrating in the up-and-down direction is formed in the vessel, wherein a maximum length of a cross-sectional figure of a flow path for the liquid exceeds 2 m, and the void occupies 5 to 10% of an area of the cross-sectional figure of the flow path.
    Type: Application
    Filed: November 29, 2011
    Publication date: December 19, 2013
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Yoshiyuki Kondo, Hiromitsu Nagayasu, Takashi Kamijo, Osamu Miyamoto
  • Publication number: 20130313760
    Abstract: An autoclave (1) is one in which a heat application target molded material (W) is retained in shape by a retaining jig (4) which has a cavity (15) therein, and is heat-cured with high temperature gas. The autoclave is provided with: a pressure vessel (2) in the interior of which the molded material (W) is arranged; a high temperature gas supplying device (5) which supplies the high temperature gas to the molded material (W) within the pressure vessel (2); and an auxiliary high temperature gas supplying device (7) which supplies the high temperature gas into the interior of the cavity (15).
    Type: Application
    Filed: January 25, 2012
    Publication date: November 28, 2013
    Inventors: Yoshiyuki Kondo, Koichi Tanimoto, Yukio Takeuchi, Yusuke Yanase
  • Publication number: 20130181137
    Abstract: A neutron radiation detector has a function that discriminates between neutron radiation and ? radiation based on a difference in pulse shape between photodetection signals from a neutron radiation detection scintillator, which includes a Ce-containing LiCaAlF6 single crystal.
    Type: Application
    Filed: May 18, 2011
    Publication date: July 18, 2013
    Inventors: Kenichi Watanabe, Atsushi Yamazaki, Akira Uritani, Yoshiyuki Kondo, Tetsuo Iguchi, Noriaki Kawaguchi, Kentaro Fukuda, Toshihisa Suyama, Akira Yoshikawa, Takayuki Yanagida, Yui Yokota