Abstract: This invention provides an industrially useful process for producing 1,4-transcyclohexanecarboxylic acid derivative (1) which has excellent VLA-4 inhibitory action and safety, and an intermediate which is useful in such method.

Abstract: Compounds that selectively inhibit the binding of ligands to ?4?1 integrin (VLA-4) and methods for their preparation are disclosed. In one embodiment, compounds of the invention are represented by Formula I: As selective inhibitors of VLA-4 mediated cell adhesion, compounds of the present invention are useful in the treatment of conditions associated with such adhesion, including, but not limited to, such conditions as inflammatory and autoimmune responses, diabetes, asthma, psoriasis, inflammatory bowel disease, transplantation rejection, and tumor metastasis. Also disclosed are methods of inhibiting VLA-4 mediated cell adhesion and methods of treating conditions associated with LA-4 mediated cell adhesion.

Abstract: Compounds that selectively inhibit the binding of ligands to ?4?1 integrin (VLA-4) and methods for their preparation are disclosed. In one embodiment, compounds of the invention are represented by Formula I: As selective inhibitors of VLA-4 mediated cell adhesion, compounds of the present invention are useful in the treatment of conditions associated with such adhesion, including, but not limited to, such conditions as inflammatory and autoimmune responses, diabetes, asthma, psoriasis, inflammatory bowel disease, transplantation rejection, and tumor metastasis. Also disclosed are methods of inhibiting VLA-4 mediated cell adhesion and methods of treating conditions associated with LA-4 mediated cell adhesion.

Abstract: A semiconductor device of the invention includes a substrate in which a power-supply electrode and a ground electrode are provided. A first semiconductor chip is disposed over the substrate and has a first conductor layer formed on a surface facing a second semiconductor chip. A second conductor layer is disposed over the first semiconductor chip and has a second conductor layer formed on a surface facing the first semiconductor chip. And an adhesive layer is disposed between the first conductor layer and the second conductor layer and bonds together the first semiconductor chip and the second semiconductor chip. In the semiconductor device, the adhesive layer and the first and second conductor layers function as a capacitor.

Abstract: The present invention relates to a compound represented by the following formula (I): (wherein, W represents WA-A1-WB- (in which, WA is substituted or unsubstituted aryl, etc., A1 is —NR1—, single bond, —C(O)—, etc., and WB is substituted or unsubstituted arylene, etc.), R is single bond, —NH—, —OCH2—, alkenylene, etc., X is —C(O)—, —CH2—, etc., and M is, for example, the following formula: (in which, R11, R12 and R13 each independently represents hydrogen, hydroxyl, amino, halogen, etc., R14 is hydrogen or lower alkyl, Y represents —CH2—O—, etc., Z is substituted or unsubstituted arylene, etc., A2 is single bond, etc, and R10 is hydroxyl or lower alkoxy)), or salt thereof; and a medicament containing the same.

Abstract: A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract: A managing method of manufacturing semiconductor devices is disclosed. The method comprises the steps of: providing at least one tag region on a semiconductor substrate in which plural semiconductor devices have been formed, the tag region being provided with a tag which can read/write information without making physical contact; writing manufacturing managing information of each of the semiconductor devices into the tag without making contact with the semiconductor substrate; and reading the manufacturing managing information from the tag after dividing the semiconductor substrate, and selecting non-defective semiconductor devices based on the manufacturing managing information.

Abstract: A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.

Abstract: A therapeutically effective amount of an antibody for a compound selected from the group consisting of PTHrp, TGF?, IL-1?, IL-1?, IL-6, Lymphotoxin, TNF, PGE; 1,25 dihydroxy vitamin D3 and an antigenic fragment thereof used in the treatment of cancer metastasis to bone and cancer cell growth in bone as well as osteolysis and symptomatic sequelae thereof. An antibody immunoreactive with parathyroid hormone-related protein (PTHrp) is particularly preferred. Antibodies with human characteristics are included in the invention for application of the invention method to human subjects. Also, the antibody can be administered in an injectable is formulation in combination with a therapeutically effective amount of a bisphosphonate or pyrophosphate having the general structure formula wherein X is a linking moiety allowing for the interconnection of the phosphonate groups, and pharmaceutically acceptable salts, hydrates and partial hydrates thereof.

Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.

Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.

Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.

Abstract: A method of manufacturing semiconductor device in the method of manufacturing wafer level semiconductor device that can search the defective products from the marking information even when sealing resin is formed on the wafer and a semiconductor device manufactured with the same method. A method of manufacturing wafer level semiconductor comprises a process to seal with a resin material the surface of wafer having the front surface and rear surface and forming a plurality of semiconductor chips on the front surface, a first marking process for marking the position information corresponding to each chip to the region of each chip at the rear surface of the wafer, a process for performing the electrical test to each chip, a second marking process for marking the result of the electrical test to the region of each chip at the rear surface of the wafer and a dicing process for dicing the wafer to each chip.

Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.

Abstract: Compounds that selectively inhibit the binding of ligands to &agr;4&bgr;1 integrin (VLA-4) and methods for their preparation are disclosed.

Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.