Patents by Inventor Yoshiyuki Yoneda

Yoshiyuki Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040219719
    Abstract: A device including a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic film.
    Type: Application
    Filed: June 1, 2004
    Publication date: November 4, 2004
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji, Seiichi Orimo, Hideharu Sakoda, Ryuji Nomoto, Masanori Onodera, Junichi Kasai
  • Patent number: 6794273
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 21, 2004
    Assignee: Fujitsu Limited
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Patent number: 6781224
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Patent number: 6777250
    Abstract: A method of manufacturing semiconductor device in the method of manufacturing wafer level semiconductor device that can search the defective products from the marking information even when sealing resin is formed on the wafer and a semiconductor device manufactured with the same method. A method of manufacturing wafer level semiconductor comprises a process to seal with a resin material the surface of wafer having the front surface and rear surface and forming a plurality of semiconductor chips on the front surface, a first marking process for marking the position information corresponding to each chip to the region of each chip at the rear surface of the wafer, a process for performing the electrical test to each chip, a second marking process for marking the result of the electrical test to the region of each chip at the rear surface of the wafer and a dicing process for dicing the wafer to each chip.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Shinsuke Nakajyo, Yoshiyuki Yoneda, Hideharu Sakoda
  • Patent number: 6756378
    Abstract: Compounds that selectively inhibit the binding of ligands to &agr;4&bgr;1 integrin (VLA-4) and methods for their preparation are disclosed. In one embodiment, compounds of the invention are represented by Formula I: As selective inhibitors of VLA-4 mediated cell adhesion, compounds of the present invention are useful in the treatment of conditions associated with such adhesion, including, but not limited to, such conditions as inflammatory and autoimmune responses, diabetes, asthma, psoriasis, inflammatory bowel disease, transplantation rejection, and tumor metastasis. Also disclosed are pharmaceutical compositions, methods of inhibiting VLA-4 mediated cell adhesion and methods of treating conditions associated with LA-4 mediated cell adhesion, which involve compounds of Formula I.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: June 29, 2004
    Assignees: Pharmacopeia Drug Discovery, Inc., Daiichi Pharmaceutical Co., Ltd.
    Inventors: John J. Baldwin, Edward McDonald, Kevin Joseph Moriarty, Christopher Ronald Sarko, Nobuo Machinaga, Atsushi Nakayama, Jun Chiba, Shin Iimura, Yoshiyuki Yoneda
  • Publication number: 20040110945
    Abstract: The present invention relates to a compound represented by the following formula (I): 1
    Type: Application
    Filed: June 30, 2003
    Publication date: June 10, 2004
    Inventors: Atsushi Nakayama, Nobuo Machinaga, Yoshiyuki Yoneda, Yuichi Sugimoto, Jun Chiba, Toshiyuki Watanabe, Shin Iimura
  • Publication number: 20040053444
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
  • Patent number: 6696754
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: February 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Publication number: 20030219969
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Application
    Filed: December 31, 2002
    Publication date: November 27, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20030164544
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Application
    Filed: August 8, 2002
    Publication date: September 4, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Publication number: 20030160325
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Application
    Filed: October 2, 2002
    Publication date: August 28, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Patent number: 6573121
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: June 3, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20030082846
    Abstract: A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.
    Type: Application
    Filed: March 19, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Masaru Nukiwa, Osamu Yamaguchi, Yasunori Fujimoto, Takumi Ihara, Muneharu Morioka, Yukihiro Kuriki, Masaki Uchida
  • Publication number: 20030078249
    Abstract: Compounds that selectively inhibit the binding of ligands to &agr;4&bgr;1 integrin (VLA-4) and methods for their preparation are disclosed.
    Type: Application
    Filed: December 28, 2001
    Publication date: April 24, 2003
    Applicant: Daiichi Pharmaceutical Co., LTD.
    Inventors: John J. Baldwin, Edward McDonald, Kevin Joseph Moriarty, Christopher Ronald Sarko, Nobuo Machinaga, Atsushi Nakayama, Jun Chiba, Shin Iimura, Yoshiyuki Yoneda
  • Patent number: 6511620
    Abstract: A method of producing semiconductor devices which have an excellent separability from a metal mold after resin encapsulation and thus eliminates the need to clean the metal mold. A metal mold for producing such semiconductor devices is also provided. According to the method of the present invention, the metal mold is first opened, and two separation sheets are disposed on dividing surfaces including cavity forming surfaces of a first metal mold and a second metal mold. A substrate is then placed on one of the separation sheets, with its semiconductor chip formed surface facing the second metal mold. An encapsulation resin is provided on the substrate placed on one of the separation sheets. The metal mold in a heated state is closed and pressed to form a resin layer for encapsulating electrodes formed on the substrate. The metal mold is again opened, and the resin-encapsulated substrate is taken out of the metal mold.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: January 28, 2003
    Assignees: Fujitsu Limited, Fujitsu Automation Limited
    Inventors: Toshimi Kawahara, Hirohisa Matsuki, Yasuhiro Shinma, Yoshiyuki Yoneda, Norio Fukasawa, Yuzo Hamanaka, Kenichi Nagashige, Takashi Hozumi
  • Publication number: 20030006503
    Abstract: A device includes a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic films.
    Type: Application
    Filed: November 17, 1999
    Publication date: January 9, 2003
    Inventors: YOSHIYUKI YONEDA, KAZUTO TSUJI, SEIICHI ORIMO, HIDEHARU SAKODA, RYUJI NOMOTO, MASANORI ONODERA, JUNICHI KASAI
  • Patent number: 6472744
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: October 29, 2002
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Patent number: 6469370
    Abstract: In a semiconductor device of the present invention and a production method thereof, an electronic circuit is provided in a semiconductor substrate, the electronic circuit having terminals. An internal wiring pattern is provided in the substrate, the internal wiring pattern being connected to the electronic circuit terminals. A protective layer is provided on the substrate, the protective layer covering the substrate. Vias are provided on the substrate so as to project from the protective layer, the vias being connected to the internal wiring pattern at arbitrary positions on the substrate. An external wiring pattern is provided on the protective layer, the external wiring pattern being connected to the vias. Projection electrodes are connected to the external wiring pattern, the projection electrodes having a predetermined height above the external wiring pattern.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: October 22, 2002
    Assignee: Fujitsu Limited
    Inventors: Toshimi Kawahara, Hirohisa Matsuki, Yasuhiro Shinma, Yoshiyuki Yoneda, Norio Fukasawa, Yuzo Hamanaka, Kenichi Nagashige, Takashi Hozumi
  • Patent number: 6376921
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20020027265
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto