Patents by Inventor Young-Gon Kim

Young-Gon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6647506
    Abstract: A synchronous bus system includes a clock line having a forward direction clock segment and a reverse direction clock segment connected to each of a plurality of devices. The forward direction clock segment carries a forward direction clock signal, and the reverse direction clock segment carries a reverse direction clock signal. Synchronization clock circuitry, provided in each device, receives the forward direction clock signal and the reverse direction clock signal. Using the received clock signals, the synchronization clock circuitry derives a universal synchronization clock signal which is synchronous throughout all devices. Skew correction circuitry, provided in at least a portion of the devices, corrects for skew between the universal synchronization clock signal and one or more data signals for transferring data between devices.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: November 11, 2003
    Assignee: Integrated Memory Logic, Inc.
    Inventors: Jeongsik Yang, Young Gon Kim, Chiayao S. Tung, Shuen-Chin Chang, Yong E. Park
  • Publication number: 20030168725
    Abstract: A stacked microelectronic assembly comprises a plurality of subassemblies including folded substrates and at least one microelectronic element. The subassemblies are stacked substantially vertically.
    Type: Application
    Filed: October 28, 2002
    Publication date: September 11, 2003
    Applicant: Tessera, Inc.
    Inventors: Michael Warner, Philip Damberg, John B. Riley, David Gibson, Young-Gon Kim, Belgacem Haba, Vernon Solberg
  • Publication number: 20030107118
    Abstract: A stacked chip assembly includes individual units having chips mounted on dielectric layers and traces on the dielectric layers interconnecting the contacts of the chips with terminals disposed in peripheral regions of the dielectric layers. At least some of the traces are multi-branched traces which connect chip select contacts to chip select terminals. The units are stacked one above the other with corresponding terminals of the different units being connected to one another by solder balls or other conductive elements so as to form vertical buses. Prior to stacking, the multi-branched traces of the individual units are selectively interrupted, as by breaking the individual branches, so as to leave chip select contacts of chips in different units connected to different chip select terminals and thereby connect these chips to different vertical buses.
    Type: Application
    Filed: October 9, 2002
    Publication date: June 12, 2003
    Applicant: Tessera, Inc.
    Inventors: L. Elliott Pflughaupt, David Gibson, Young-Gon Kim, Craig S. Mitchell
  • Publication number: 20020170011
    Abstract: Boundary scan testing methods that detect manufacturing defects in AC-coupled differential pairs may be based on a selected signal parameter: phase or frequency. The data is encoded by the signal parameter. In one embodiment, the signal parameter is compared to reference parameter data provided by the transmitter. In a second embodiment, the reference parameter data is sent from an external source. All the components on board are synchronized with this external source. In a third embodiment, the reference parameter data is embedded in each AC signal between the transmitter and receiver. Two lines of one differential link are used to send different patterns.
    Type: Application
    Filed: May 9, 2001
    Publication date: November 14, 2002
    Inventors: Benny W. H. Lai, Young Gon Kim, Kenneth P. Parker, Jeff Rearick
  • Patent number: 6105847
    Abstract: A nozzle structure of a repair apparatus for a semiconductor package includes a funnel holder connected to a repair apparatus, a cylinder extended downwardly from the funnel holder, a vacuum tube provided along an axis of the cylinder, a vacuum absorption body housing the vacuum tube therein, and a pair of exhaust guide wall clips. A lower portion of the cylinder is compressed from four sides thereof so as to form a rectangular ending thereof which has first through fourth side walls. The vacuum absorption body is positioned between the first and third side walls. Each of the exhaust side walls is fixed to corresponding side edge lines of the first and third side walls, wherein the first and third side walls are identical in height and facing each other, the second and fourth side walls are identical in height and facing each other, and the first and third side walls are shorter than the second and fourth side walls in height.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: August 22, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventor: Young-Gon Kim
  • Patent number: 6010058
    Abstract: In a BGA package having electrically connected active balls and electrically disconnected dummy balls, the active balls are positioned in a radial direction at intervals of 90.degree. around the dummy balls. When a defect occurs in a solder joint, the package can be easily repaired by finding defective active ball; forming a repair hole by using a cutting means at a predetermined portion of the printed circuit board corresponding to a central position between the dummy ball and the defectively soldered active ball; inserting a solder paste injector into the repair hole to inject solder thereinto; and mutually connecting pad extensions of the dummy ball and the defective active ball with the injected solder. Therefore, the overall process can be simplified and its reliability can be improved.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: January 4, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventors: Young-Gon Kim, Dong-You Kim
  • Patent number: 5748450
    Abstract: In a BGA package having electrically connected active balls and electrically disconnected dummy balls, the active balls are positioned in a radial direction at intervals of 90.degree. around the dummy balls. When a defect occurs in a solder joint, the package can be easily repaired by finding defective active ball; forming a repair hole by using a cutting means at a predetermined portion of the printed circuit board corresponding to a central position between the dummy ball and the defectively soldered active ball; inserting a solder paste injector into the repair hole to inject solder thereinto; and mutually connecting pad extensions of the dummy ball and the defective active ball with the injected solder. Therefore, the overall process can be simplified and its reliability can be improved.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: May 5, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventors: Young-Gon Kim, Dong-You Kim