Abstract: A semiconductor device may include a first input/output (I/O) unit and a second I/O unit. The first I/O unit may include a first input path that receives a signal through a first pad and a first output path and a first I/O controller that output a signal to the first pad. The second I/O unit may include a second input path that receives a signal through a second pad and a second output path and a second I/O controller that output a signal to the second pad.

Abstract: A semiconductor device may include a data output circuit and control signal output circuit. The data output circuit may convert a first input signal and a second input signal sequentially inputted thereto into output data and may compare the first and second input signals with a storage datum to generate a first comparison signal and a second comparison signal. The control signal output circuit may detect logic levels of bits included in the first and second comparison signals to generate a first detection signal and a second detection signal, may generate a first flag signal and a second flag signal from the first and second detection signals in response to a storage flag signal, and may sequentially output the first and second flag signals as transmission control signals.

Abstract: A semiconductor device may include a data output circuit and a control signal output circuit. The data output circuit may compare a first input signal or a second input signal with a storage datum to generate a first comparison selection signal and may compare the first input signal with the second input signal to generate a second comparison selection signal. The control signal output circuit may detect logic levels of bits included in the first and second comparison selection signals to generate first and second detection signals, generate first and second flag signals from the first and second detection signals in response to a storage flag signal, and sequentially output the first and second flag signals as transmission control signals.

Abstract: A semiconductor device includes an output controller and a data strobe signal generator. The output controller generates a period signal and a control clock signal according to a read operation signal generated to execute a read operation, an internal clock signal generated in synchronization with a clock signal, and an expansion control signal. The data strobe signal generator generates a data strobe signal according to the control clock signal during a period that the period signal is enabled. The period that the period signal is enabled expands according to the expansion control signal.

Abstract: A semiconductor device includes an output controller and a data strobe signal generator. The output controller generates a period signal and a control clock signal according to a read operation signal generated to execute a read operation, an internal clock signal generated in synchronization with a clock signal, and an expansion control signal. The data strobe signal generator generates a data strobe signal according to the control clock signal during a period that the period signal is enabled. The period that the period signal is enabled expands according to the expansion control signal.

Abstract: The semiconductor device includes a first drive control signal generator suitable for generating a first drive control signal from a test input signal, a first output driver suitable for being controlled according to the first drive control signal, a second drive control signal generator suitable for generating a second drive control signal from the first drive control signal, and a second output driver suitable for being controlled according to the second drive control signal.

Abstract: A semiconductor system includes a controller and a semiconductor device. The controller generates command signals, a composite control signal, and data signals. The semiconductor device generates a first mode signal and a second mode signal according to the command signals. The semiconductor device includes a write control circuit suitable for receiving the composite control signal and the data signals to determine an execution/non-execution of a data masking operation and a data bus inversion (DBI) operation when a write operation or a masking write operation is performed according to the first and second mode signals.

Abstract: A semiconductor system may include first semiconductor device including a first pad, a second pad and a first test input pad, and suitable for storing data inputted in series through the first test input pad and outputting the stored data in parallel through the first pad and the second pad; a second semiconductor device including a third pad, a fourth pad and a second test output pad, and suitable for storing data inputted in parallel through the third pad and the fourth pad, a first through via connecting the first pad and the third pad so that the stored data outputted in parallel through the first pad is inputted in parallel through the third pad; and a second through via connecting the second pad and the fourth pad so that the stored data outputted in parallel through the second pad is inputted in parallel through the fourth pad.

Abstract: A semiconductor apparatus includes an input buffer configured to buffer data inputted through a data input/output pad; a data input control unit configured to transfer an output of the input buffer to a data input/output line in response to a write clock; a test loop control unit configured to output one of a signal of the data input/output line and test latch data in response to a test mode signal; a data output control unit configured to output an output of the test loop control unit in response to a read clock; an output inversion select unit configured to output an output signal of the data output control unit by inverting or non-inverting it; and an output buffer configured to buffer an output signal of the output inversion select unit and output a resultant signal to a node which is coupled with the data input/output pad and input buffer.

Abstract: The present invention provides a method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell, in which the glass transition temperature of an electrolyte membrane is reduced using a hydrophilic solvent, and a membrane-electrode assembly for a polymer electrolyte fuel cell, manufactured by the method. In the method of the invention, the glass transition temperature of the electrolyte membrane to which a catalyst is transferred is reduced compared to that in a conventional method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell using the decal process. Thus, even to an electrolyte membrane material having a relatively high glass transition temperature, the catalyst may be transferred at a rate of 100% at a temperature of about 120° C., at which hot pressing is carried out. Thus, the problems associated with electrolyte membrane deterioration occurring in conventional methods can be solved.

Abstract: A semiconductor system may include a first semiconductor device including a first pad, a second pad and a first test input pad, and suitable for storing data inputted in series through the first test input pad and outputting the stored data in parallel through the first pad and the second pad; a second semiconductor device including a third pad, a fourth pad and a second test output pad, and suitable for storing data inputted in parallel through the third pad and the fourth pad, a first through via connecting the first pad and the third pad so that the stored data outputted in parallel through the first pad is inputted in parallel through the third pad; and a second through via connecting the second pad and the fourth pad so that the stored data outputted in parallel through the second pad is inputted in parallel through the fourth pad.

Abstract: A display apparatus and a method for displaying a screen in a display apparatus are provided. The display apparatus and method of displaying a screen in a display apparatus includes setting an area of a display screen as a user designated area through an area designation user interface (UI) and when a preset event is generated, displaying at least one of a graphical user interface (GUI) and a portion of the display screen in the set user designated area, depending on the generated event type.

Abstract: A semiconductor device may include a first input/output (I/O) unit and a second I/O unit. The first I/O unit may include a first input path that receives a signal through a first pad and a first output path and a first I/O controller that output a signal to the first pad. The second I/O unit may include a second input path that receives a signal through a second pad and a second output path and a second I/O controller that output a signal to the second pad.

Abstract: A display apparatus and a method of controlling the display apparatus are provided. The method includes analyzing a display item displayed on a display screen, outputting audio corresponding to the analyzed display item, and in response to the audio being output, displaying a user interface (UI), which includes at least one icon for controlling a display item corresponding to the output audio, in an area of the display screen.

Abstract: A semiconductor device includes a driving unit suitable for driving a plurality of signal lines, which are directly coupled to a plurality of bump pads, to a preset voltage level in a level determination period, and adjusting the preset voltage level in a predetermined order when the level determination period is repeated, a signal input circuit suitable for receiving voltage levels that are inputted through the signal lines and determining logic values for the inputted voltage levels of the signal lines, and an operation unit suitable for receiving voltage levels of the signal lines from the signal input circuit in a parallel manner in the level determination period, latching the logic values of the voltage levels, and serially outputting the logic values through a probe pad.

Abstract: A semiconductor apparatus includes: a receiver configured to receive a plurality of input signals through a plurality of pads; a signal processing unit configured to process the input signals received by the receiver and output the processed signals as a plurality of internal signals; a MUX unit configured to select the plurality of internal signals as a plurality of MUX output or select test input data and a plurality of latch signals as the plurality of MUX output signals in response to an input/output select signal; a latch unit configured to output the plurality of MUX output signals as the plurality of latch signals and a final output signal in response to a latch clock signal; and a clock selection unit configured to output any one of a test clock signal and an internal clock signal as the latch clock signal in response to a test mode signal.

Abstract: A semiconductor system may include a first semiconductor device including a first pad, a second pad and a first test input pad, and suitable for storing data inputted in series through the first test input pad and outputting the stored data in parallel through the first pad and the second pad; a second semiconductor device including a third pad, a fourth pad and a second test output pad, and suitable for storing data inputted in parallel through the third pad and the fourth pad, a first through via connecting the first pad and the third pad so that the stored data outputted in parallel through the first pad is inputted in parallel through the third pad; and a second through via connecting the second pad and the fourth pad so that the stored data outputted in parallel through the second pad is inputted in parallel through the fourth pad.

Abstract: A semiconductor apparatus includes an input buffer configured to buffer and output data inputted from a data input/output pad; a data input control unit configured to transfer data outputted from the input buffer; a data output control unit configured to transfer inputted data to an output buffer; the output buffer configured to buffer data outputted from the data output control unit, and output the buffered data to the data input/output pad; a test data input/output unit configured to latch test inputted data inputted and output test latch data or latch an output of the input buffer and output the test latch data; and a test loop control unit configured to transfer data or the test latch data to the data output control unit.

Abstract: A semiconductor apparatus includes an input buffer configured to buffer and output data inputted from a data input/output pad; a data input control unit configured to transfer data outputted from the input buffer; a data output control unit configured to transfer inputted data to an output buffer; the output buffer configured to buffer data outputted from the data output control unit, and output the buffered data to the data input/output pad; a test data input/output unit configured to latch test inputted data inputted and output test latch data or latch an output of the input buffer and output the test latch data; and a test loop control unit configured to transfer data or the test latch data to the data output control unit.

Abstract: The present invention provides a method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell, in which the glass transition temperature of an electrolyte membrane is reduced using a hydrophilic solvent, and a membrane-electrode assembly for a polymer electrolyte fuel cell, manufactured by the method. In the method of the invention, the glass transition temperature of the electrolyte membrane to which a catalyst is transferred is reduced compared to that in a conventional method for manufacturing a membrane-electrode assembly for a polymer electrolyte fuel cell using the decal process. Thus, even to an electrolyte membrane material having a relatively high glass transition temperature, the catalyst may be transferred at a rate of 100% at a temperature of about 120° C., at which hot pressing is carried out. Thus, the problems associated with electrolyte membrane deterioration occurring in conventional methods can be solved.